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bq25100, bq25101, bq25100A, bq25100H, bq25101H, bq25100L

SLUSBV8C – AUGUST 2014 – REVISED NOVEMBER 2014

bq2510x 250-mA Single Cell Li-Ion Battery Chargers, 1-mA Termination, 75-nA Battery
Leakage
1 Features 3 Description
1• Charging The bq2510x series of devices are highly integrated
Li-Ion and Li-Pol linear chargers targeted at space-
– 1% Charge Voltage Accuracy limited portable applications. The high input voltage
– 10% Charge Current Accuracy range with input overvoltage protection supports low-
– Supports Applications for Very Low Charge cost unregulated adapters.
Currents - 10 mA to 250 mA The bq2510x has a single power output that charges
– Supports minimum 1-mA Charge Termination the battery. A system load can be placed in parallel
Current with the battery as long as the average system load
does not keep the battery from charging fully during
– Ultra Low Battery Output Leakage Current -
the 10 hour safety timer.
Maximum 75 nA
– Adjustable Termination and Precharge The battery is charged in three phases: conditioning,
Threshold constant current and constant voltage. In all charge
phases, an internal control loop monitors the IC
– High voltage Chemistry Support: 4.35 V with junction temperature and reduces the charge current
bq25100H/01H, 4.30 V with bq25100A if an internal temperature threshold is exceeded.
• Protection The charger power stage and charge current sense
– 30-V Input Rating; with 6.5-V Input functions are fully integrated. The charger function
Overvoltage Protection has high accuracy current and voltage regulation
– Input Voltage Dynamic Power Management loops and charge termination. The pre-charge current
and termination current threshold are programmed
– 125°C Thermal Regulation; 150°C Thermal via an external resistor on the bq2510x. The fast
Shutdown Protection charge current value is also programmable via an
– OUT Short-Circuit Protection and ISET Short external resistor.
Detection
– Operation over JEITA Range via Battery Device Information(1)
NTC – 1/2 Fast-Charge-Current at Cold, 4.06 PART NUMBER PACKAGE BODY SIZE (NOM)
V (bq25100/01) or 4.2 V (bq25100H/01H) at bq25100 DSBGA (6) 1.60 mm × 0.90 mm
Hot bq25101 DSBGA (6) 1.60 mm × 0.90 mm
– Fixed 10 Hour Safety Timer bq25100A DSBGA (6) 1.60 mm × 0.90 mm

• System bq25100H DSBGA (6) 1.60 mm × 0.90 mm

bq25101H DSBGA (6) 1.60 mm × 0.90 mm
– Automatic Termination and Timer Disable
Mode (TTDM) for Absent Battery Pack bq25100L(2) DSBGA (6) 1.60 mm × 0.90 mm

– Available in Small 1.60 mm × 0.90 mm (1) For all available packages, see the orderable addendum at
the end of the datasheet.
DSBGA Package
(2) Product preview. Contact the local TI representative for device
details.
2 Applications
SYSTEM
• Fitness Accessories USB Port or
Adapter
VBUS IN OUT
• Smart Watches D+ 1ÛF 1ÛF
D-

Bluetooth® Headsets
VSS
• GND
ISET TS
TEMP
PACK+

HOST
• Low-Power Handheld Devices 1.35kŸ
PRETERM
PACK-

6kŸ

bq25100
CE

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. UNLESS OTHERWISE NOTED, this document contains PRODUCTION
DATA.
bq25100, bq25101, bq25100A, bq25100H, bq25101H, bq25100L
SLUSBV8C – AUGUST 2014 – REVISED NOVEMBER 2014 www.ti.com

Table of Contents
1 Features .................................................................. 1 9 Application and Implementation ........................ 22
2 Applications ........................................................... 1 9.1 Application Information............................................ 22
3 Description ............................................................. 1 9.2 Typical Application - Charger Application Design
Example ................................................................... 22
4 Revision History..................................................... 2
10 Power Supply Recommendations ..................... 24
5 Device Comparison Table..................................... 3
10.1 Leakage Current Effects on Battery Capacity....... 24
6 Pin Configuration and Functions ......................... 3
11 Layout................................................................... 24
7 Specifications......................................................... 4
11.1 Layout Guidelines ................................................. 24
7.1 Absolute Maximum Ratings .................................... 4
11.2 Layout Example .................................................... 25
7.2 Handling Ratings....................................................... 4
11.3 Thermal Package .................................................. 25
7.3 Recommended Operating Conditions ..................... 4
12 Device and Documentation Support ................. 26
7.4 Thermal Information .................................................. 4
12.1 Device Support .................................................... 26
7.5 Electrical Characteristics.......................................... 5
12.2 Related Links ........................................................ 26
7.6 Typical Characteristics .............................................. 8
12.3 Trademarks ........................................................... 26
8 Detailed Description ............................................ 12
12.4 Electrostatic Discharge Caution ............................ 26
8.1 Overview ................................................................. 12
12.5 Glossary ................................................................ 26
8.2 Functional Block Diagram ....................................... 14
13 Mechanical, Packaging, and Orderable
8.3 Feature Description................................................. 15
Information ........................................................... 26
8.4 Device Functional Modes........................................ 18

4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision B (October 2014) to Revision C Page

• Changed data sheet title ........................................................................................................................................................ 1

• Deleted product preview note from bq25101H in Device Information Table.......................................................................... 1
• Deleted product preview note from bq25101H in Device Comparison Table ....................................................................... 3

Changes from Revision A (September 2014) to Revision B Page

• Deleted product preview note from bq25101 and bq25100H in Device Information Table.................................................... 1
• Deleted product preview note from bq25101 and bq25100H in Device Comparison Table ................................................. 3

Changes from Original (August 2014) to Revision A Page

• Release to Production ............................................................................................................................................................ 1

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5 Device Comparison Table

PART NUMBER VO(REG) VOVP PreTerm /CHG TS

bq25100 4.20 V 6.5 V PreTerm TS (JEITA)
bq25101 4.20 V 6.5 V CHG TS (JEITA)
bq25100A 4.30 V 6.5 V PreTerm TS
bq25100H 4.35 V 6.5 V PreTerm TS (JEITA)
bq25101H 4.35 V 6.5 V CHG TS (JEITA)
bq25100L (1) 4.06 V 6.5V PreTerm TS

(1) Product preview. Contact the local TI representative for device details.

6 Pin Configuration and Functions SPACING

6-Pin DSBGA 6-Pin DSBGA

YFP Package YFP Package
(Top View) (Top View)
1 2 1 2

A OUT IN
A OUT IN

B TS ISET
B TS ISET

PRE-
C VSS
TERM C CHG VSS

bq25100/100A/100H/100L bq25101/101H

Pin Functions
PIN
I/O DESCRIPTION
NAME NUMBER
CHG C1 (1) Low (FET on) indicates charging and open drain (FET off) indicates no charging or the first charge
cycle complete.
Input power, connected to external DC supply (AC adapter or USB port). Expected range of bypass
IN A2 I
capacitors 1 μF to 10 μF, connect from IN to VSS.
Programs the fast-charge current setting. External resistor from ISET to VSS defines fast charge
ISET B2 I
current value. Recommended range is 13.5 kΩ (10 mA) to 0.54 kΩ (250 mA).
Battery Connection. System Load may be connected. Expected range of bypass capacitors 1 μF to
OUT A1 O
10 μF.
Programs the current termination threshold ( 1% to 50% of Iout, 1mA minimum). The pre-charge
PRE-TERM C1 (1) I
current is twice the termination current level.
Expected range of programming resistor is 600 Ω to 30 kΩ (6k: Ichg/10 for term; Ichg/5 for
precharge)
Temperature sense pin connected to 10k at 25°C NTC thermistor, in the battery pack. Floating TS
pin or pulling high puts part in TTDM “Charger” mode and disables TS monitoring, Timers and
TS B1 I Termination. Pulling pin low disables the IC. If NTC sensing is not needed, connect this pin to VSS
through an external 10-kΩ resistor. A 250-kΩ resistor from TS to ground will prevent IC entering
TTDM mode when battery with thermistor is removed.
VSS C2 – Ground pin

(1) Spins have different pin definitions

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7 Specifications
7.1 Absolute Maximum Ratings (1)
over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
IN (with respect to VSS) –0.3 30 V
OUT (with respect to VSS) –0.3 7 V
Input voltage
PRE-TERM, ISET, TS, CHG
–0.3 7 V
(with respect to VSS)
Input current IN 300 mA
Output current (continuous) OUT 300 mA
Output sink current CHG 15 mA
TJ Junction temperature –40 150 °C

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage
values are with respect to the network ground terminal unless otherwise noted.

7.2 Handling Ratings

MIN MAX UNIT
ESD Electrostatic discharge IN, OUT, TS 1 µF between IN and GND, 8 kV
(IEC61000-4-2) (1) 1 µF between TS and GND, contact
2 µF between OUT and GND, 15 Air
x5R Ceramic or equivalent
TSTG Storage temperature –65 150 °C

(1) The test was performed on IC pins that may potentially be exposed to the customer at the product level. The bq2510x IC requires a
minimum of the listed capacitance, external to the IC, to pass the ESD test.

(1)
7.3 Recommended Operating Conditions
MIN NOM UNIT
IN voltage range 3.5 28 V
VIN
IN operating voltage range, Restricted by VDPM and VOVP 4.45 6.45 V
IIN Input current, IN pin 250 mA
IOUT Current, OUT pin 250 mA
TJ Junction temperature 0 125 °C
RPRE-TERM Programs precharge and termination current thresholds 0.6 30 kΩ
RISET Fast-charge current programming resistor 0.54 13.5 kΩ
RTS 10k NTC thermistor range without entering BAT_EN or TTDM 1.66 258 kΩ

(1) Operation with VIN less than 4.5V or in drop-out may result in reduced performance.

7.4 Thermal Information

bq25100
THERMAL METRIC (1) UNIT
YFP (6 PINS)
RθJA Junction-to-ambient thermal resistance 132.9
RθJCtop Junction-to-case (top) thermal resistance 1.3
RθJB Junction-to-board thermal resistance 21.8
°C/W
ψJT Junction-to-top characterization parameter 5.6
ψJB Junction-to-board characterization parameter 21.8
RθJCbot Junction-to-case (bottom) thermal resistance n/a

(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

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7.5 Electrical Characteristics

Over junction temperature range 0°C ≤ TJ ≤ 125°C and recommended supply voltage (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT
UVLO Undervoltage lock-out exit VIN: 0 V → 4 V 3.15 3.3 3.45 V
VIN: 4 V→0 V;
VHYS_UVLO Hysteresis on VUVLO_RISE falling 250 mV
VUVLO_FALL = VUVLO_RISE – VHYS-UVLO
Input power good detection Input power good if VIN > VOUT + VIN-DT;
VIN-DT 15 60 130 mV
threshold is VOUT + VIN-DT VOUT = 3.6 V; VIN: 3.5 V → 4 V
VHYS-INDT Hysteresis on VIN-DT falling VOUT = 3.6 V; VIN: 4 V → 3.5 V 31 mV
Time measured from VIN: 0 V → 5 V 1-μs rise-
tDGL(PG_PWR) Deglitch time on exiting sleep 29 ms
time to charge enables; VOUT = 3.6 V
Deglitch time on VHYS-INDT power Time measured from VIN: 5 V → 3.2 V 1-μs fall-
tDGL(PG_NO-PWR) 29 ms
down. Same as entering sleep. time to charge disables; VOUT = 3.6 V
Input over-voltage protection
VOVP VIN: 5 V → 12 V 6.52 6.67 6.82 V
threshold
tDGL(OVP-SET) Input over-voltage blanking time VIN: 5 V → 12 V 113 μs
VHYS-OVP Hysteresis on OVP VIN: 11 V → 5 V 110 mV
Time measured from VIN: 12 V → 5 V 1-μs fall-
tDGL(OVP-REC) Deglitch time exiting OVP 450 μs
time to charge enables
Low input voltage protection. Limit input source current to 50 mA;
VIN-DPM 4.25 4.31 4.37 V
Restricts lout at VIN-DPM VOUT = 3.5 V; RISET = 1.35 kΩ
ISET SHORT CIRCUIT TEST
Highest resistor value considered RISET: 540 Ω → 250 Ω, Iout latches off;
RISET_SHORT 420 450 Ω
a fault (short). Cycle power to reset
Deglitch time transition from ISET Clear fault by disconnecting IN or cycling (high /
tDGL_SHORT 1 ms
short to Iout disable low) TS/BAT_EN
Maximum OUT current limit VIN = 5 V; VOUT = 3.6 V; RISET: 540 Ω → 250 Ω;
IOUT_CL 550 600 650 mA
regulation (Clamp) IOUT latches off after tDGL-SHORT
BATTERY SHORT PROTECTION
OUT pin short-circuit detection
VOUT(SC) VOUT:3 V → 0.5 V; No deglitch 0.75 0.8 0.85 V
threshold/ precharge threshold
Recovery ≥ VOUT(SC) + VOUT(SC-HYS); Rising; No
VOUT(SC-HYS) OUT pin Short hysteresis 77 mV
deglitch
Source current to OUT pin during
IOUT(SC) 9 11 13 mA
short-circuit detection
QUIESCENT CURRENT
VIN = 0 V; 0°C to 125°C 75
IOUT(PDWN) Battery current into OUT pin nA
VIN = 0 V; 0°C to 85°C 50
OUT pin current, charging
IOUT(DONE) VIN = 6 V; VOUT > VOUT(REG) 6 μA
terminated
IIN(STDBY) Standby current into IN pin TS = GND; VIN ≤ 6 V 125 μA
TS = open, VIN = 6 V;
ICC Active supply current, IN pin TTDM – no load on OUT pin; VOUT > VOUT(REG); 0.75 1 mA
IC enabled
BATTERY CHARGER FAST-CHARGE
TJ = 0°C to 125°C; IOUT = 0 mA to 250 mA;
4.16 4.2 4.23
VIN = 5.0 V; VTS-45°C≤ VTS ≤ VTS-0°C (bq25100/101)
TJ = 0°C to 125°C; IOUT = 0 mA to 250 mA;
4.26 4.3 4.33
VIN = 5.0 V; VTS-45°C≤ VTS ≤ VTS-0°C (bq25100A)
VOUT(REG) Output voltage TJ = 0°C to 125°C; IOUT = 0 mA to 250 mA; V
VIN = 5.0 V; VTS-45°C≤ VTS ≤ VTS-0°C 4.31 4.35 4.38
(bq25100H/101H)
TJ = -5°C to 55°C; IOUT = 10mA to 75 mA;
4.275 4.3 4.325
VIN = 5.0 V; VTS-45°C≤ VTS ≤ VTS-0°C (bq25100A)
VIN = 5.0 V; IOUT =10 mA to 250 mA;
4.02 4.06 4.1
VTS-60°C≤ VTS ≤ VTS-45°C (bq25100/101)
VO_HT(REG) Battery hot regulation voltage V
VIN = 5.0 V; IOUT =10 mA to 250 mA;
4.16 4.2 4.24
VTS-60°C≤ VTS ≤ VTS-45°C (bq25100H/101H)
Programmed output “fast charge” VOUT(REG) > VOUT > VLOWV; VIN = 5 V;
IOUT(RANGE) 10 250 mA
current range RISET = 0.54 kΩ to 13.5 kΩ

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Electrical Characteristics (continued)

Over junction temperature range 0°C ≤ TJ ≤ 125°C and recommended supply voltage (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Adjust VIN down until IOUT = 0.2 A; VOUT = 4.15 V;
VDO(IN-OUT) Drop-Out, VIN – VOUT 220 400 mV
RISET = 680 Ω; TJ ≤ 100°C
IOUT Output “fast charge” formula VOUT(REG) > VOUT > VLOWV; VIN = 5 V KISET/RISET A
RISET = KISET /IOUT; 20 < IOUT < 250 mA 129 135 145
KISET Fast charge current factor AΩ
RISET = KISET /IOUT; 5 < IOUT < 20 mA 125 135 145
PRECHARGE – SET BY PRETERM PIN
Pre-charge to fast-charge
VLOWV 2.4 2.5 2.6 V
transition threshold
Deglitch time on pre-charge to
tDGL1(LOWV) 57 μs
fast-charge transition
Deglitch time on fast-charge to
tDGL2(LOWV) 32 ms
pre-charge transition
IPRE-TERM Refer to the Termination Section
Pre-charge current, default VOUT < VLOWV; RISET = 2.7 kΩ; RPRE-TERM= High Z %IOUT-
18 20 22
%PRECHG setting or for BQ25101/101H CC

Pre-charge current formula RPRE-TERM = KPRE-CHG (Ω/%) × %PRE-CHG (%) RPRE-TERM/KPRE-CHG%

VOUT < VLOWV; VIN = 5 V;
RPRE-TERM = 6 kΩ to 30 kΩ;
RISET = 1.8 kΩ; 280 300 320 Ω/%
RPRE-TERM = KPRE-CHG × %IPRE-CHG,
where %IPRE-CHG is 20 to 100%
KPRE-CHG % Pre-charge Factor
VOUT < VLOWV; VIN = 5 V;
RPRE-TERM = 3 kΩ to 6 kΩ;
RISET = 1.8 kΩ; 265 300 340 Ω/%
RPRE-TERM = KPRE-CHG × %IPRE-CHG,
where %IPRE-CHG is 10% to 20%
TERMINATION – SET BY PRE-TERM PIN
Termination threshold current, VOUT > VRCH; RISET = 2.7 kΩ; RPRE-TERM = High Z %IOUT-
9 10 11
default setting or for BQ25101/101H CC
%TERM
Termination current threshold
RPRE-TERM = KTERM (Ω/%) × %TERM (%) RPRE-TERM/ KTERM
formula
VOUT > VRCH; VIN = 5 V;
RPRE-TERM = 6 kΩ to 30 kΩ;
575 600 640
RISET = 1.8 kΩ, RPRE-TERM=KTERM × %ITERM,
where %ITERM is 10 to 50%
VOUT > VRCH; VIN = 5 V;
RPRE-TERM = 3 kΩ to 6 kΩ ;
KTERM % Term factor 555 620 685 Ω/%
RISET = 1.8 kΩ, RPRE-TERM= KTERM × %ITERM,
where %ITERM is 5 to 10%
VOUT > VRCH; VIN = 5 V;
RPRE-TERM = 750 Ω to 3 kΩ;
352 680 1001
RISET = 1.8 kΩ, RPRE-TERM= KTERM × %ITERM,
where %ITERM is 1.25% to 5%
Current for programming the
term. and pre-chg with resistor,
IPRE-TERM RPRE-TERM = 6 kΩ; VOUT = 4.15 V 23 25 27 μA
ITerm-Start is the initial PRE-TERM
current
ITERM Termination current range Minimum absolute termination current 1 mA
%TERM Termination current formula RTERM/ KTERM %
Deglitch time, termination
tDGL(TERM) 29 ms
detected
RECHARGE OR REFRESH
VIN = 5 V; VTS = 0.5 V;
Recharge detection threshold – VOUT: 4.25 V → VRCH (bq25100); VO(REG) VO(REG)–0.0 VO(REG)–0.0
V
normal temp VOUT: 4.35 V → VRCH (bq25100A); –0.125 95 75
VRCH VOUT: 4.40 V → VRCH (bq25100H)
VIN = 5 V; VTS = 0.2 V;
Recharge detection threshold – VO_HT(REG) VO_HT(REG) VO_HT(REG)
VOUT: 4.15 V → VRCH (bq25100); V
hot temp –0.130 –0.105 –0.080
VOUT: 4.25 V → VRCH (bq25100H)
VIN = 5 V; VTS = 0.5 V;
Deglitch time, recharge threshold
tDGL1(RCH) VOUT: 4.25 V → 3.5V in 1 μs; 29 ms
detected
tDGL(RCH) is time to ISET ramp

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Electrical Characteristics (continued)

Over junction temperature range 0°C ≤ TJ ≤ 125°C and recommended supply voltage (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VIN = 5 V; VTS = 0.5 V;
Deglitch time, recharge threshold
tDGL2(RCH) VOUT = 3.5 V inserted; 29 ms
detected in OUT-Detect Mode
tDGL(RCH) is time to ISET ramp
BATTERY DETECT ROUTINE – (NOTE: In Hot mode VO(REG) becomes VO_HT(REG))
bq25100/101/bq25100H/101H; VO(REG)- VO(REG)- VO(REG)-
VOUT reduced regulation during VIN = 5 V; VTS = 0.5 V, Battery absent 0.450 0.400 0.350
VREG-BD V
battery detect bq25100A; VO(REG)- VO(REG)- VO(REG)-
VIN = 5 V; VTS = 0.5 V; Battery absent 0.550 0.500 0.450
IBD-SINK Sink current during VREG-BD VIN = 5 V; VTS = 0.5 V; Battery absent 2 mA
Regulation time at VREG or VREG-
tDGL(HI/LOW REG) VIN = 5 V; VTS = 0.5 V; Battery absent 25 ms
BD

VO(REG) - VO(REG)- VO(REG)-

VBD-HI High battery detection threshold VIN = 5 V; VTS = 0.5 V; Battery absent V
0.150 0.100 0.050
VREG-BD VREG-BD VREG-BD
VBD-LO Low battery detection threshold VIN = 5 V; VTS = 0.5 V; Battery absent V
+0.05 +0.1 +0.15
BATTERY CHARGING TIMERS AND FAULT TIMERS
Restarts when entering pre-charge;
tPRECHG Pre-charge safety timer value 1700 1940 2250 s
Always enabled when in pre-charge.
Clears fault or resets at UVLO, TS disable, OUT
tMAXCH Charge safety timer value 34000 38800 45000 s
Short, exiting LOWV and Refresh
BATTERY-PACK NTC MONITOR (see Note 1); TS pin: 10k NTC
INTC-10k NTC bias current VTS = 0.3 V 48.5 50.5 52.5 μA
10k NTC bias current when
INTC-DIS-10k VTS = 0 V 27 30 33 μA
charging is disabled
INTC is reduced prior to entering
INTC-FLDBK-10k TTDM to keep cold thermistor VTS: Set to 1.525 V 4 5 6.5 μA
from entering TTDM
Termination and timer disable
VTTDM(TS) VTS: 0.5 V → 1.7 V; Timer held in reset 1550 1600 1650 mV
mode Threshold – Enter
VHYS-TTDM(TS) Hysteresis exiting TTDM VTS: 1.7 V → 0.5 V; Timer enabled 100 mV
VCLAMP(TS) TS maximum voltage clamp VTS = Open (float) 1900 1950 2000 mV
Deglitch exit TTDM between
57 ms
states
tDGL(TTDM)
Deglitch enter TTDM between
8 μs
states
TS voltage where INTC is reduce INTC adjustment (90 to 10%; 45 to 6.6 uA) takes
VTS_I-FLDBK to keep thermistor from entering place near this spec threshold; 1475 mV
TTDM VTS: 1.425 V → 1.525 V
CTS Optional capacitance – ESD 0.22 μF
Low temp charging to pending;
VTS-0°C Low temperature CHG pending 1230 1255 1280 mV
VTS: 1 V → 1.5 V
At 0°C;
VHYS-0°C Hysteresis Charge pending to low temp charging; 100 mV
VTS: 1.5 V → 1 V
Normal charging to low temp charging;
VTS-10°C Low temperature, half charge 775 800 830 mV
VTS: 0.5 V → 1 V
At 10°C;
VHYS-10°C Hysteresis Low temp charging to normal CHG; 55 mV
VTS: 1 V → 0.5 V
At 4.1V (bq25100/101) or 4.2V (bq25100H/101H);
VTS-45°C High temperature Normal charging to high temp CHG; 253 268 283 mV
VTS: 0.5 V → 0.2 V
At 45°C;
VHYS-45°C Hysteresis High temp charging to normal CHG; 20 mV
VTS: 0.2 V → 0.5 V
bq25100/01/100H/101H/100L;
VTS-60°C High temperature disable High temp charge to pending; 160 170 180 mV
VTS: 0.2 V → 0.1 V
At 60°C (bq25100/01/100H/101H/100L);
VHYS-60°C Hysteresis Charge pending to high temp CHG; 20 mV
VTS: 0.1 V → 0.2 V

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Electrical Characteristics (continued)

Over junction temperature range 0°C ≤ TJ ≤ 125°C and recommended supply voltage (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Normal to cold operation; VTS: 0.6 V → 1 V 50
tDGL(TS_10C) Deglitch for TS thresholds: 10C ms
Cold to normal operation; VTS: 1 V → 0.6 V 12
Deglitch for TS thresholds:
tDGL(TS) Battery charging 30 ms
0/45/60C
Charge enable threshold, (10k
VTS-EN-10k VTS: 0 V → 0.175 V 84 92 100 mV
NTC)
HYS below VTS-EN-10k to disable,
VTS-DIS_HYS-10k VTS: 0.125 V → 0 V 12 mV
(10k NTC)
THERMAL REGULATION
TJ(REG) Temperature regulation limit 125 °C
TJ(OFF) Thermal shutdown temperature 155 °C
TJ(OFF-HYS) Thermal shutdown hysteresis 20 °C
LOGIC LEVELS ON /CHG
VOL Output low voltage ISINK = 5 mA 0.4 V
ILEAK Leakage current into IC V CHG = 5 V 1 μA

7.6 Typical Characteristics

Setup: Typical Applications Schematic; VIN = 5 V, VBAT = 3.6 V (unless otherwise noted)

VIN

VIN 2 V/div

2 V/div
VOUT 2 V/div

VOUT

2 V/div

IOUT 60 mA/div
IOUT 60 mA/div

VISET 1 V/div

t-time – 10 ms/div t-time – 20 ms/div

No Battery, No Load Hot Plug

Figure 3. Power Up Timing Figure 4. OVP 7-V Adaptor

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Typical Characteristics (continued)

Setup: Typical Applications Schematic; VIN = 5 V, VBAT = 3.6 V (unless otherwise noted)

VIN 2 V/div
VIN 2 V/div

VTS 500 mV/div

VOUT 2 V/div

IOUT 60 mA/div

IOUT 60 mA/div

VISET 1 V/div VISET 1 V/div

t-time – 50 ms/div t-time – 50 ms/div

VIN 0 V -5 V-7 V-5 V

Figure 5. OVP from Normal Power-Up Operation Figure 6. TS Enable and Disable

VIN 1 V/div

VIN 5 V/div

IOUT 60 mA/div

VOUT 2 V/div
VOUT 2 V/div

IOUT 100 mA/div

VISET 1 V/div
VISET 1 V/div

t-time – 5 ms/div t-time – 20 ms/div

VIN Regulated

Figure 7. DPM-Adaptor Current Limits Figure 8. Hot Plug Source with No Battery - Battery
Detection

VIN 5 V/div VIN 5 V/div

IOUT 100 mA/div

VOUT 2 V/div
VOUT 2 V/div

VISET 1 V/div VISET 1 V/div

IOUT 100 mA/div

t-time – 20 ms/div t-time – 200 μs/div

No Load

Figure 9. Battery Removal Figure 10. ISET Shorted During Normal Operation

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Typical Characteristics (continued)

Setup: Typical Applications Schematic; VIN = 5 V, VBAT = 3.6 V (unless otherwise noted)

VIN 5 V/div VIN 5 V/div

VOUT 5 V/div

VOUT 5 V/div

IOUT 100 mA/div IOUT 100 mA/div

VISET 1 V/div VISET 1 V/div

t-time – 10 ms/div t-time – 10 ms/div

20-Ω resistor at OUT, No input, VBAT = 3.7 V 20-Ω resistor at OUT, No input, VBAT = 3.7 V

Figure 11. Battery Plug In Figure 12. Battery Removal

VIN 2 V/div

VIN 2 V/div

VISET 2 V/div

VOUT 2 V/div
ILOAD 70 mA/div

IOUT 400 mA/div

VISET 1 V/div
IOUT 70 mA/div

t-time – 10 ms/div t-time – 10 ms/div

90-mA Load, 120-mA ICHG

Figure 13. ISET Short Prior to Power Up Figure 14. Power Up

4.21 4.202
VREG = 0qC
4.208 VREG = 25qC 4.201
4.206 VREG = 85qC
VREG = 125qC 4.2
Regulation Voltage (V)

Regulation Voltage (V)

4.204
4.202 4.199
VREG = 0qC
VREG = 25qC
4.2 4.198
VREG = 85qC
4.198 VREG = 125qC
4.197
4.196
4.196
4.194
4.192 4.195

4.19 4.194
1 mA 10 mA 50 mA 100 mA 150 mA 200 mA 250 mA 4.5 V 5V 5.5 V 6V 6.5 V
D001 D002
Load Current (mA) Input Voltage (V)

Figure 15. Load Regulation Over Temperature Figure 16. Line Regulation Over Temperature

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Typical Characteristics (continued)

Setup: Typical Applications Schematic; VIN = 5 V, VBAT = 3.6 V (unless otherwise noted)
80 6.4
112
IOUT (mA)
70 VOUT (V) 5.6
111
60 4.8

Output Current (mA)

Output Voltage (V)

Output Current (mA)

110 50 4

40 3.2
109
30 2.4
108
20 1.6
IO = 0qC
107 IO = 25qC 10 0.8
IO = 85qC
IO = 125qC 0 0
106
2.5 V 3V 3.5 V 4V 4.1 V
D004
D003
Output Voltage (V) bq25100 charge cycle, ICHG = 75 mA, VBAT_REG = 4.2 V

Figure 17. Current Regulation Over Temperature Figure 18. Battery Voltage vs Charge Current

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SLUSBV8C – AUGUST 2014 – REVISED NOVEMBER 2014 www.ti.com

8 Detailed Description

8.1 Overview
The bq2510x is a highly integrated family of single cell Li-Ion and Li-Pol chargers. The charger can be used to
charge a battery, power a system or both. The charger has three phases of charging: pre-charge to recover a
fully discharged battery, fast-charge constant current to supply the charge safely and voltage regulation to safely
reach full capacity. The charger is very flexible, allowing programming of the fast-charge current and Pre-
charge/Termination Current. This charger is designed to work with a USB connection (100-mA limit) or Adaptor
(DC output). The charger also checks to see if a battery is present.
The charger also comes with a full set of safety features: JEITA Temperature Standard
(bq25100/01/100H/101H), Over-Voltage Protection, DPM-IN, Safety Timers, and ISET short protection. All of
these features and more are described in detail below.
The charger is designed for a single power path from the input to the output to charge a single cell Li-Ion or
Li-Pol battery pack. Upon application of a 5-V DC power source the ISET and OUT short checks are performed
to assure a proper charge cycle.
If the battery voltage is below the LOWV threshold, the battery is considered discharged and a preconditioning
cycle begins. The amount of precharge current can be programmed using the PRE-TERM pin which programs a
percent of fast charge current (10 to 100%) as the precharge current. This feature is useful when the system load
is connected across the battery “stealing” the battery current. The precharge current can be set higher to account
for the system loading while allowing the battery to be properly conditioned. The PRE-TERM pin is a dual
function pin which sets the precharge current level and the termination threshold level. The termination "current
threshold" is always half of the precharge programmed current level.
Once the battery voltage has charged to the VLOWV threshold, fast charge is initiated and the fast charge
current is applied. The fast charge constant current is programmed using the ISET pin. The constant current
provides the bulk of the charge. Power dissipation in the IC is greatest in fast charge with a lower battery voltage.
If the IC reaches 125°C, the IC enters thermal regulation, slows the timer clock by half, and reduces the charge
current as needed to keep the temperature from rising any further. Figure 19 shows the charging profile with
thermal regulation. Typically under normal operating conditions, the IC’s junction temperature is less than 125°C
and thermal regulation is not entered.
Once the cell has charged to the regulation voltage the voltage loop takes control and holds the battery at the
regulation voltage until the current tapers to the termination threshold. The termination can be disabled if desired.
Further details are described in the Operating Modes section.

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Overview (continued)

Pre- Thermal Current Voltage Regulation and

Conditioning Regulation Regulation Charge Termination DONE
Phase Phase Phase Phase
VO(REG)

IO(OUT)

Battery Current,
FAST-CHARGE
I(OUT)
CURRENT
Battery
Voltage,
V(OUT) Charge
PRE-CHARGE Complete
CURRENT AND VO(LOWV) Status,
TERMINATION Charger
THRESHOLD Off

I(TERM)
IO(PRECHG)

T(THREG)
0A
Temperature, Tj

T(CHG) DONE
T(PRECHG)

Figure 19. Charging Profile With Thermal Regulation

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SLUSBV8C – AUGUST 2014 – REVISED NOVEMBER 2014 www.ti.com

8.2 Functional Block Diagram

Internal Charge
Current Sense
w/ Multiple Outputs
IN OUT
+ Input
- 80 mV
Power
Detect IN OUT
+ + _
OUT _ _ +
IN-DPMREF OUTREGREF
Charge
Pump
TJ
_
+

FAST CHARGE 125ÛCREF

PRE-CHARGE
ISET IN
_
1.5V +

PRE-CHG Reference

_
+
Internal Current 22mA Startup Current
Sensing Resistor Limit

Term Reference
+ TJ _
_ +
150ÛCREF
Charge
PA Thermal Shutdown
Pump
PRE-TERM
IN _
+
OVPREF
+
_

OUT
+
VTERM_EN _

CHARGE
CONTROL
VCOOL-10ÛC
_
+

_
VWARM-45ÛC +

VCOLD-0ÛC
_
+

_
VHOT-60ÛC +
LO=LDO MODE

TS

VLDO
+
_

+ HI=CHIP DISABLE
VDISABLE _
Cold Temperature Sink
Current Disable Sink
= 45PA Current = 20PA
VCLAMP=1.4V
+ +
_ _

5PA 45PA

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8.3 Feature Description

8.3.1 Overvoltage-Protection (OVP) – Continuously Monitored

If the input source applies an overvoltage, the pass FET, if previously on, turns off after a deglitch, tBLK(OVP). The
timer stops counting. Once the overvoltage returns to a normal voltage, the timer and charge continues.

8.3.2 CHG Pin Indication (bq25101, bq25101H)

The charge pin has an internal open drain FET which is on (pulls down to VSS) during the first charge only
(independent of TTDM) and is turned off once the battery reaches voltage regulation and the charge current
tapers to the termination threshold set by the PRE-TERM resistor. The bq25101/01H terminates at 10% of the
programmed charge current. The charge pin is high impedance in sleep mode and OVP and returns to its
previous state once the condition is removed. Cycling input power, removing and replacing the battery, pulling
the TS pin low and releasing or entering pre-charge mode causes the CHG pin to go reset (go low if power is
good and a discharged battery is attached) and is considered the start of a first charge.

8.3.3 CHG Pin LED Pull-up Source (bq25101, bq25101H)

For host monitoring, a pull-up resistor is used between the CHG pin and the VCC of the host and for a visual
indication a resistor in series with an LED is connected between the /CHG pin and a power source. If the CHG
source is capable of exceeding 7 V, a 6.2-V zener should be used to clamp the voltage. If the source is the OUT
pin, note that as the battery changes voltage, and the brightness of the LEDs vary.

8.3.4 IN-DPM (VIN-DPM or IN-DPM)

The IN-DPM feature is used to detect an input source voltage that is folding back (voltage dropping), reaching its
current limit due to excessive load. When the input voltage drops to the VIN-DPM threshold the internal pass FET
starts to reduce the current until there is no further drop in voltage at the input. This would prevent a source with
voltage less than VIN-DPM to power the out pin. This is an added safety feature that helps protect the source from
excessive loads. This feature is not applicable for bq25100A.

8.3.5 OUT
The Charger’s OUT pin provides current to the battery and to the system, if present. This IC can be used to
charge the battery plus power the system, charge just the battery or just power the system (TTDM) assuming the
loads do not exceed the available current. The OUT pin is a current limited source and is inherently protected
against shorts. If the system load ever exceeds the output programmed current threshold, the output will be
discharged unless there is sufficient capacitance or a charged battery present to supplement the excessive load.

8.3.6 ISET
An external resistor is used to Program the Output Current (10 to 250 mA) and can be used as a current monitor.
RISET = KISET ÷ IOUT (1)
Where:
IOUT is the desired fast charge current;
KISET is a gain factor found in the electrical specification
For greater accuracy at lower currents, part of the sense FET is disabled to give better resolution. Going from
higher currents to low currents, there is hysteresis and the transition occurs around 50 mA.
The ISET resistor is short protected and will detect a resistance lower than ≉420 Ω. The detection requires at
least 50 mA of output current. If a “short” is detected, then the IC will latch off and can be reset by cycling the
power or cycling TS pin. The OUT current is internally clamped to a maximum current of 600 mA typical and is
independent of the ISET short detection circuitry.
For charge current that is below 50 mA, an extra RC circuit is recommended on ISET to acheive more stable
current signal. More detail is available in 9.1 Application Information.

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Feature Description (continued)

60C 45C 10C 0C

Programmed VBAT_REG
No Operation
Reduced VBAT_REG During Cold Fault

Programmed ICHG
(100%)

50%

Cold Fault

0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8

VHOT VWARM VCOOL VCOLD Termination
Disable
TS Voltage-V
Figure 20. Operation Over TS Bias Voltage - bq25100, bq25100H, bq25101, bq25101H

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Feature Description (continued)

45C 10C 0C
Programmed VBAT_REG

Hot Fault No Operation

Charge Disable During Cold Fault

Programmed ICHG
(100%)

50%

Cold Fault

0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8

VHOT VWARM VCOOL VCOLD Termination
Disable
TS Voltage-V
Figure 21. Operation Over TS Bias Voltage – bq25100A

8.3.7 PRE_TERM – Pre-Charge and Termination Programmable Threshold

Pre-Term is used to program both the pre-charge current and the termination current threshold. The pre-charge
current level is a factor of two higher than the termination current level. The termination can be set between 5
and 50% (recommended range) of the programmed output current level set by ISET. If left floating the
termination and pre-charge are set internally at 10/20% respectively. The RPRE-TERM is ranged from 600 Ω to 30
kΩ and the minimum termination current can be programmed to 1 mA. The pre-charge-to-fast-charge, Vlowv
threshold is set to 2.5 V.
RPRE-TERM = %Term × KTERM = %Pre-CHG × KPRE-CHG (2)
Where:
%Term is the percent of fast charge current where termination occurs;
%Pre-CHG is the percent of fast charge current that is desired during precharge;
KTERM and KPRE-CHG are gain factors found in the electrical specifications.

8.3.8 TS
The TS function for the bq2510x family is designed to follow the new JEITA temperature standard
(bq25100/bq25100H/bq25101/bq25101H) for Li-Ion and Li-Pol batteries. There are now four thresholds, 60°C,
45°C, 10°C, and 0°C. Normal operation occurs between 10°C and 45°C. If between 0°C and 10°C the charge
current level is cut in half and if between 45°C and 60°C the regulation voltage is reduced to 4.1 V max for
bq25100 and 4.2 V max for bq25100H, see Figure 20. The TS function for the bq25100A cut the charge current
level in half between 0°C and 10°C and disables charging when the NTC temperature is above 45°C.

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Feature Description (continued)

The TS feature is implemented using an internal 50μA current source to bias the thermistor (designed for use
with a 10-k NTC β = 3370 (SEMITEC 103AT-2 or Mitsubishi TH05-3H103F) connected from the TS pin to VSS. If
this feature is not needed, a fixed 10-k can be placed between TS and VSS to allow normal operation. This may
be done if the host is monitoring the thermistor and then the host would determine when to pull the TS pin low to
disable charge.
The TS pin has two additional features, when the TS pin is pulled low or floated/driven high. A low disables
charge and a high puts the charger in TTDM.
Above 60°C (45°C for bq25100A) or below 0°C the charge is disabled. Once the thermistor reaches ≉–10°C the
TS current folds back to keep a cold thermistor (between –10°C and –50°C) from placing the IC in the TTDM
mode. If the TS pin is pulled low into disable mode, the current is reduce to ≉30 μA. Since the ITS curent is fixed
along with the temperature thresholds, it is not possible to use thermistor values other than the 10-k NTC (at
25°C).

8.3.9 Timers
The pre-charge timer is set to 30 minutes. The pre-charge current, can be programmed to off-set any system
load, making sure that the 30 minutes is adequate.
The fast charge timer is fixed at 10 hours and can be increased real time by going into thermal regulation or IN-
DPM. The timer clock slows by a factor of 2, resulting in a clock than counts half as fast when in these modes. If
either the 30 minute or ten hour timer times out, the charging is terminated and for bq25101/1H the CHG pin
goes high impedance if not already in that state. The timer is reset by disabling the IC, cycling power or going
into and out of TTDM.

8.3.10 Termination
Once the OUT pin goes above VRCH, (reaches voltage regulation) and the current tapers down to the
termination threshold, a battery detect route is run to determine if the battery was removed or the battery is full. If
the battery is present, the charge current will terminate. If the battery was removed along with the thermistor,
then the TS pin is driven high and the charge enters TTDM. If the battery was removed and the TS pin is held in
the active region, then the battery detect routine will continue until a battery is inserted. The termination current
can be programmed down to 625 uA, however, the accuracy will reduce acoordingly when the termination
current is below 1 mA.

8.4 Device Functional Modes

8.4.1 Power-Down or Undervoltage Lockout (UVLO)
The bq2510x family is in power down mode if the IN pin voltage is less than UVLO. The part is considered
“dead” and all the pins are high impedance. Once the IN voltage rises above the UVLO threshold the IC will
enter Sleep Mode or Active mode depending on the OUT pin (battery) voltage.

8.4.2 Power-up
The IC is alive after the IN voltage ramps above UVLO (see sleep mode), resets all logic and timers, and starts
to perform many of the continuous monitoring routines. Typically the input voltage quickly rises through the
UVLO and sleep states where the IC declares power good, starts the qualification charge at 22 mA, sets the
charge current base on the ISET pin, and starts the safety timer.

8.4.3 Sleep Mode

If the IN pin voltage is between VOUT+VDT and UVLO, the charge current is disabled, the safety timer counting
stops (not reset). As the input voltage rises and the charger exits sleep mode, the safety timer continues to count
and the charge is enabled. See Figure 22.

8.4.4 New Charge Cycle

A new charge cycle is started when a good power source is applied, performing a chip disable/enable (TS pin),
exiting Termination and Timer Disable Mode (TTDM), detecting a battery insertion or the OUT voltage dropping
below the VRCH threshold.
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Device Functional Modes (continued)

Apply Input
Power

Is power good? No
VBAT+VDT<VIN<VOVP
&VUVLO<VIN

Yes

Is chip enabled? No
VTS>VEN

Yes

Set Input Current Limit to 22mA

And Start Charge
Perform ISET & OUT short tests

Set charge current

based on ISET setting

Return to
Charge

Figure 22. bq2510x Power-Up Flow Diagram

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Device Functional Modes (continued)

8.4.5 Termination and Timer Disable Mode (TTDM) - TS Pin High
The battery charger is in TTDM when the TS pin goes high from removing the thermistor (removing battery
pack/floating the TS pin) or by pulling the TS pin up to the TTDM threshold.
When entering TTDM, the 10 hour safety timer is held in reset and termination is disabled. A battery detect
routine is run to see if the battery was removed or not. For bq25101/1H, if the battery was removed then the
CHG pin will go to its high impedance state if not already there. If a battery is detected the CHG pin does not
change states until the current tapers to the termination threshold, where the CHG pin goes to its high
impedance state if not already there (the regulated output will remain on).
The charging profile does not change (still has pre-charge, fast-charge constant current and constant voltage
modes). This implies the battery is still charged safely and the current is allowed to taper to zero.
When coming out of TTDM, the battery detect routine is run and if a battery is detected, then a new charge cycle
begins.
If TTDM is not desired upon removing the battery with the thermistor, one can add a 237-kΩ resistor between TS
and VSS to disable TTDM. This keeps the current source from driving the TS pin into TTDM. This creates ≉0.1°C
error at hot and a ≉3°C error at cold.

8.4.6 Battery Detect Routine

The battery detect routine should check for a missing battery while keeping the OUT pin at a useable voltage.
The battery detect routine is run when entering and exiting TTDM to verify if battery is present, or run all the time
if battery is missing and not in TTDM. On power-up, if battery voltage is greater than VRCH thereshold, a battery
detect routine is run to determine if a battery is present.
The battery detect routine is disabled while the IC is in TTDM, or has a TS fault. See Figure 23 for the Battery
Detect Flow Diagram.

8.4.7 Refresh Threshold

After termination, if the OUT pin voltage drops to VRCH (100mV below regulation) then a new charge is initiated.

8.4.8 Starting a Charge on a Full Battery

The termination threshold is raised by ≉14% for the first minute of a charge cycle so if a full battery is removed
and reinserted or a new charge cycle is initiated, that the new charge terminates (less than 1 minute). Batteries
that have relaxed many hours may take several minutes to taper to the termination threshold and terminate
charge.

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Device Functional Modes (continued)

Start
BATT_DETECT

Start 25ms timer

No
Timer Expired?

Yes

Yes Battery Present

Is VOUT<VREG-100mV? Turn off Sink Current
Return to flow

No

Set OUT REG

to VREG-400mV
Enable sink current
Reset & Start 25ms timer

No
Timer Expired?

Yes

Yes Battery Present

Is VOUT>VREG-300mV? Turn off Sink Current
Return to flow

No

Battery Absent
Don’t Signal Charge
Turn off Sink Current
Return to Flow

Figure 23. Battery Detect Routine

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9 Application and Implementation

NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.

9.1 Application Information

The bq2510x series of devices are highly integrated Li-Ion and Li-Pol linear chargers targeted at space-limited
portable applications. The fast charge current can be programmed from 10 mA to 250 mA through an external
resistor on ISET pin. The pre_charge and termination current can also be programmed through the resistor
connected on PRETERM pin. The device has complete system-level protection such as input under-voltage
lockout (UVLO), input over-voltage protection (OVP), sleep mode, thermal regulation, safety timers, and NTC
monitoring input.

9.2 Typical Application - Charger Application Design Example

SYSTEM
USB Port or
Adapter
VBUS IN OUT
D+ 1ÛF 1ÛF
D- VSS
GND PACK+
TEMP
TS
HOST
ISET

Optional 2.7kŸ 3.4kŸ

PRETERM PACK-
RC
10 nF
6kŸ
bq25100
CE

9.2.1 Design Requirements

• Supply voltage = 5 V
• Fast charge current: IOUT-FC = 40 mA;
• Termination Current Threshold: %IOUT-FC = 10% of Fast Charge or ~4 mA
• Pre-Charge Current by default is twice the termination Current or ~8 mA
• TS – Battery Temperature Sense = 10-k NTC (103AT)
• /CE is an open drain control pin

9.2.2 Detailed Design Procedures

• The regulation voltage is set to 4.2 V, the input voltage is 5 V and the charge current is programmed to 40
mA.
• For charge current that is below 50 mA, an extra RC circuit is recommended on ISET to acheive more stable
current signal. For applications that need higher charge current, the RC circuit is not needed.
• For applications that use more than 200-mA current, there could be a very low level ~1% of charge current
ringing in the output. The ringing can be removed by increasing the input capacitance.

22 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated

Product Folder Links: bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L

 bq25100, bq25101, bq25100A, bq25100H, bq25101H, bq25100L
www.ti.com SLUSBV8C – AUGUST 2014 – REVISED NOVEMBER 2014

Typical Application - Charger Application Design Example (continued)

9.2.2.1 Calculations

9.2.2.1.1 Program the Fast Charge Current, ISET:

RISET = [K(ISET) / I(OUT)]
from electrical characteristics table. . . K(SET) = 135 AΩ
RISET = [135 AΩ/0.04 A] = 3.4 kΩ
Selecting the closest standard value, use a 3.4-kΩ resistor between ISET and Vss.

9.2.2.1.2 Program the Termination Current Threshold, ITERM:

RPRE-TERM = K(TERM) × %IOUT-FC
RPRE-TERM = 600 Ω/% × 10% = 6 kΩ
Selecting the closest standard value, use a 6-kΩ resistor between PRETERM and Vss.
One can arrive at the same value by using 20% for a pre-charge value (factor of 2 difference).
RPRE-TERM = K(PRE-CHG) × %IOUT-FC
RPRE-TERM = 300 Ω/% × 20%= 6 kΩ

9.2.2.1.3 TS Function
Use a 10-k NTC thermistor in the battery pack (103AT).
To Disable the temp sense function, use a fixed 10-kΩ resistor between the TS and VSS.

9.2.2.1.4 Selecting IN and OUT Pin Capacitors

In most applications, all that is needed is a high-frequency decoupling capacitor (ceramic) on the power pin, input
and output pins. Using the values shown on the application diagram is recommended. After evaluation of these
voltage signals with real system operational conditions, one can determine if capacitance values can be adjusted
toward the minimum recommended values (DC load application) or higher values for fast, high amplitude, pulsed
load applications. Note if designed for high input voltage sources (bad adaptors or wrong adaptors), the capacitor
needs to be rated appropriately. Ceramic capacitors are tested to 2x their rated values so a 16-V capacitor may
be adequate for a 30-V transient (verify tested rating with capacitor manufacturer).

9.2.3 bq25100 Application Performance Plots

VIN

VIN 2 V/div

2 V/div VOUT 2 V/div

VOUT 2 V/div

IOUT 60 mA/div

IOUT 60 mA/div

VISET 1 V/div
VISET 1 V/div

t-time – 20 ms/div t-time – 50 ms/div

Hot Plug VIN 0 V -5 V-7 V-5 V

Figure 24. OVP 7-V Adaptor Figure 25. OVP from Normal Power-Up Operation

Copyright © 2014, Texas Instruments Incorporated Submit Documentation Feedback 23

Product Folder Links: bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L
bq25100, bq25101, bq25100A, bq25100H, bq25101H, bq25100L
SLUSBV8C – AUGUST 2014 – REVISED NOVEMBER 2014 www.ti.com

Typical Application - Charger Application Design Example (continued)

VIN 2 V/div

VIN 2 V/div

VTS 500 mV/div VISET 2 V/div

ILOAD 70 mA/div

IOUT 60 mA/div

VISET 1 V/div
IOUT 70 mA/div

t-time – 50 ms/div t-time – 10 ms/div

90-mA Load, 120-mA IOUT

Figure 26. TS Enable and Disable Figure 27. Power Up

10 Power Supply Recommendations

10.1 Leakage Current Effects on Battery Capacity

To determine how fast a leakage current on the battery will discharge the battery is an easy calculation. The time
from full to discharge can be calculated by dividing the Amp-Hour Capacity of the battery by the leakage current.
For a 0.1-AHr battery and a 75-nA leakage current (100mAHr/75nA = 250000 Hours), it would take 1333k hours
or 152 years to discharge. In reality the self discharge of the cell would be much faster so the 75-nA leakage
would be considered negligible.

11 Layout

11.1 Layout Guidelines

To obtain optimal performance, the decoupling capacitor from IN to GND and the output filter capacitors from
OUT to GND should be placed as close as possible to the bq2510x, with short trace runs to both IN, OUT and
GND.
• All low-current GND connections should be kept separate from the high-current charge or discharge paths
from the battery. Use a single-point ground technique incorporating both the small signal ground path and the
power ground path.
• The high current charge paths into IN pin and from the OUT pin must be sized appropriately for the maximum
charge current in order to avoid voltage drops in these traces

24 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated

Product Folder Links: bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L

 bq25100, bq25101, bq25100A, bq25100H, bq25101H, bq25100L
www.ti.com SLUSBV8C – AUGUST 2014 – REVISED NOVEMBER 2014

11.2 Layout Example

Figure 28. Board Layout

11.3 Thermal Package

The most common measure of package thermal performance is thermal impedance (θJA ) measured (or
modeled) from the chip junction to the air surrounding the package surface (ambient). The mathematical
expression for θJA is:
θJA = (TJ – T) / P (3)
Where:
TJ = chip junction temperature
T = ambient temperature
P = device power dissipation
Factors that can influence the measurement and calculation of θJA include:
1. Whether or not the device is board mounted
2. Trace size, composition, thickness, and geometry
3. Orientation of the device (horizontal or vertical)
4. Volume of the ambient air surrounding the device under test and airflow
5. Whether other surfaces are in close proximity to the device being tested
Due to the charge profile of Li-Ion and Li-Pol batteries the maximum power dissipation is typically seen at the
beginning of the charge cycle when the battery voltage is at its lowest. Typically after fast charge begins the pack
voltage increases to ≉3.4 V within the first 2 minutes. The thermal time constant of the assembly typically takes a
few minutes to heat up so when doing maximum power dissipation calculations, 3.4 V is a good minimum voltage
to use.
The device power dissipation, P, is a function of the charge rate and the voltage drop across the internal
PowerFET. It can be calculated from the following equation when a battery pack is being charged :
P = [V(IN) – V(OUT)] × I(OUT) (4)

Copyright © 2014, Texas Instruments Incorporated Submit Documentation Feedback 25

Product Folder Links: bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L
bq25100, bq25101, bq25100A, bq25100H, bq25101H, bq25100L
SLUSBV8C – AUGUST 2014 – REVISED NOVEMBER 2014 www.ti.com

Thermal Package (continued)

The thermal loop feature reduces the charge current to limit excessive IC junction temperature. It is
recommended that the design not run in thermal regulation for typical operating conditions (nominal input voltage
and nominal ambient temperatures) and use the feature for non typical situations such as hot environments or
higher than normal input source voltage. With that said, the IC will still perform as described, if the thermal loop
is always active.

12 Device and Documentation Support

12.1 Device Support

12.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.

12.2 Related Links

The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.

Table 1. Related Links

TECHNICAL TOOLS & SUPPORT &
PARTS PRODUCT FOLDER SAMPLE & BUY
DOCUMENTS SOFTWARE COMMUNITY
bq25100 Click here Click here Click here Click here Click here
bq25101 Click here Click here Click here Click here Click here
bq25100A Click here Click here Click here Click here Click here
bq25100H Click here Click here Click here Click here Click here
bq25101H Click here Click here Click here Click here Click here
bq25100L Click here Click here Click here Click here Click here

12.3 Trademarks
Bluetooth is a registered trademark of Bluetooth SIG, Inc..
12.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.

12.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.

13 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

26 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated

Product Folder Links: bq25100 bq25101 bq25100A bq25100H bq25101H bq25100L

 PACKAGE OPTION ADDENDUM

www.ti.com 10-Dec-2020

PACKAGING INFORMATION

Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)

BQ25100AYFPR ACTIVE DSBGA YFP 6 3000 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 85 25100A

BQ25100AYFPT ACTIVE DSBGA YFP 6 250 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 85 25100A

BQ25100HYFPR ACTIVE DSBGA YFP 6 3000 RoHS & Green SNAGCU Level-1-260C-UNLIM 0 to 125 25100H

BQ25100HYFPT ACTIVE DSBGA YFP 6 250 RoHS & Green SNAGCU Level-1-260C-UNLIM 0 to 125 25100H

BQ25100YFPR ACTIVE DSBGA YFP 6 3000 RoHS & Green SNAGCU Level-1-260C-UNLIM 0 to 125 25100

BQ25100YFPT ACTIVE DSBGA YFP 6 250 RoHS & Green SNAGCU Level-1-260C-UNLIM 0 to 125 25100

BQ25101HYFPR ACTIVE DSBGA YFP 6 3000 RoHS & Green SNAGCU Level-1-260C-UNLIM 0 to 125 25101H

BQ25101HYFPT ACTIVE DSBGA YFP 6 250 RoHS & Green SNAGCU Level-1-260C-UNLIM 0 to 125 25101H

BQ25101YFPR ACTIVE DSBGA YFP 6 3000 RoHS & Green SNAGCU Level-1-260C-UNLIM 0 to 125 25101

BQ25101YFPT ACTIVE DSBGA YFP 6 250 RoHS & Green SNAGCU Level-1-260C-UNLIM 0 to 125 25101

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.

(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

Addendum-Page 1
 PACKAGE OPTION ADDENDUM

www.ti.com 10-Dec-2020

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 2
 PACKAGE MATERIALS INFORMATION

www.ti.com 23-Dec-2024

TAPE AND REEL INFORMATION

REEL DIMENSIONS TAPE DIMENSIONS

K0 P1

B0 W
Reel
Diameter
Cavity A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
W Overall width of the carrier tape
P1 Pitch between successive cavity centers

Reel Width (W1)

QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE

Sprocket Holes

Q1 Q2 Q1 Q2

Q3 Q4 Q3 Q4 User Direction of Feed

Pocket Quadrants

*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
BQ25100AYFPR DSBGA YFP 6 3000 180.0 8.4 0.98 1.68 0.59 4.0 8.0 Q1
BQ25100AYFPT DSBGA YFP 6 250 180.0 8.4 0.98 1.68 0.59 4.0 8.0 Q1
BQ25100HYFPR DSBGA YFP 6 3000 180.0 8.4 0.98 1.68 0.59 4.0 8.0 Q1
BQ25100HYFPT DSBGA YFP 6 250 180.0 8.4 0.98 1.68 0.59 4.0 8.0 Q1
BQ25100YFPR DSBGA YFP 6 3000 180.0 8.4 0.98 1.68 0.59 4.0 8.0 Q1
BQ25100YFPT DSBGA YFP 6 250 180.0 8.4 0.98 1.68 0.59 4.0 8.0 Q1
BQ25101HYFPR DSBGA YFP 6 3000 180.0 8.4 0.98 1.68 0.59 4.0 8.0 Q1
BQ25101HYFPT DSBGA YFP 6 250 180.0 8.4 0.98 1.68 0.59 4.0 8.0 Q1
BQ25101YFPR DSBGA YFP 6 3000 180.0 8.4 0.98 1.68 0.59 4.0 8.0 Q1
BQ25101YFPT DSBGA YFP 6 250 180.0 8.4 0.98 1.68 0.59 4.0 8.0 Q1

Pack Materials-Page 1
 PACKAGE MATERIALS INFORMATION

www.ti.com 23-Dec-2024

TAPE AND REEL BOX DIMENSIONS

Width (mm)
H
W

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
BQ25100AYFPR DSBGA YFP 6 3000 182.0 182.0 20.0
BQ25100AYFPT DSBGA YFP 6 250 182.0 182.0 20.0
BQ25100HYFPR DSBGA YFP 6 3000 182.0 182.0 20.0
BQ25100HYFPT DSBGA YFP 6 250 182.0 182.0 20.0
BQ25100YFPR DSBGA YFP 6 3000 182.0 182.0 20.0
BQ25100YFPT DSBGA YFP 6 250 182.0 182.0 20.0
BQ25101HYFPR DSBGA YFP 6 3000 182.0 182.0 20.0
BQ25101HYFPT DSBGA YFP 6 250 182.0 182.0 20.0
BQ25101YFPR DSBGA YFP 6 3000 182.0 182.0 20.0
BQ25101YFPT DSBGA YFP 6 250 182.0 182.0 20.0

Pack Materials-Page 2
 PACKAGE OUTLINE
YFP0006 SCALE 10.000
DSBGA - 0.5 mm max height
DIE SIZE BALL GRID ARRAY

B E A

BALL A1
CORNER

C
0.5 MAX

SEATING PLANE
0.19
0.13 BALL TYP
0.05 C

0.4
TYP
SYMM

D: Max = 1.608 mm, Min =1.547 mm

0.8
TYP B SYMM
E: Max = 0.91 mm, Min = 0.85 mm

0.4 TYP

A
0.25
6X
0.21 1 2
0.015 C A B

4223410/A 11/2016

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.

www.ti.com
 EXAMPLE BOARD LAYOUT
YFP0006 DSBGA - 0.5 mm max height
DIE SIZE BALL GRID ARRAY

(0.4) TYP

6X ( 0.23)
1 2

(0.4) TYP

B SYMM

SYMM

LAND PATTERN EXAMPLE

SCALE:50X

( 0.23) 0.05 MAX 0.05 MIN METAL UNDER

METAL SOLDER MASK

SOLDER MASK ( 0.23)

OPENING SOLDER MASK
OPENING
NON-SOLDER MASK SOLDER MASK
DEFINED DEFINED
(PREFERRED)

SOLDER MASK DETAILS

NOT TO SCALE
4223410/A 11/2016

NOTES: (continued)

3. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints.
For more information, see Texas Instruments literature number SNVA009 (www.ti.com/lit/snva009).

www.ti.com
 EXAMPLE STENCIL DESIGN
YFP0006 DSBGA - 0.5 mm max height
DIE SIZE BALL GRID ARRAY

(0.4) TYP

6X ( 0.25) (R0.05) TYP

1 2

(0.4) TYP

B SYMM

METAL
TYP

SYMM

SOLDER PASTE EXAMPLE

BASED ON 0.1 mm THICK STENCIL
SCALE:50X

4223410/A 11/2016

NOTES: (continued)

4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.

www.ti.com
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