COMPUTER ARCHITECTURE AND ORGANIZATION

A Practical Lab Sheet

Submitted To The Department Of BICTE, Janajyoti Multiple Campus,

Lalbandi, Sarlahi,

In the partial fulfillment of Requirements for the

Bachelor OF EDUCATION

In

Information and Communication Technology

(BICTE) …… Semester

Subject: ……

Submitted By:

Name: ..............

Symbol no: ..................

Roll No: ................

Janajoti multipal Campus,

Lalbandi, Sarlahi,

Nepal.

Baishak,2082
 APPROVAL SHEET

This …………………………….. submitted by ……………………………………………… in partial fulfillment of the

requirements for the Degree of ………………………………………………………..has been approved.

Viva Committee: Signature

Mr…………………………….. ……………………………

(HOD)

Mr…………………………………………. ............................................

(Internal Examiner)

Mr. ………………………………………… ............................................

(External Examiner)

Date: …………………….., ……………………

 Table of content
S.N Experiment Name Submission Page Sign.
Date No.
Lab Report 1:
Representation of Numbers and Overflow Detection
Objective:

Write a program to visualize the representation of complement numbers, integers, floating-point

numbers, character data, and detect overflow while adding integers.

Algorithm:

1. Input an 8-bit integer and compute its 2’s complement.

2. Display an integer and its binary form.

3. Represent a floating-point number (simplified mantissa/exponent).

4. Convert a character to its ASCII binary form.

5. Add two integers and check for overflow (carry flag).

Program Code: (Using 8085 Assembly)

Tools Used: 8085 Simulator IDE

; 2’s Complement and Overflow Detection

LXI H, 2050H ; Load first number address

MOV A, M ; Move number to A

CMA ; 1’s complement

INR A ; 2’s complement

INX H ; Result location

MOV M, A ; Store complement

INX H ; Second number address

MOV B, M ; Load second number

ADD B ; Add to check overflow

JC OVERFLOW ; Jump if carry (overflow)

INX H ; Result location

MOV M, A ; Store sum

HLT ; Halt

OVERFLOW:
 MVI A, FFH ; Indicate overflow

INX H ; Result location

MOV M, A ; Store FFH

HLT ; Halt

; Memory:

; 2050H: 05H (5)

; 2051H: Result (FBH)

; 2052H: FAH (250)

; 2053H: Sum or FFH (overflow)

```

Output:

- Input: 2050H = 05H (00000101), 2052H = FAH (11111010)

- 2’s Complement: 2051H = FBH (11111011)

- Sum: 2053H = FFH (overflow detected)

Conclusion:

The program successfully demonstrates 2’s complement representation and detects overflow when
adding two 8-bit integers (e.g., 5 + 250 exceeds 255). Floating-point and character representation can be
visualized manually from binary outputs.

Lab Report 2: Circuit Design of Basic Computer

Objective:

Design a basic computer circuit using a simulator to understand its components (e.g., ALU, registers,
control unit).

Tools Used: Logisim

Algorithm:
1. Define components: PC, IR, ALU, Accumulator, Memory.

2. Connect components with buses (data, address, control).

3. Simulate instruction fetch and execution (e.g., ADD operation).

Components:
- PC (Program Counter): 4-bit register.

- IR (Instruction Register): 8-bit register.

- ALU: 8-bit adder.

- Memory: 16x8 RAM.

- Control Unit: Hardwired logic (AND/OR gates for signals).

Connections:
- PC → Memory Address Input.

- Memory Data Output → IR.

- IR Opcode → Control Unit.

- ALU Output → Accumulator.

Output:
- Simulated ADD operation: Input (5 + 3) → ALU → Accumulator = 8.

- Screenshot: [Attach Logisim circuit screenshot].

Conclusion:
The basic computer design illustrates how registers, ALU, and control signals interact to execute
instructions. Logisim effectively simulates this process.
Lab Report 3: Illustrate Fetch, Decode, and Execute Instructions

Objective:
Write a program to simulate the fetch, decode, and execute phases of an instruction cycle.

Tools Used: EMU8086

Algorithm:
1. Fetch instruction from memory using PC.

2. Decode opcode to determine operation.

3. Execute by performing the operation (e.g., addition).

4. Store result and halt.

Program Code:

.MODEL TINY

.CODE

ORG 100H

START:

MOV SI, 2050H ; PC points to instruction

MOV AL, [SI] ; Fetch first number

INC SI ; Next address

ADD AL, [SI] ; Decode & Execute: Add second number

INC SI ; Result location

MOV [SI], AL ; Store result

MOV AH, 4CH ; Exit

INT 21H

END START
; Memory:

; 2050H: 04H

; 2051H: 06H

; 2052H: Result (0AH)

Output:
Input: 2050H = 04H, 2051H = 06H

- Result: 2052H = 0AH

Conclusion:
The program simulates the instruction cycle, showing how fetch (SI), decode (implicit in ADD), and
execute (ALU operation) work in 8086.

Lab Report 4: Use of Different Addressing Modes

Objective:
Write a program to illustrate immediate, direct, register, and indirect addressing modes.

Algorithm:
1. Use immediate mode to load a constant.

2. Use direct mode to access memory.

3. Use register mode to manipulate data.

4. Use indirect mode via a pointer.

Program Code:
.MODEL TINY

.CODE

ORG 100H

START:

MOV AX, 05H ; Immediate: Load 5

 MOV BX, [2050H] ; Direct: Load from memory

ADD AX, BX ; Register: Add BX to AX

MOV SI, 2051H ; Indirect: SI as pointer

MOV [SI], AX ; Store result via SI

MOV AH, 4CH ; Exit

INT 21H

END START

; Memory:

; 2050H: 03H

; 2051H: Result (08H)

Output:
- Input: AX = 05H, 2050H = 03H

- Result: 2051H = 08H

Conclusion:
The program demonstrates four addressing modes in 8086, showing their practical use in data
manipulation.

Lab Report 5: Case Study - Array and Vector Processors

Objective:
Study array and vector processors and their application domains.

Content:
- Array Processors: Multiple ALUs process data in parallel (e.g., SIMD). Example: GPUs like NVIDIA CUDA.

- Vector Processors: Single instruction operates on vectors (e.g., Cray-1).

- Applications:
 - Array: Image processing, machine learning.

- Vector: Scientific simulations, weather forecasting.

- Comparison: Array processors excel in massive parallelism; vector processors handle large data sets
efficiently.

Output:

- Diagram: [Sketch of SIMD vs. vector architecture].

Conclusion:

Array and vector processors enhance performance in data-intensive tasks, with distinct use cases in
modern computing.

Lab Report 6: Simulate Instruction and Arithmetic Pipeline

Objective:
Write a program to simulate instruction and arithmetic pipelines.

Tools Used: C Compiler

Algorithm:
1. Define stages: Fetch, Decode, Execute.

2. Simulate overlapped execution of instructions.

3. Perform arithmetic (addition) in stages.

Program Code:
#include <stdio.h>

int main() {

int stage[3] = {0}; // Fetch, Decode, Execute

int instructions[3] = {5, 3, 2}; // Sample data

for (int i = 0; i < 5; i++) {

printf("Cycle %d: ", i + 1);

 if (i >= 2) stage[2] = stage[1] + instructions[i - 2]; // Execute

if (i >= 1) stage[1] = instructions[i - 1]; // Decode

stage[0] = instructions[i]; // Fetch

printf("F:%d D:%d E:%d\n", stage[0], stage[1], stage[2]);

return 0;

Output:
Cycle 1: F:5 D:0 E:0

Cycle 2: F:3 D:5 E:0

Cycle 3: F:2 D:3 E:8

Cycle 4: F:0 D:2 E:8

Cycle 5: F:0 D:0 E:5

Conclusion:

The program simulates a 3-stage pipeline, showing how instructions overlap to improve throughput.

Lab Report 7: Implement Algorithms in High-Level Language

Objective:
Implement algorithms (e.g., Booth’s multiplication) in a high-level language.

Algorithm:
1. Input multiplicand and multiplier.

2. Apply Booth’s algorithm steps (add/subtract based on bits).

3. Shift and repeat for n bits.

Program Code: (C - Booth’s Algorithm)

#include <stdio.h>

void booths(int m, int q) {

int n = 4, A = 0, Q = q, M = m, Q_1 = 0;

for (int i = 0; i < n; i++) {

if ((Q & 1) == 0 && Q_1 == 1) A += M; // 01

else if ((Q & 1) == 1 && Q_1 == 0) A -= M; // 10

Q_1 = Q & 1; // Save last bit

Q = (Q >> 1) | ((A & 1) << 3); // Shift

A = A >> 1;

printf("Result: %d\n", (A << 4) | Q);

int main() {

booths(3, 2); // Example: 3 2 = 6

return 0;

Output:
- Result: 6

Conclusion:

Booth’s algorithm was successfully implemented in C, demonstrating binary multiplication.

Lab Report 8: Case Study - USB

Objective:

Study the Universal Serial Bus (USB) and its applications.

Content:

- Overview: USB is a standard for connecting peripherals (e.g., mouse, keyboard).

- Architecture: Host, hub, device; uses serial communication.

- Versions: USB 1.0 (1.5 Mbps), USB 2.0 (480 Mbps), USB 3.0 (5 Gbps).
- Applications: Data transfer, power delivery (e.g., USB-C).

Output:

- Diagram: [USB topology sketch].

Conclusion:

USB’s versatility makes it a cornerstone of modern device connectivity.

Lab Report 9: Simulate Associative Memory

Objective:
Write a program to simulate associative memory (key-value pair mapping).

Algorithm:
1. Define an array for keys and values.

2. Search for a key and return its value.

3. Display result.

Program Code:
#include <stdio.h>

int main() {

int keys[] = {1, 2, 3}, values[] = {10, 20, 30}, key = 2;

for (int i = 0; i < 3; i++) {

if (keys[i] == key) {

printf("Value for key %d: %d\n", key, values[i]);

return 0;

printf("Key not found\n");

return 0;
}

Output:

- Value for key 2: 20

Conclusion:

The program simulates content-addressable memory, retrieving values by keys efficiently.

Lab Report 10: Simulate Cache Coherence Problem and Solution

Objective:
Simulate the cache coherence problem and implement a solution (e.g., MESI protocol).

Algorithm:
1. Simulate two caches with shared memory.

2. Update one cache and check inconsistency.

3. Apply a simple coherence mechanism (e.g., invalidate).

Program Code:

#include <stdio.h>

int main() {

int memory = 5, cache1 = 5, cache2 = 5;

printf("Initial: Mem=%d, C1=%d, C2=%d\n", memory, cache1, cache2);

cache1 = 10; // Update cache1

printf("Incoherent: Mem=%d, C1=%d, C2=%d\n", memory, cache1, cache2);

cache2 = cache1; // Invalidate and update cache2

memory = cache1; // Write back to memory

printf("Coherent: Mem=%d, C1=%d, C2=%d\n", memory, cache1, cache2);

 return 0;

Output:

Initial: Mem=5, C1=5, C2=5

Incoherent: Mem=5, C1=10, C2=5

Coherent: Mem=10, C1=10, C2=10

Conclusion:

The program simulates cache incoherence and resolves it by updating all caches and memory, mimicking
a simple coherence protocol.

Notes for Submission:

- Screenshots: Include simulator outputs (e.g., 8085 memory, EMU8086 registers) where applicable.

- Diagrams: Draw block diagrams (e.g., for circuit design, USB topology) manually or using tools like
Paint.

- Customization: Adjust memory addresses or input values as per your lab setup.

- Tools: Specify the exact simulator version (e.g., “8085 Simulator v2.0”) in your report.