Sierra Wireless HL7810 1105043 - C5757335
Sierra Wireless HL7810 1105043 - C5757335
41114133
Rev. 8
Product Technical Specification
Important Due to the nature of wireless communications, transmission and reception of data can
Notice never be guaranteed. Data may be delayed, corrupted (i.e., have errors) or be totally lost.
Although significant delays or losses of data are rare when wireless devices such as the
Sierra Wireless product are used in a normal manner with a well-constructed network, the
Sierra Wireless product should not be used in situations where failure to transmit or
receive data could result in damage of any kind to the user or any other party, including
but not limited to personal injury, death, or loss of property. Sierra Wireless accepts no
responsibility for damages of any kind resulting from delays or errors in data transmitted
or received using the Sierra Wireless product, or for failure of the Sierra Wireless product
to transmit or receive such data.
Safety and Do not operate the Sierra Wireless product in areas where blasting is in progress, where
Hazards explosive atmospheres may be present, near medical equipment, near life support
equipment, or any equipment which may be susceptible to any form of radio interference.
In such areas, the Sierra Wireless product MUST BE POWERED OFF. The Sierra
Wireless product can transmit signals that could interfere with this equipment.
Do not operate the Sierra Wireless product in any aircraft, whether the aircraft is on the
ground or in flight. In aircraft, the Sierra Wireless product MUST BE POWERED OFF.
When operating, the Sierra Wireless product can transmit signals that could interfere with
various onboard systems.
Note: Some airlines may permit the use of cellular phones while the aircraft is on the ground and
the door is open. Sierra Wireless products may be used at this time.
The driver or operator of any vehicle should not operate the Sierra Wireless product while
in control of a vehicle. Doing so will detract from the driver or operator’s control and
operation of that vehicle. In some states and provinces, operating such communications
devices while in control of a vehicle is an offence.
Limitation of The information in this manual is subject to change without notice and does not represent
Liability a commitment on the part of Sierra Wireless. SIERRA WIRELESS AND ITS AFFILIATES
SPECIFICALLY DISCLAIM LIABILITY FOR ANY AND ALL DIRECT, INDIRECT,
SPECIAL, GENERAL, INCIDENTAL, CONSEQUENTIAL, PUNITIVE OR EXEMPLARY
DAMAGES INCLUDING, BUT NOT LIMITED TO, LOSS OF PROFITS OR REVENUE OR
ANTICIPATED PROFITS OR REVENUE ARISING OUT OF THE USE OR INABILITY TO
USE ANY SIERRA WIRELESS PRODUCT, EVEN IF SIERRA WIRELESS AND/OR ITS
AFFILIATES HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES OR
THEY ARE FORESEEABLE OR FOR CLAIMS BY ANY THIRD PARTY.
Notwithstanding the foregoing, in no event shall Sierra Wireless and/or its affiliates
aggregate liability arising under or in connection with the Sierra Wireless product,
regardless of the number of events, occurrences, or claims giving rise to liability, be in
excess of the price paid by the purchaser for the Sierra Wireless product.
Patents This product may contain technology developed by or for Sierra Wireless Inc. This product
includes technology licensed from QUALCOMM®. This product is manufactured or sold by
Sierra Wireless Inc. or its affiliates under one or more patents licensed from MMP
Portfolio Licensing.
Trademarks Sierra Wireless®, AirLink®, AirVantage® and the Sierra Wireless logo are registered
trademarks of Sierra Wireless.
Windows® and Windows Vista® are registered trademarks of Microsoft Corporation.
Macintosh® and Mac OS X® are registered trademarks of Apple Inc., registered in the
U.S. and other countries.
QUALCOMM® is a registered trademark of QUALCOMM Incorporated. Used under
license.
Other trademarks are the property of their respective owners.
Contact
Information
Sales information and technical Web: sierrawireless.com/company/contact-us/
support, including warranty and returns Global toll-free number: 1-877-687-7795
6:00 am to 5:00 pm PST
Revision
History
2: Pad Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2.1 Pin Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
2.2 Pad Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3: Power Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.1 Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.2 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.2.1 Digital I/O Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.3 3GPP Power Saving Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.3.1 Power Saving Mode (PSM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.3.2 Extended DRX (eDRX) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
3.4 HL781x Low Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
3.5 Current Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33
5: Mechanical Drawings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
6: Design Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
6.1 Power Supply Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
6.2 UIM1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
6.3 USB Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
6.4 ESD Protection for I/Os . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
6.5 Hibernate—Isolation Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
6.5.1 VGPIO Monitoring and Buffer Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
6.6 Radio Frequency Integration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
6.6.1 Antenna Matching Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
6.6.2 RF Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
7: Reliability Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
7.1 Preconditioning Test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
7.2 Performance Test . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
7.3 Aging Tests . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
7.4 Characterization Tests . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
8: Legal Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
8.1 Disposing of the Product . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
8.2 Compliance Acceptance and Certification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
8.3 Regulatory and Industry Approvals/ Certifications . . . . . . . . . . . . . . . . . . . . . . . . . 78
8.4 Japan Radio and Telecom Approval . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
8.5 Important Compliance Information for North American Users . . . . . . . . . . . . . . . . 79
8.6 Legal Information – Taiwan NCC Statement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
9: Appendix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
9.1 Website Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
9.2 Reference Documents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
9.3 Terms and Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
9.4 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Note: Sierra Wireless modules are shipped factory-programmed with industry or mobile
operator approved firmware, according to the specific SKU ordered. Periodically, newer
firmware versions become available and can include new features, bug fixes, or critical security
updates. Sierra Wireless strongly recommends that customers establish their own production
capability for updating module firmware on their assembled end platform, in the event that a
newer firmware must be installed before deployment. Sierra Wireless also recommends
customers design their products to support post-deployment FOTA upgrades using the
AirVantage cloud platform.
Note: The Sierra Wireless eSIM is SKU-dependent and not included in all modules. Contact
Sierra Wireless for details.
a. To ensure FCC compliance near NB band edges, Cat-NB2 supported TX channel ranges do not include outer channels. Sup-
ported channel ranges are:
• B2: 18602–19198 • B4: 19952–20398 • B5: 20402–20648 • B12: 23012–23178
• B13: 23182–23278 • B25: 26042–26688 • B26: 26692–27038 • B66: 131974 - 132670
• B85: 134004–134179
All electrical and mechanical connections to the HL781x module are made through
the 86 Land Grid Array (LGA) pads on the bottom side of the PCB.
Small form factor (86-pad solderable LGA pad). See Physical Dimensions and Connection
Interface for details.
Physical Metal shield can
RF connection pads (RF_MAIN and RF_GNSS)
Baseband signals connection
1.8V support
SIM extraction / hot plug detection
SIM interface SIM/USIM support
Conforms with ETSI UICC Specifications
Supports SIM application tool kit with proactive UICC commands
2G (HL7812 only)
• GPRS Class 10
Cat-M1
• 3GPP Rel. 14:
• Up to 1100 kbit/s UL, 590 kbit/s DL
• HARQ-ACK bundling in HD-FDD
• 10 DL HARQ processes
• Faster frequency returning
• Release Assistance Indication
• Half-duplex
• Channel bandwidth—1.4 MHz
• LTE carrier bandwidth—1.4/3/5/10 /15/20 MHz
• Extended Coverage Mode A
• PSM (Power Save Mode)
• I-DRX (Idle Mode Discontinuous Reception)
• C-DRX (Connected Mode Discontinuous Reception)
• Idle mode mobility
• Connected mode mobility
• eDRX (Extended Discontinuous Reception)
• Control Plane CIoT Optimization (Data over NAS)
NB-IoT
Protocol stack • 3GPP Rel. 14:
• Up to 158 kbit/s UL, 127 kbit/s DL
• 2 HARQ processes
• Release Assistance Indication
• Long DRX values with regular wake-up cycle)
• Cat-NB2
• Half-duplex
• Channel bandwidth—180 kHz
• LTE carrier bandwidth—1.4/3/5/10 /15/20 MHz
• Operational mode—In-band, Guard band, Standalone
• Control Plane CIoT Optimization (Data over NAS)
• NIDD over SGi tunneling
• NIDD over SCEF
• Extended coverage
• PSM (Power Save Mode)
• I-DRX (Idle Mode Discontinuous Reception)
• C-DRX (Connected Mode Discontinuous Reception)
• Idle mode mobility
• eDRX (Extended Discontinuous Reception)
Flexible selection
• Manual system selection across RATs
• Dynamic system selection across RATs (preferred RAT)
1.5 Architecture
Figure 1-2 presents an overview of the HL781x's internal architecture and external
interfaces.
1.6 Interfaces
The HL781x provides the following interfaces and peripheral connectivity:
• (1) VGPIO (1.8V)— See VGPIO
• (1) 1.8V USIM— See USIM Interface
• (1) USB 2.0 FS— See USB Interface.
• (12) GPIOs— See General Purpose Input/Output (GPIO).
• (1) 8-wire UART— See Main Serial Link (UART1).
• (1) Active low power on signal (will be available in a future firmware release)—
See Power On Signal (POWER_ON_N).
• (1) Active low reset signal— See Reset Signal (RESET_IN_N).
• (2) ADC— See Analog to Digital Converter (ADC).
• (2) System clock out (32.768 kHz and 26 MHz)— See Clock Interface.
• (1) 4-wire UART for debug interface only— See Debug Interfaces.
• (1) Wake up signal— See Wake Up Signal (WAKEUP).
• (1) Main RF Antenna— See RF Interface.
• (1) TX_ON indicator— See TX Burst Indicator (TX_ON).
• (1) GNSS Antenna — See GNSS.
• (1) External PA Voltage Control Indicator— SeeTx/Rx Activity Indicator; External
RF Voltage Control.
• Power supply (C61, C62, C63) IEC-61000-4-2 (Electrostatic Discharge Immunity Test)
Operational • RF ports (C38, C49) • ±6 kV Contact
• ±8 kV Air
Unless otherwise specified:
Non-operational All pins • JESD22-A114 ± 250 V Human Body Model
• JESD22-C101C ± 250V Charged Device Model
a. ESD protection is highly recommended on customer platform. For details, see ESD Protection for I/Os
Class A is defined as the operating temperature range within which the device:
• Shall exhibit normal function during and after environmental exposure.
• Shall meet the minimum requirements of 3GPP or appropriate wireless
standards.
Class B is defined as the operating temperature range within which the device:
• Shall remain fully functional during and after environmental exposure
• Shall exhibit the ability to establish any of the device’s supported call modes
(SMS, Data, and emergency calls) at all times even when one or more environ-
mental constraint exceeds the specified tolerance.
• Unless otherwise stated, full performance should return to normal after the
excessive constraint(s) have been removed.
C1 GPIO1 GPIOb I/O 1.8V (VGPIO) General purpose input/output Leave open Yes Extension
C2 UART1_RIc UART1b O 1.8V (VGPIO) UART1 Ring Indicator Leave open Yes Core
C3 UART1_RTS UART1b I 1.8V (VGPIO) UART1 Request To Send Mandatory connection Yes Core
C4 UART1_CTS UART1b O 1.8V (VGPIO) UART1 Clear To Send Mandatory connection Yes Core
C5 UART1_TX UART1b I 1.8V (VGPIO) UART1 Transmit Data Mandatory connection Yes Core
C6 UART1_RX UART1b O 1.8V (VGPIO) UART1 Receive Data Mandatory connection Yes Core
C7 UART1_DTR UART1b I 1.8V (VGPIO) UART1 Data Terminal Ready Leave open Yes Core
C8 UART1_DCD UART1b O 1.8V (VGPIO) UART1 Data Carrier Detect Leave open Yes Core
b
C9 UART1_DSR UART1 O 1.8V (VGPIO) UART1 Data Set Ready Leave open Yes Core
C10 GPIO2 GPIOb I/O 1.8V (VGPIO) General purpose input/output Leave open Yes Core
C11 RESET_IN_N H/W Controld I Internal Bias Input reset signal Leave open No Core
C12 USB_D- USB I/O 3.3V USB Data Negative (Full Speed) Leave open No Extension
C13 USB_D+ USB I/O 3.3V USB Data Positive (Full Speed) Leave open No Extension
Not Not
C14 NC Not Connected See footnotee No
connected connected
Not Not
C15 NC Not Connected See footnotee No
connected connected
If USB is:
• Not used—Leave
C16 USB_VBUS USB PI 5V USB VBUS open No Extension
• Used—Mandatory
connection
Not Not
C17 NC Not Connected See footnotee No
connected connected
Not Not
C18 NC Not Connected See footnotee No
connected connected
Not Not
C19 NC Not Connected See footnotee No
connected connected
Not Not
C20 NC Not Connected See footnotee No
connected connected
Not Not
C21 NC Not Connected Leave open No
connected connected
C22 26M_CLKOUT Clockb O 1.8V (VGPIO) 26 MHz System Clock Output Leave open Yes Extension
C23 32K_CLKOUT Clockb O 1.8V (VGPIO) 32.768 kHz System Clock Output Leave open Yes Extension
C24 ADC1 ADCb AI 1.8V (VGPIO) Analog to digital converter Leave open Yes Extension
C25 ADC0 ADCb AI 1.8V (VGPIO) Analog to digital converter Leave open Yes Extension
C26 UIM1_VCC UIMb PO 1.8V USIM1 Power supply Leave open No Core
C27 UIM1_CLK UIMb O 1.8V (VGPIO) USIM1 Clock Leave open No Core
C28 UIM1_DATA UIMb I/O 1.8V (VGPIO) USIM1 Data Leave open No Core
C29 UIM1_RESET UIMb O 1.8V (VGPIO) USIM1 Reset Leave open No Core
Not Not
C31 NC Not Connected See footnotee No
connected connected
C37 RF_GNSS_GND_1 Ground GND Ground Ground (RF_GNSS) Mandatory connection No Core
C38 RF_GNSS Antenna ANT GNSS antenna input Leave open No Extension
C39 RF_GNSS_GND_2 Ground GND Ground Ground (RF_GNSS) Mandatory connection No Core
C40 GPIO7 GPIOb I/O 1.8V (VGPIO) General purpose input/output Leave open Yes Core
Not Not
C42 NC Not Connected See footnotee No
connected connected
C44 WAKEUP H/W Controld I 1.8V Wake up signal Mandatory connection No Extension
C46 GPIO6 GPIOb I/O 1.8V (VGPIO) General purpose input/output Leave open Yes Core
Not Not
C47 NC Not Connected Leave opene No
connected connected
C48 RF_MAIN_GND_1 Ground GND Ground Ground (RF_MAIN) Mandatory connection No Core
C50 RF_MAIN_GND_2 Ground GND Ground Ground (RF_MAIN) Mandatory connection No Core
C55 UART0_RX UART0b O 1.8V (VGPIO) Debug Receive data Leave open Yes Extension
C56 UART0_TX UART0b I 1.8V (VGPIO) Debug Transmit data Leave open Yes Extension
C57 UART0_CTS UART0b O 1.8V (VGPIO) Debug Clear To Send Leave open Yes Custom
C58 UART0_RTS UART0b I 1.8V (VGPIO) Debug Request To Send Leave open Yes Custom
C60 TX_ON Indicationb O 1.8V (VGPIO) TX transmission indication Leave open Yes Extension
3.2V (min)
C61 VBAT_RF Power PI 3.7V (typ) 4.35V Power supply Mandatory connection No Core
(max)
3.2V (min)
C62 VBAT_RF Power PI 3.7V (typ) 4.35V Power supply Mandatory connection No Core
(max)
3.2V (min)
C63 VBAT_BB Power PI 3.7V (typ) 4.35V Power supply Mandatory connection No Core
(max)
C65 GPIO4 GPIOb I/O 1.8V (VGPIO) General purpose input/output Leave open Yes Extension
C66 GPIO5 GPIOb I/O 1.8V (VGPIO) General purpose input/output Leave open Yes Extension
CG1-
GND Ground GND Ground Ground Mandatory connection No Core
CG4
G1-
GND Ground GND Ground Ground Mandatory connection No Core
G16
a. The host platform should isolate these signals during module Hibernate mode to prevent back-powering the module. For details, see Hibernate—Isolation Requirements.
b. By default, signals in group (GPIO, UART, UIM1, ADC, Clock, Indication) are hardware-configured as inputs and are in an undefined state during OFF, reset, and Hibernate
modes. The host should ignore all activity on these signals until the module has initialized and reached AT-READY (UART1_CTS transitions from high to low (and stays low) and
VGPIO is high, indicating the UART and USB interfaces are ready). For timing details, see Unmanaged POWER_ON_N (Default) and Wakeup from OFF Mode. For further infor-
mation regarding pre- and post-AT-READY signal states, contact Sierra Wireless.
c. UART1_RI cannot be used in Hibernate mode. A GPIO (GPIO2 by default) can be configured as an alternate ring indicator. For details, see Ring Indicator (UART1_RI or Alterna-
tive).
d. Hardware Control signals are available in all module operational modes and determine module behavior. For recommendations on managing these signals, see associated signal
topics in Detailed Interface Specifications.
e. Pin is not connected internally, but is reserved for future use. Leave unconnected to ensure compatibility with other Sierra Wireless CF3 modules.
f. Pin is connected internally, leave open.
GPIO8 / VBAT_PA_EN
GPIO14 / UART3_CTS
RF_MAIN_GND_2
RF_MAIN_GND_1
RF_GNSS_GND_2
RF_GNSS_GND_1
RF_MAIN
Reserved
Reserved
Reserved
Reserved
RF_GNSS
WAKEUP
VGPIO
GPIO6
GPIO7
Core pin
NC
NC
Extension pin
Custom pin
C51
C50
C49
C48
C47
C46
C45
C44
C43
C42
C41
C40
C39
C38
C37
C36
C35
C34
GND CG4 CG3 GND
C10
C11
C12
C13
C14
C15
C16
C17
C18
C1
C2
C3
C4
C5
C6
C7
C8
C9
GND CG1 CG2 GND
GPIO1
GPIO2
NC
NC
USB_D‐
UART1_RTS
USB_VBUS
UART1_TX
UART1_DCD
USB_D+
RESET_IN_N
NC
NC
UART1_DSR
UART1_CTS
UART1_RX
UART1_RI
UART1_DTR
Note: If not specified, all electrical values are given for VBAT_BB and VBAT_RF = 3.7V, operating
temperature of 25°C. and with conducted 50 load on RF port(s).
C30, C32, C37, C39, C48, C50, CG1– CG4, GND Ground
G1–G16
Caution: Operation outside the minimum/maximum specified operating voltage (Table 3-2) is not
recommended, and functional operation of the device and specified typical performance are neither
implied nor guaranteed.
VBAT_BB - - 180 mA
a. 3GPP performance is not guaranteed for VBAT_RF from 2.8-3.2V. Note that operation in this range requires a separate
VBAT_RF supply.
b. Measured at nominal supply voltage (3.7V), nominal ambient temperature (25°C), and with conducted 50 load on RF port(s).
Note: The host power supply should be capable of supplying VBAT_BBmax + VBAT_RFmax.
Note: The host platform should isolate these signals during module Hibernate mode to prevent
back-powering the module. For details, see Hibernate—Isolation Requirements.
IO Output Current 2 4 mA
Idle mode, accessible from network, lower current consumption than connected mode
Connected
Paging Opportunity
Calibrations
Connected Idle
PTW
eDRX Cycle
Module op erating in Idle eDRX (TI‐e DRX)
Paging Opportunity
Connected Idle
As shown in Figure 3-3, the HL7812 supports eDRX, taking advantage of the feature by
monitoring a set number of paging opportunities in a Paging Time Window (PTW) and
then entering a low power state between PTWs. This sequence (PTW followed by low
power state) comprises a single eDRX cycle. The size of the PTW and the length of the
eDRX cycle (TI-eDRX) are negotiated between the module (which submits desired values
when enabling eDRX) and the network (which indicates the values that will actually be
used).
The module remains in I-eDRX until it detects a page from the network during a PO or
needs to access the network (e.g. to make a data connection, send a mobility TAU or
periodic TAU, etc.), at which time it returns to the connected state.
Note that for a short period of time immediately after the module is released from
connected state by the network and enters idle state, it has a few extra short wake ups for
clock calibration (shorter than a single PO). Figure 3-4 shows an eDRX power
consumption profile with a periodic TAU event. Notice that after the TAU, the eDRX
81.92s cycle is restored slowly by several iterations from 10s to 20s then to 40s before
reaching the 81.92s wake. This behavior is an HL781x design feature and cannot be
modified.
For a more detailed explanation of eDRX, refer to HL78xx Low Power Modes Application
Note.
For example:
• Use AT+CEDRXS to configure the desired TI-eDRX value.
• During the network attach or TAU process:
· Module sends eDRX request with the settings (as specified in AT+CEDRXS) to the
network.
· Network response indicates if the module may use eDRX and the eDRX param-
eters that should be used. The network may adjust the eDRX parameters from
those requested by the module.
• If eDRX is accepted by the network, the module only needs to monitor during the
eDRX paging opportunities. The module may enter low power mode state between
the eDRX paging opportunities (depending on the module configuration).
Note that:
• eDRX parameters must be carefully selected to match the intended use case(s) for
the module.
· Given that the module can only be paged at an eDRX paging opportunity:
· Longer eDRX cycles will delay (increase the latency of) mobile terminated data
reception.
· Shorter eDRX cycles will reduce the latency but will also reduce the eDRX power
savings.
· Setting a cycle longer than 81.92s may not improve power saving significantly,
since the module will wake every 81.92s to do a clock calibration.
The duration of the eDRX cycle should be appropriately selected for the specific use
case.
• Network-side store and forward is supported— Packets will be stored until the
module's next eDRX paging opportunity or, if the network has a storage time limit,
until that limit is reached.
Sleep Stack OFF, DRX, eDRX, • 26 MHz system clock is OFF WAKEUP
PSM, No service • Application processor is idle UART1_DTRa
• Modem is out-of-coverage, sleeping, RTC alarm event
or off
• I/Os are retained
Lite Hibernate Stack OFF, eDRX, PSM, • 26 MHz system clock is OFF WAKEUP
No service • Application processor is OFF UART1_DTRa
• Modem is out-of-coverage, sleeping, RTC timeout interrupt
or off
• Flash memory and most RAM is off
(some retention memory remains
on)
• I/Os are retained
Hibernate Stack OFF, eDRX, PSM, • 26 MHz system clock is OFF WAKEUP
No service • Application processor is OFF RTC timeout interrupt
• Modem is OFF
• Flash memory and most RAM is off
(some retention memory may
remain on, PSM/eDRX-dependent)
• I/Os are not retained (e.g. in an
undefined state)
OFF Stack OFF • 26 MHz system clock is OFF & RTC WAKEUP
clock is OFF
• Application processor is OFF
• Modem is OFF
• Flash memory and RAM off
• I/Os are not retained (e.g. in an
undefined state)
An end product uses the AT+KSLEEP command to specify the preferred lowest power
mode. Then when the module sleeps, its power management algorithm determines the
appropriate mode based on the module's current operating requirements.
Note: When a module that is configured for PSM enters Hibernate mode, its non-persistent configu-
rations are lost (just like when it power cycles). Refer to HL78xx AT Commands Interface Guide
(Doc# 41111821), Command Timeout and Other Information to identify commands that manage
persistent configurations.
Warning: If USB_VBUS is powered and the USB interface is enabled, it will not be possible to
enter Lite Hibernate or Hibernate mode.
For additional low power mode details (including the relationship between 3GPP power
saving features and HL781x power modes), refer to HL78xx Low Power Modes
Application Note (Doc# 2174229). For band selection details (which impact power
consumption), refer to HL78xx Customization Guide Application Note (Doc# 2174213).
Note: To prevent flash wear out, the module includes a feature for flash wear out protection. This
feature prevents entering Hibernate mode if less than 30 minutes passed since the last Hibernate
mode, or less than 30 minutes of Hibernate sleep is expected.
Important: The module’s current consumption will depend on the actual operating/environmental
conditions of the customer platform.
The current consumption measurements presented in this section (Table 3-6 to Table 3-14) are
typical values obtained under the following test conditions:
• Nominal supply voltage—3.7V, TX power—0 dBm
• Nominal ambient temperature—25°C
• PSM connect type (call box equipment setting)—test mode
• eDRX test conditions:
• Cat-M1 eDRX paging cycle—1.28 sec
• Cat-NB eDRX paging cycle—2.56 sec
• Conducted 50 load on RF port(s)
• External UICC/USIM that can be activated
• In addition, the following conditions apply to Hibernate and OFF mode measurements:
• VGPIO is OFF
• Customer platform ensures module I/Os are not driven > 0.2V
• External UICC/USIM that is pre-configured to allow the module to automatically disable
the USIM power.
(See [4] HL78xx Low Power Modes Application Note (Doc# 2174229) for details.)
• WAKEUP signal Low
For detailed low power current consumption information, refer to %%[4] HL78xx Low Power Modes
Application Note (Doc# 2174229).
Note: To be able to enter PSM mode when the module’s lowest attainable power state is
Lite Hibernate or Hibernate (i.e., +KSLEEP <level> is 1 or 2) and LwM2M is enabled (AutoConnect
is enabled by default), the host must not de-assert the WAKEUP pin until it receives a CEREG:4
unsolicited result code.
Hibernate 2.8 A
Floor current during PSM dormant
Lite Hibernate 31 A
Hibernate 27 A
Floor current during eDRX
Lite Hibernate 29 A
Sleep 3 mA
1.28s
Hibernate 2 mA
Hibernate 1.8 A
Floor current during PSM dormant
Lite Hibernate 30 A
Hibernate 30 A
Floor current during eDRX
Lite Hibernate 32 A
Sleep 3 mA
1.28s
Hibernate 2 mA
Hibernate 2.8 A
Floor current during PSM dormant
Lite Hibernate 31 A
Hibernate 28 A
Floor current during eDRX
Lite Hibernate 32 A
Sleep 4.5 mA
1.28s
Hibernate 3.8 mA
Sleep 3.5 mA
2.56s
DRX Hibernate 2.3 mA
Sleep 2.5 mA
10.24s
Hibernate 1 mA
Hibernate 1.8 A
Floor current during PSM dormant
Lite Hibernate 30 A
Hibernate 30 A
Floor current during eDRX
Lite Hibernate 33 A
eDRXd
Hibernate Cycleb • eDRX cycle (TI-eDRX) = 81.92s 75e A
Sleep 4.2 mA
1.28s
Hibernate 3.5 mA
Sleep 3.2 mA
2.56s
DRX Hibernate 2 mA
Sleep 2.2 mA
10.24s
Hibernate 0.6 mA
Subcarriers downlink: 12
MCS.TBS:13
Subcarriers uplink: 12
MCS.TBS:13
4.1 VGPIO
The VGPIO (GPIO voltage output) 1.8 V supply state is:
• ON (available)— Voltage output is high when module is in Active, Sleep, or Lite
Hibernate mode
• OFF (not available)— Voltage output is low when module is in OFF, Reset, or
Hibernate mode
VGPIO can be used to:
• Pull-up signals such as I/Os. For additional details, see I/O Behavior in Hibernate
Mode.
• Supply LED drivers
• Indicate the module power state
• Control buffering of module I/O (required in Hibernate)
Table 4-1 and Table 4-2 describe the VGPIO supply.
Refer to the following table for the electrical characteristics of the VGPIO supply.
Lite Hibernate – – 1 mA
Note: The host platform should isolate these signals during module Hibernate mode to prevent
back-powering the module. For details, see Hibernate—Isolation Requirements.
• No I/O should be biased as no internal source exists. The maximum allowed voltage
is ±0.2V at any I/O.
• All I/Os that are referenced to VGPIO will be in an undefined state.
The host should ignore all activity on these signals until the module has initialized and
reached AT-READY state (i.e. when UART1_CTS transitions from high to low (and stays
low) and VGPIO is high). For timing details, see Unmanaged POWER_ON_N (Default)
and Wakeup from Low Power Modes.
Note: UIM1_VCC max output current is 50 mA in Active and Sleep modes, 1 mA in Lite Hibernate,
and Off in Hibernate. For UIM1 electrical interface details, see UIM1.
4.2.3 UIM1_DET
UIM1_DET is used to detect the insertion or removal of a USIM in the USIM socket
connected to the main USIM interface (UIM1).
When a USIM is:
• Inserted— UIM1_DET is HIGH.
• Removed— UIM1_DET is LOW.
To enable or disable the USIM detect feature, use the AT+KSIMDET command. For
details, refer to HL78xx AT Commands Interface Guide.
Important: For USB operation, USB_VBUS is a mandatory connection. The host must ensure
USB_VBUS is provided before establishing USB communication.
When USB operation is enabled, the lowest power mode supported is Active—the module cannot
enter Low Power state.
When USB operation is disabled, the lowest power mode supported is Hibernate.
For USB enumeration timing, refer to Unmanaged POWER_ON_N (Default) and Wakeup
from OFF Mode.
Simultaneous UART and USB is supported by default, but can be affected by the
+KUSBCOMP command. For details, refer to HL78xx AT Commands Interface Guide.
a. Default state is software-controlled when module has initialized and reached AT-READY state. Default state is configurable by
customer using AT+KGIOCFG command. For details, refer to HL78xx AT Commands Interface Guide (Doc# 41111821).
Note: The host platform may use UART1 as an 8-wire, 4-wire, or 2-wire interface as shown in
Figure 4-1, Figure 4-2, and Figure 4-3.
Note that in Hibernate mode the host platform (MCU) interfaces can remain powered— it
is important that the host interfaces do not back-power the module.
The UART1 interface is not active during Hibernate mode, so the host should ignore all
activity on UART1 during Hibernate. If the module will enter Hibernate mode, Sierra
Wireless recommends adding buffer circuits to ensure UART signals are not driven high
(i.e. >0.2V).
Note that a buffer is not required in Lite Hibernate mode. For detailed information, refer to
I/O Behavior in Hibernate Mode.
Table 4-7 describes the UART1 interface.
a. Signals are named with respect to the host device (i.e. DTE (Data Terminal Equipment) convention—PC view). For example,
UART1_RX is the signal used by the host to receive data from the module.
b. Signal direction with respect to the module. For example, UART1_RX is an output from the module to the host.
c. Default state is software-controlled when module has initialized and reached AT-READY state.
d. Host can monitor UART1_CTS and VGPIO to determine when the module is ready to receive AT commands (AT-READY). The
UART1 inter- face is not active during Hibernate mode, so the host should ignore all activity on UART1_CTS during Hibernate.
e. UART1_DTR has software-controlled pull-up (PU) (if enabled by using AT+KSLEEP with the <mngt> parameter set to 0),
which is active only when module has initialized and reached AT-READY state. When the signal is low, the module wakes in all
operational modes except Hibernate. When the signal is high, the module can enter sleep mode or lite hibernate mode but not
hibernate mode.
Note: If possible, it is highly recommended to add 0 on every line on the host platform to help the
debug process. This will force the UART signal layout to the top PCB layer and allow access to the
signal on the resistors.
Note: Because GPIO2 is in an undefined state while in (and exiting) Hibernate, use the following
recommendations when GPIO2 is used as an RI signal: If firmware is used, enable the internal PD
on GPIO2 using AT+KRIC (default state is No Pull).
4.5.2 UART1_RTS/UART1_CTS
UART1_RTS (Request to Send) is an active-low input signal used for module flow control
(in combination with UART1_CTS).
By default, the UART1_RTS signal state is software-controlled as pull-down, and the host
platform must drive this signal. The signal can be configured as a pull-up using the
AT+KHWIOCFG command (minimum firmware version 4.6.8)— for details, refer to
HL78xx AT Commands Interface Guide (Doc# 41111821)
For detailed UART1 flow control information (including use of UART1_RTS and
UART1_CTS), refer to HL78xx Low Power Modes Application Note (Doc# 2174229)).
HL781x Customer
Platform
TP
UART1_RX R RXD
TP
UART1_CTS R CTS
TP
UART1_DSR R DSR
TP
UART1_DCD Buffer R DCD
circuit TP
UART1_RI R RI
TP
UART1_DTR R DTR
TP
UART1_TX R TXD
TP
UART1_RTS R RTS
HL781x Customer
Platform
TP
UART1_RX R RXD
TP
UART1_CTS Buffer R CTS
circuit TP
UART1_TX R TXD
TP
UART1_RTS R RTS
HL781x Customer
Platform
TP
UART1_RX R RXD
Buffer
circuit TP
UART1_TX R TXD
Note: All UART signals operate at 1.8V. A voltage level shifter is required when connecting to a 3V3
domain.
Note: If RESET_IN_N is low, the module will not start until RESET_IN_N is released.
• Host-Managed— A low-level pulse must be provided by the host to switch the module
ON. Use an open drain/open collector type circuit to drive the signal low (< 0.3V (Input
Voltage-Low (V))).
Table 4-8 and Table 4-9 describe the POWER_ON_N signal.
To ensure safe power on, the module VBAT (VBAT_BB/VBAT_RF) must be discharged
below 0.3V before re-applying VBAT power.
VBAT_RF
VBAT_BB T1 HW RESET AT+CFUN=1,1
RESET_IN_N
T5
VGPIO T6
T2 T2
I/O State
XXXXXXXXXXXXXXXXXXXXXXX XXXXXXXXXXXX XXXXXXXXX
UART1_CTS
T3 T3
T4 T4
USB Bus
XXXXXXXXXXXXXXXXXXXXXXX XXXXXXXXXXXX XXXXXXXXX
T8 T8 T7
T4: Delay – – 10 s
a. Timing of first power cycle after FOTA/FW upgrade is not captured in this table.
b. Measurements taken with HL78xx Development Kit
Note: While the module is in OFF mode, the host platform (MCU) interfaces can remain powered.
To prevent these signals from back-powering the module, the host platform should make sure to
isolate them—the signals should not be driven high (i.e. > 0.2 V).
If the module is back-powered, the VGPIO low value will be higher (e.g. 0.8~1.1 V).
Important: This procedure should be used with caution. If the module is interrupted while
processing certain AT commands or performing a firmware upgrade, or the procedure is not
followed correctly, the module may become unusable.
Note: :To power up the module, it is critical that VBAT be fully discharged (or below 0.3V) and that
RESET_IN_N must be de-asserted. For details, refer to Unmanaged POWER_ON_N (Default).
While the module is in OFF mode, the host platform (MCU) interfaces can remain
powered. To prevent these signals from back-powering the module, the host platform
should make sure to isolate them-the signals should not be driven high (i.e. > 0.2 V).
If the module is back-powered, the VGPIO low value will be higher (e.g. 0.8~1.1 V).
Note: For power-sensitive applications, the module does not reach minimal power consumption
when held in reset. Therefore, it is not recommended to hold the module in reset state for long
periods.
Refer to the following table for the electrical characteristics of the RESET_IN_N interface.
Note: To reduce noise and radiated spurious emission (RSE), disable the clock signals if they are
not being used.
Note: All UART signals operate at 1.8V. A voltage level shifter is required when connecting to a 3V3
domain.
UART interfaces are not active during Hibernate mode, so the host should ignore all
activity on UART interfaces during Hibernate. If the module will enter Hibernate mode,
Sierra Wireless recommends adding buffer circuits to ensure module I/Os are not driven
high (i.e. >0.2V).
To enable debug interfaces, refer to HL78xx AT Commands Interface Guide.
a. Signals are named with respect to the host device (i.e. DTE (Data Terminal Equipment) convention—PC view). For example,
UART0_RX is the signal used by the host to receive data from the module.
b. Signal direction with respect to the module. For example, UART0_RX is an output from the module to the host.
c. Default states are for the module in Debug mode with flow control enabled.
In Debug and Boot modes, with flow control disabled, UART0_CTS and UART0_RTS are disabled.
In Customer mode, all signals are disabled.
Note: It is highly recommended to provide access through Test Points to this interface (required for
customer platform debugging).
UART0
HL781x Diagnostic Interface Customer
Platform
TP 0
C55
UART0_RX
TP 0
C56
UART0_TX Buffer
circuit TP 0
C57
UART0_CTS
TP 0
C58
UART0_RTS
a. Signal direction with respect to the module. For example, GPIO14 is an output from the module to the host.
b. Signals are named with respect to the host device (i.e. DTE (Data Terminal Equipment) convention—PC view). For example,
UART3_RX is the signal used by the host to receive data from the module.
Note: To enable use of the UART3 interface for customer platform debugging, it is highly recom-
mended to provide access through Test Points to these 4 GPIOs.
UART3
HL781x Modem Logs Interface (MLI) Customer
Platform
TP 0
C54
GPIO15 / UART3_RX
TP 0
C52
GPIO10 / UART3_TX Buffer
circuit TP 0
C51
GPIO14 / UART3_CTS
TP 0
C53
GPIO11 / UART3_RTS
VIL – – 0.3 V
VIH 1.2 – – V
a
Wakeup assertion time 100 – – s
Internal PD – 100K – Ω
a. Assertion time—Time required to keep WAKEUP at high level to ensure module can wake up successfully.
VBAT_RF
VBAT_BB
WAKEUP
VGPIO
T1
I/O State
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
UART1_CTS
T2
T3
USB BUS
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
T4
T3: Delay – – 4 s
VBAT_RF
VBAT_BB
WAKEUP
T1
VGPIO
UART1_CTS
AT‐READY
Wakeup from
Hibernate
Hibernate
VBAT_RF
VBAT_BB
WAKEUP
VGPIO
T1
I/O State
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
UART1_CTS
T2
T3
ON AT‐
READY
4.13 RF Interface
The RF interface of the Sierra Wireless HL781x provides a single RF antenna connection
for the transmission/reception of RF signals.
Contact Sierra Wireless technical support for assistance in integrating the Sierra Wireless
HL781x on applications with embedded antennas.
C48 GND – – –
C50 GND – – –
Table 4-23: HL7810 / / HL7812 Conducted Tx Max Output Power Tolerances - LTE a
LTE Bands Min Typ Max Units Notes
4.13.2.2 Rx Sensitivity
The module's LTE receiver sensitivity is specified in the following tables.
a. Test conditions per 3GPP TS 36.521-1 v13: Bandwidth: 5MHz on Reference Measurement Channel.
b. Displayed limits derived from 3GPP TS 36.521-1 V16.3.0, Table 7.3EA-2, adjusted by +0.7 dB for measurement uncertainty.
c. Band not defined by 3GPP therefore no associated limit.
-107.5
-107.5
a. Test conditions per 3GPP TS 36.521-1 v13: on DL Reference Measurement Channel defined
b. Displayed limits derived from 3GPP TS 36.521-1 V16.3.0, Table 7.3F.1.3-1, adjusted by +0.7 dB for measurement uncertainty
GSM 850 31.5 32.5 33.5 dBm GMSK mode (Class 4; 2 W, 33 dBm)
E-GSM 900 31.5 32.5 33.5 dBm GMSK mode (Class 4; 2 W, 33 dBm)
DCS 1800 28.5 29.5 30.5 dBm GMSK mode (Class 1; 1 W, 30 dBm)
PCS 1900 28.5 29.5 30.5 dBm GMSK mode (Class 1; 1 W, 30 dBm)
a. Stated power tolerances satisfy 3GPP TS 51.010-1 requirements for normal (25°C) and Class A (extreme) conditions.
b. Stated power tolerances for input voltage of 3.7V.
4.13.3.2 Rx Sensitivity
The module's GPRS receiver sensitivity is specified in Table 4-27.
a. Stated sensitivity values satisfy 3GPP TS 51.010-1 requirements for normal (25°C) and Class A (extreme) conditions
Note: This signal is currently available for LTE Cat-M1. Support for LTE Cat-NB1 (HL7810 /HL7812)
and 2G (HL7812) will be available in a future firmware release.
TX_ON
TX activity
Transmitting
T advance
To enable/disable this feature, use the AT+KHWIOCFG command. For details, refer to
HL78xx AT Commands Interface Guide.
Tadvance 30 s
GPIO8 I/O
C41 1.8V (VGPIO) High during Tx/Rx activity
VBAT_PA_EN O
GPIO8 /
VBAT_PA_EN
T advance T delay
Tadvance 0.4 ms 5 ms
Tdelay 10 s 20 s
4.16 GNSS
The HL781x's GNSS implementation supports GPS L1 and GLONASS G1 operation.
Note: The GNSS receiver and LTE/GSM receiver share the same RF resources, therefore GNSS
can only be used when the module is not actively connected on LTE/GSM. An example of a suitable
implementation of GNSS in an end product would be the use of GNSS positioning for asset
management applications where infrequent and no real-time position updates are required.
Table 4-32 describes the GNSS antenna specifications. Note that the HL781x does not
support an active GPS/GNSS antenna.
Time To First Fix (TTFF) Cold start, Input power -130 dBm 39s
Note: HL7812 shield displayed. (HL7810 shield does not have center cutouts.)
6.2 UIM1
UIM1 can operate at clock rates up to 5 MHz.
Most UIM1 signal lines do not require a buffer during Hibernate, and can be directly
connected to the UIM card or holder. A buffer is required for UIM_DET1 if powered from
the host (not required if powered from VGPIO).
Decoupling capacitor(s) must be added to UIM1_VCC and UIM1_DET, as close as
possible to the UIM card. Decoupling capacitors for UIM1_CLK, UIM1_RST, and
UIM1_DATA are recommended to be added as placeholders for potential EMC issues.
The two resistors (RCLK and RDAT) should be added as placeholders to compensate for
potential layout issues. Both can be populated to slew the UIM1 signals, if required.
The UIM1_DATA trace should be routed away from the UIM1_CLK trace.
Keep the distance between the module and the UIM holder as short as possible.
Sierra Wireless recommends using the following ESD protection on the UIM1 interface:
• INFINEON ESD112-B1-02EL E6327— UIM1_CLK, UIM1_DATA, UIM1_RESET
• Diodes Inc D8V0L1B2LP3-7 — UIM1_VCC, UIM1_DET
Figure 6-1 illustrates the recommended implementation of a UIM interface
UIM1_VCC C1
1 uF
100 nF 1 nF ESD
DNI
UIM1_RESET C2
100 nF ESD
DNI
C3
UIM1_CLK
RCLK
0ohm 100 nF ESD C4
DNI
C5
HL781x RDATA C6
UIM Holder
DNI
GND C7
UIM1_DATA C8
100 nF
ESD
DNI
VGPIO C9
100 nF ESD
DNI
UIM1_DET C10
1 kohm
1 nF
USB_VBUS
Common USB_D+
mode
choke USB_D‐
HL781x
Sierra Wireless recommends using the following for ESD and EMI protection:
• ESD diodes— INNOCHIPS ULCE0505A015FR for USB data lines, and Diodes Inc
D8V0L1B2LP3-7 for USB_VBUS
• Optional common mode choke for EMI protection, depending on customer require-
ments— Panasonic EXC24CG900U
Important: To prevent these signals from back-powering the module, the host platform should
make sure to isolate them—the signals should not be driven high (e.g. > 0.2 V).
Note: Parts and usage descriptions above are intended as examples to assist the host platform
designer in developing an appropriate solution for the platform. Selection and use of specific parts is
the responsibility of the host platform designer.
Control of the buffer circuit is based on the status of VGPIO— for details, see VGPIO
Monitoring and Buffer Control.
Bi‐directional buffer
Various signal
typ es (GPIO,
UART, etc.)
VGPIO Buffer EN
Customer
HL781x Optional Voltage Platform
Detection Circuit
Directional buffer
Input signal
(e.g. UART1_TX)
VGPIO
Buffer EN
Customer
HL781x Optional Voltage Platform
Detection Circuit
Note: VGPIO can be used to directly connect to the buffer enable signal but the host platform must
ensure that all host outputs are not driven high (i.e. > 0.2 V) before the module enters Hibernate
mode.
RF_GNSS
HL781x
TBD
RF_MAIN
TBD TBD 33pF
6.6.2 RF Circuit
The RF signal must be routed on the application board using tracks with a 50
characteristic impedance.
The characteristic impedance depends on the dielectric, the track width and the ground
plane spacing.
It is recommended to use stripline design if the RF path is fairly long (more than3 cm),
since microstrip design is not shielded. Consequently, the RF (transmit) signal may
interfere with neighboring electronic circuits. In the same way, the neighboring electronics
(micro-controllers, etc.) may interfere with the RF (receive) signal and degrade the
reception performance.
The RF trace on the development board is routed from the module antenna port to the RF
connector (SMA). The RF trace is designed as a 50 coplanar stripline and its length is
24.8 mm.
The following drawings show the location of the Sierra Wireless HL781x on the
development board, the routing cross section and the top view of the RF trace on the
development board.
Embedded module
RF connector
(AUX)
GPS connector
W = 11.2 Mil
G = 24 Mil
Duration: 14 days
Duration: 20 days
Duration: 7 days
Duration: 10 days
Designation Condition
Duration: 5 days
Component Solder Wettability CSW Standard: JESD22 - B102, Method 1/Condition C, Solderability Test Method
Special conditions:
• Test method: Surface mount process simulation test (preconditioning 16 h
±30 minutes dry bake)
Duration: 1 day
Special conditions:
• Number of drops: 6 drops per unit (1 drop per direction: ±X, ±Y, ±Z)
• Height: 1m
Operating conditions: Unpowered
Duration: 1 day
Note: Tests that require features not supported by the Sierra Wireless HL7810 / /Sierra Wireless
HL7812 (as defined by this document) are not supported.
Additional certifications and details on specific country approvals may be obtained upon
customer request — contact your Sierra Wireless account representative for details.
Additional testing and certification may be required for the end product with an embedded
HL7810 / /HL7812 module and are the responsibility of the OEM. Sierra Wireless offers
professional services-based assistance to OEMs with the testing and certification
process, if required.
• HL7812:
Standalone Collocated
B2 1850–1910 6 6
B5 824-829 6 4
Sierra B8 897.5-900.5 6 4
Wireless HL7810 B12 699-716 6 4
LTE
Sierra B13 777-787 6 4
Wireless HL7812 B25 1850-1915 6 6
B26 814-849 6 4
B85 698-716 6 4
4. The HL7810 or HL7812 may transmit simultaneously with other collocated radio
transmitters within a host device, provided the following conditions are met:
· Each collocated radio transmitter has been certified by FCC/IC for mobile appli-
cation.
· At least 20 cm separation distance between the antennas of the collocated trans-
mitters and the user’s body must be maintained at all times.
· The radiated power of a collocated transmitter must not exceed the EIRP limit stipu-
lated in Table 8-2.
BT 2400–2500 16
5. A label must be affixed to the outside of the end product into which the HL7810 or
HL7812 is incorporated, with a statement similar to the following:
· (HL7810)— This device contains FCC ID: N7NHL78A / IC: 2417C-HL78A
· (HL7812)— This device contains FCC ID: N7NHL78C / IC: 2417C-HL78C
6. A user manual with the end product must clearly indicate the operating requirements
and conditions that must be observed to ensure compliance with current FCC/IC RF
exposure guidelines.
The end product with an embedded HL7810 or HL7812 may also need to pass the FCC
Part 15 unintentional emission testing requirements and be properly authorized per FCC
15. If this module is intended for use in a portable device, you are responsible for
separate approval to satisfy the SAR requirements of FCC Part 2.1093 and IC RSS-102.
Active state All sub-systems, including the MAP process, are up and running. User
can access module via UART (e.g. to configure/query module settings/
states, and send/receive data.
CLK Clock
EN Enable
GND Ground
IC Industry Canada
I/O Input/Output
MAX Maximum
MIN Minimum
PA Power Amplifier
PC Personal Computer
RF Radio Frequency
RST Reset
RX Receive
SW Software
TBC To Be Confirmed
TP Test Point
TX Transmit
TYP Typical
HL7810 HL7810 embedded module Contact Sierra Wireless for the latest SKU.
HL7812 HL7812 embedded module Contact Sierra Wireless for the latest SKU.