Module 5

PHASE-LOCKED LOOP

A phase-locked loop or phase lock loop (PLL) is a control system that generates a signal
that has a fixed relation to the phase of a "reference" signal. A phase-locked loop circuit
responds to both the frequency and the phase of the input signals, automatically raising or
lowering the frequency of a controlled oscillator until it is matched to the reference in both
frequency and phase. A phase-locked loop is an example of a control system using negative
feedback.

In simpler terms, a PLL compares the frequencies of two signals and produces an error
signal which is proportional to the difference between the input frequencies. The error
signal is then low-pass filtered and used to drive a voltage-controlled oscillator (VCO)

which creates an output frequency. The output frequency is fed through a frequency
divider back to the input of the system, producing a negative feedback loop. If the output
frequency drifts, the error signal will increase, driving the frequency in the opposite
direction so as to reduce the error. Thus the output is locked to the frequency at the other
input. This input is called the reference and is often derived from a crystal oscillator, which
is very stable in frequency.
Phase-locked loops are widely used in radio, telecommunications, computers and other
electronic applications. They may generate stable frequencies, recover a signal from a noisy
communication channel, or distribute clock timing pulses in digital logic designs such as
microprocessors. Since a single integrated circuit can provide a complete phase- locked-
loop building block, the technique is widely used in modern electronic devices, with output
frequencies from a fraction of a cycle per second up to many gigahertz
STRUCTURE AND FUNCTION

Phase-locked
locked loop mechanisms may be implemented as either analog or digital circuits.
Both implementations use the same basic structure.

Block diagram of a PLL

Both analog and digital PLL circuits include three basic elements:

a phase detector,
a variable electronic oscillator, and
a feedback path (which often includes a frequency divider).

DIGITAL PHASE-LOCKED LOOP (DPLL)

A digital phase
phase-locked
locked loop operates similarly to an analog phase-locked
phase locked loop, but is
implemented entirely using digital circuits. In place of a voltage-controlled
voltage controlled oscillator
(VCO), a DPLL uses local reference clock and a variable dividing counter under digital
control to create the equivalent oscillator function.

DPLLs are easier to design and implement, and are less sensitive to voltage noise than
analog PLLs, however they typically suffer from higher higher phase noise due to the
quantization error of using a non-analog
analog oscillator. For this reason digital phase locked
loops are not well
well-suited
suited to synthesizing higher frequencies or handling high
high frequency
reference signals. DPLLs are sometimes used for data recovery.
ANALOG PHASE-LOCKED LOOP

Basic design
Phase-locked
locked loop block diagram

Analog phase locked loops are generally built of a phase detector, low pass filter and
voltage-controlled
controlled oscillator (VCO) placed in a negative feedback closed-loop
configuration. There may be a frequency divider in the feedback path or in the reference
path, or both, in order to make the PLL's output signal frequency an integer multiple of
the reference. A non integer multiple of the reference frequency can be created by
replacing the simple divide-by-N counter in the feedback path with a programmable pulse
swallowing counter. This technique is usually referred to as a fractional-N synthesizer or
fractional-N PLL.

The oscillator generates a periodic output signal. Assume that initially the oscillator is at
nearly the same frequency as the reference signal. Then, if the phase from the oscillator
falls behind that of the reference, the phase detector changes the control voltage of the
oscillator, so that it speeds up. Likewise, if the phase creeps ahead of the reference, the
phase detector changes the control voltage to slow down the oscillator. A low-pass filter
smooths out abrupt changes in the control voltage; it can be demonstrated that some
filtering is required for a stable system. Since initially the oscillator may be far from the
reference frequency, practical phase detectors may also respond to frequency differences,
so as to increase the lock-in range of allowable inputs.

Depending on the application, either the output of the controlled oscillator, or the control
signal to the oscillator, provides the useful output of the PLL system.

EQUATIONS

THE EQUATIONS GOVERNING A PHASE-LOCKED LOOP WITH AN ANALOG MULTIPLIER AS THE

PHASE DETECTOR MAY BE DERIVED AS FOLLOWS. LET THE INPUT TO THE PHASE DETECTOR
BE XC(T) AND THE OUTPUT OF THE VOLTAGE-CONTROLLED OSCILLATOR (VCO) IS XR(T)
WITH FREQUENCY ΩR(T), THEN THE OUTPUT OF THE PHASE DETECTOR XM(T) IS GIVEN BY

THE VCO FREQUENCY MAY BE WRITTEN AS A FUNCTION OF THE VCO INPUT Y(T) AS

WHERE GV IS THE SENSITIVITY OF THE VCO AND IS EXPRESSED IN HZ / V.

HENCE THE VCO OUTPUT TAKES THE FORM

WHERE
THE LOOP FILTER RECEIVES THIS SIGNAL AS INPUT AND PRODUCES AN OUTPUT

XF(T) = FFILTER(XM(T))

WHERE FFILTER IS THE OPERATOR REPRESENTING THE LOOP FILTER TRANSFORMATION.

WHEN THE LOOP IS CLOSED, THE OUTPUT FROM THE LOOP FILTER BECOMES THE INPUT TO
THE VCO THUS

Y(T) = XF(T) = FFILTER(XM(T))

WE CAN DEDUCE HOW THE PLL REACTS TO A SINUSOIDAL INPUT SIGNAL:

XC(T) = ACSIN(ΩCT).

THE OUTPUT OF THE PHASE DETECTOR THEN IS:

THIS CAN BE REWRITTEN INTO SUM AND DIFFERENCE COMPONENTS USING TRIGONOMETRIC
IDENTITIES:

AS AN APPROXIMATION TO THE BEHAVIOUR OF THE LOOP FILTER WE MAY CONSIDER ONLY

THE DIFFERENCE FREQUENCY BEING PASSED WITH NO PHASE CHANGE, WHICH ENABLES US
TO DERIVE A SMALL-SIGNAL MODEL OF THE PHASE-LOCKED LOOP. IF WE CAN MAKE

, THEN THE CAN BE APPROXIMATED BY ITS ARGUMENT RESULTING IN:

. THE PHASE-LOCKED LOOP IS SAID TO BE LOCKED IF

THIS IS THE CASE.

CONTROL SYSTEM ANALYSIS

PHASE LOCKED LOOPS CAN ALSO BE ANALYZED AS CONTROL SYSTEMS BY APPLYING THE
LAPLACE TRANSFORM. THE LOOP RESPONSE CAN BE WRITTEN AS:

WHERE
 ΘO IS THE OUTPUT PHASE IN RADIANS
ΘI IS THE INPUT PHASE IN RADIANS
KP IS THE PHASE DETECTOR GAIN IN VOLTS PER RADIAN
KV IS THE VCO GAIN IN RADIANS PER VOLT-SECOND
F(S) IS THE LOOP FILTER TRANSFER FUNCTION (DIMENSIONLESS)

THE LOOP CHARACTERISTICS CAN BE CONTROLLED BY INSERTING DIFFERENT TYPES OF

LOOP FILTERS. THE SIMPLEST FILTER IS A ONE-POLE RC CIRCUIT. THE LOOP TRANSFER
FUNCTION IN THIS CASE IS:

THE LOOP RESPONSE BECOMES:

THIS IS THE FORM OF A CLASSIC HARMONIC OSCILLATOR. THE DENOMINATOR CAN BE

RELATED TO THAT OF A SECOND ORDER SYSTEM:

WHERE

Ζ IS THE DAMPING FACTOR

ΩN IS THE NATURAL FREQUENCY OF THE LOOP

FOR THE ONE-POLE RC FILTER,

THE LOOP NATURAL FREQUENCY IS A MEASURE OF THE RESPONSE TIME OF THE LOOP, AND
THE DAMPING FACTOR IS A MEASURE OF THE OVERSHOOT AND RINGING. IDEALLY, THE
NATURAL FREQUENCY SHOULD BE HIGH AND THE DAMPING FACTOR SHOULD BE NEAR 0.707
(CRITICAL DAMPING). WITH A SINGLE POLE FILTER, IT IS NOT POSSIBLE TO CONTROL THE
LOOP FREQUENCY AND DAMPING FACTOR INDEPENDENTLY. FOR THE CASE OF CRITICAL
DAMPING,

A SLIGHTLY MORE EFFECTIVE FILTER, THE LAG-LEAD FILTER INCLUDES ONE POLE AND ONE
ZERO. THIS CAN BE REALIZED WITH TWO RESISTORS AND ONE CAPACITOR. THE TRANSFER
FUNCTION FOR THIS FILTER IS

THIS FILTER HAS TWO TIME CONSTANTS

Τ1 = C(R1 + R2)
Τ2 = CR2

SUBSTITUTING ABOVE YIELDS THE FOLLOWING NATURAL FREQUENCY AND DAMPING

FACTOR

THE LOOP FILTER COMPONENTS CAN BE CALCULATED INDEPENDENTLY FOR A GIVEN

NATURAL FREQUENCY AND DAMPING FACTOR

REAL WORLD LOOP FILTER DESIGN CAN BE MUCH MORE COMPLEX EG USING HIGHER ORDER
FILTERS TO REDUCE VARIOUS TYPES OR SOURCE OF PHASE NOISE.
APPLICATIONS

Phase-locked loops are widely used for synchronization purposes; in space

communications for coherent carrier tracking and threshold extension, bit
synchronization, and symbol synchronization. Phase-locked loops can also be used to
demodulate frequency-modulated signals. In radio transmitters, a PLL is used to
synthesize new frequencies which are a multiple of a reference frequency, with the same
stability as the reference frequency.