Unit-2

Simplification of
Boolean Functions
 Outline
Looping
• Standard representation for logic functions
o SOP, POS
• Simplification using K-Map
• 3-variable, 4-variable, 5-variable

• NAND and NOR implementation

• exclusive-OR function
Section - 1
Boolean functions & representation
1. Sum-of-products (SOP) form (Disjunctive Normal Form)
𝑓(𝐴, 𝐵, 𝐶) = (𝐴𝐵ത + 𝐵𝐶)
ത

2. Products-of-sums (POS) form (Conjunctive Normal Form)

𝑓(𝐴, 𝐵, 𝐶) = (𝐴ҧ + 𝐵)(𝐵
ത + 𝐶)

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Boolean functions & representation
3. Standard sum-of-products form (Minterm)
 Contains all the variables of the function either in complemented or uncomplemented
form.
𝑓 𝐴, 𝐵, 𝐶 = 𝐴𝐵 ҧ + 𝐵𝐶
ത
= 𝐴𝐵ҧ 𝐶 + 𝐶ҧ + 𝐵𝐶 ത 𝐴 + 𝐴ҧ
= 𝐴𝐵𝐶ҧ ҧ 𝐶ҧ + 𝐴𝐵𝐶
+ 𝐴𝐵 ത + 𝐴ҧ𝐵𝐶 ത
Value of Minterm = 1
 Variable appears in uncomplemented form if it has a value of 1 in the combination and
appears in complemented form if it has a value of 0 in the combination
 Sum of minterms whose value is equal to 1 is the standard sum of products form of the
function.
 Minterms are denoted as m0, m1, m2, …,
 For 3 variable function, m0=𝐴ҧ𝐵ത 𝐶,ҧ m1= 𝐴ҧ𝐵𝐶,
ത m2=𝐴𝐵 ҧ 𝐶,ҧ m3=𝐴𝐵𝐶,
ҧ m4=𝐴𝐵ത 𝐶,ҧ m5=𝐴𝐵𝐶,
ത
m6=𝐴𝐵𝐶,ҧ and m7=𝐴𝐵𝐶

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Boolean functions & representation
 Canonical SOP form is shown by the sum of minterms for which the
function equals 1.
f(A,B,C) = m1 + m2 + m3 + m5
Or
f(A,B,C) = σ𝑚(1,2,3,5)

4. Standard product-of-sum form (Maxterm)

 Derived by considering the combinations of which f = 0
 Each term is a sum of all the variables
 Variable appears in uncomplemented form if it has a value of 0 in the
combination and appears in complemented form if it has a value of 1
in the combination

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Boolean functions & representation
𝑓 𝐴, 𝐵, 𝐶 = (𝐴ҧ + 𝐵)(𝐴
ത + 𝐵)
= (𝐴ҧ + 𝐵ത + 𝐶 𝐶)(𝐴
ҧ + 𝐵 + 𝐶 𝐶)ҧ
= (𝐴ҧ + 𝐵ത + 𝐶)(𝐴ҧ + 𝐵ത + 𝐶)(𝐴
ҧ + 𝐵 + 𝐶)(𝐴 + 𝐵 + 𝐶)ҧ
Value of Maxterm = 0
 A sum term which contains each of the n variables in either
complemented or uncomplemented form is called a maxterm.
 Maxterms are denoted as M0, M1, M2, …,
f(A,B,C) = M0M1M6M7
Or
f(A,B,C) = ς𝑀(0,1,6,7)

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Boolean functions & representation
 Express the Boolean function F = A + BC as a sum of minterms.

 F = A + B’C
 = ABC + AB’C + ABC’ + AB’C ‘+ A’B’C
 F = A’B’C + AB’C’ + AB’C + ABC’ + ABC
 F = m1 + m4 + m5 + m6 + m7
 When a Boolean function is in its sum‐of‐minterms form, it is sometimes
convenient to express the function in the following brief notation:
F(A, B, C) = Ʃ m(1, 4, 5, 6, 7)

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Boolean functions & representation
 An alternative procedure for deriving the minterms of a Boolean function
is to obtain the truth table of the function directly from the algebraic
expression and then read the minterms from the truth table.
 Consider the Boolean function given in Example :F = A + B’C
 The truth table shown in Table, can be derived directly from the algebraic
expression by listing the eight binary combinations under variables A, B,
and C and inserting 1’s under F for those combinations for which A = 1
and BC = 01.
 From the truth table, we can then read the five minterms of the function
to be 1, 4, 5, 6, and 7

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Boolean functions & representation

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Boolean functions & representation

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Section - 2
Introduction to K-Maps
 Simplification of Boolean functions leads to simpler (and usually faster) digital circuits.
 Simplifying Boolean functions using identities is time-consuming and error-prone.
 This special section presents an easy, systematic method for reducing Boolean expressions.
 A K-Map is a matrix consisting of rows and columns that represent the output values of a
Boolean function.
 The output values placed in each cell are derived from the minterms of a Boolean function.
 A minterm is a product term that contains all of the function’s variables exactly once, either
complemented or not complemented.

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Two-Variable K-Map

The two variables A and B have four possible combinations that can be represented by the
map as follows

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Representation of functions in the map

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3 – Variable K-Map
The three variables A, B and C have eight possible combinations that can be
represented by the map as follows

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4 – Variable K-Map
 The four variables A, B, C and D have sixteen possible combinations that can be represented by
the map as follows

A B C D Minterm A B C D Minterm
0 0 0 0 m0 = A’B’C’D’ 1 0 0 0 m8 = AB’C’D’
0 0 0 1 m1 = A’B’C’D 1 0 0 1 m9 = AB’C’D
0 0 1 0 m2 = A’B’CD’ 1 0 1 0 m10 = AB’CD’
0 0 1 1 m3 = A’B’CD 1 0 1 1 m11 = AB’CD
0 1 0 0 m4 = A’BC’D’ 1 1 0 0 m12 = ABC’D’
0 1 0 1 m5 = A’BC’D 1 1 0 1 m13 = ABC’D
0 1 1 0 m6 = A’BCD’ 1 1 1 0 m14 = ABCD’
0 1 1 1 m7 = A’BCD 1 1 1 1 m15 = ABCD

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 F (w, x, y, z) = (1, 4, 5, 6, 12, 14, 15)

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 F (w, x, y, z) = (1, 3, 4, 5, 6, 7, 9, 11, 13, 15)

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 
F (A, B, C, D) = (0, 2, 4, 5, 6, 7, 8, 10, 13, 15)

F(A, B, C, D) = (1, 3, 5, 7, 13, 15)

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Reduce Boolean Expression
 Consider the function:
𝑓 𝐴, 𝐵, 𝐶 = 𝐴′ 𝐵′ 𝐶 + 𝐴′ 𝐵𝐶 + 𝐴𝐵′ 𝐶 + 𝐴𝐵𝐶
 Its K-Map is given below.
 What is the largest group of 1’s that is a power of 2?
 This grouping tells us that changes in the variables A and B have no influence upon the value of
the function: They are irrelevant.
𝑓 𝐴, 𝐵, 𝐶 = 𝐶

AB
C 00 01 11 10
0 2 6 4
0
1 3 7 5
1 1 1 1 1

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Examples (SOP)

𝑓 = 𝐴𝐵′ 𝐶 + 𝐴′ 𝐵′𝐶 𝑓 = 𝐴𝐵𝐶′𝐷 + 𝐴𝐵𝐶𝐷 + 𝐴′ 𝐵𝐶 ′ 𝐷 + 𝐴′ 𝐵𝐶𝐷

AB 00 01 11 10
AB CD
00 01 11 10 0 4 12 8
C
0 2 6 4 00
0 1 5 13 9
01 1 1
1 3 7 5
1 1 1
3 7 15 11
11 1 1
𝑓= 𝐵′ 𝐶
2 6 14 10
10

𝑓 = 𝐵𝐷

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Examples (SOP)
𝑓 = 𝐴𝐵𝐶 ′ 𝐷 + 𝐴𝐵′ 𝐶 ′ 𝐷 ′ + 𝐴𝐵′ 𝐶𝐷 ′ + 𝐴′ 𝐵′ 𝐶𝐷 ′ + 𝐴′ 𝐵′ 𝐶 ′ 𝐷′ 𝑓 = 𝐴′ 𝐵𝐶 ′ 𝐷 + 𝐴′ 𝐵′ 𝐶 ′ 𝐷 + 𝐴′ 𝐵′ 𝐶 ′ 𝐷′
AB AB
00 01 11 10 00 01 11 10
CD CD
0 4 12 8 0 4 12 8
00 1 1 00 1
1 5 13 9 1 5 13 9
01 1 01 1 1
3 7 15 11 3 7 15 11
11 11

2 6 14 10 2 6 14 10
10 1 1 10

𝑓 = 𝐴𝐵𝐶 ′ 𝐷 + 𝐵′ 𝐷′ 𝑓 = 𝐴′ 𝐵′ 𝐶 ′ + 𝐴′ 𝐶 ′ 𝐷

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Example (POS)
f(A,B,C,D) = ς𝑀 (0,1,4,5,10,11,14,15)

AB
00 01 11 10
CD
0 4 12 8
00 0 0
1 5 13 9
01 0 0
𝑓 = (𝐴 + 𝐶)(𝐴′ + 𝐶 ′ )
3 7 15 11
11 0 0
2 6 14 10
10 0 0

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Don’t care conditions
 Suppose we are given a problem of f(A,B,C,D) = σ𝑚 (2,7,15) + d(3,8,11,12)
implementing a circuit to generate a logical 1
when a 2, 7, or 15 appears on a four-variable AB
00 01 11 10
input. CD
0 4 12 8
 A logical 0 should be generated when 0, 1, 4, 5, 00 x x
6, 9, 10, 13 or 14 appears.
1 5 13 9
 The input conditions for the numbers 3, 8, 11 01
and 12 never occur in the system. This means
we don’t care whether inputs generate logical 1 3 7 15 11
11 x 1 1 x
or logical 0.
 Don’t care combinations are denoted by ‘x’ in K- 2 6 14 10
Map which can be used for the making groups. 10 1
 The above example can be represented as 𝑓 = 𝐶𝐷 + 𝐴′ 𝐵′ 𝐶

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Example (Don’t care)
F(W,X,Y,Z) = σ𝑚 (1,3,7,11,15) + d(0,2,5)

WX
00 01 11 10
YZ
0 4 12 8
00 x
1 5 13 9
01 1 x
𝐹 = 𝑊 ′ 𝑋′+𝑌𝑍
3 7 15 11
11 1 1 1 1
2 6 14 10
10 x

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Realizing Logic Function with Gates
 Implement AB’ + C’D using AND, OR & Invert Gates

A
B

C
D

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Converting AND/OR/Invert Logic to NAND/NOR Logic
1. Draw the circuit in AOI logic.
2. If NAND hardware is chosen, add a circle at the output of each AND gate and at the inputs to
all the OR gates.
3. If NOR hardware is chosen, add a circle at the output of each OR gate and at the inputs to all
the AND gates.
4. Add or subtract an inverter on each line that received a circle in steps 2 or 3 so that the
polarity of signals on those lines remains unchanged from that of the original diagram.
5. Replace bubbled OR by NAND and bubbled AND by NOR.
6. Eliminate double inversions.

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Converting AND/OR/Invert Logic to NAND/NOR Logic (Example)
 Implement the following AOI logic using NAND logic

Put a circle at the output of each AND gate and at the inputs to all OR gates

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Converting AND/OR/Invert Logic to NAND/NOR Logic (Example)
Add an inverter to each of the lines that received only one circle at input so that polarity remains
unchanged.

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Converting AND/OR/Invert Logic to NAND/NOR Logic (Example)

Replace bubbled OR gates and NOT gates by NAND gates.

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