P23VL404_Syllabus
P23VL404_Syllabus
4. Course Outcomes
CO. No. Course Outcome BTL POs PSOs
Analyze single-stage amplifiers with MOS K4 1,2,3,5,8,9,10,11,12 1,2
P23VL404.1
loads.
P23VL404.2 Analyze the concepts of frequency response
and noise characteristics of differential K4 1,2,3,5,8,9,10,11,12 1,2
amplifiers.
P23VL404.3 Design and model different active devices with K3 1,2,3,5,8,9,10,11,12 1,2
OPAMPs.
P23VL404.4 Interpret the multi-pole systems and frequency K2 1,2,3,5,8,9,10,11,12 1,2
compensations techniques.
P23VL404.5 Design current sources at the CMOS transistor K3 1,2,3,5,8,9,10,11,12 1,2
level.
P23VL404.2 3 3 2 - 2 - - 1 2 2 2 1 1 1
P23VL404.3 3 3 3 - 3 - - 1 2 2 2 1 2 2
P23VL404.4 3 3 3 - 3 - - 2 2 2 3 1 2 2
P23VL404.5 3 3 3 - 3 - - 2 2 2 3 1 2 2
Course to PO 3 3 3 - 3 - - 2 2 2 3 1 2 2
“3”—High, “2”—Medium, “1”—Low, “-“—No Correlation