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Week 4 Assignment

The document outlines the solutions to an assignment involving a two-stage operational amplifier (opamp) used in a unity-gain follower configuration. It includes calculations for DC gains, transconductance, loop gain, and the positions of poles and zeros, ultimately determining the phase margin. The assignment was due on February 21, 2024, and the solutions indicate that the answers provided by the students were incorrect.

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0% found this document useful (0 votes)
5 views

Week 4 Assignment

The document outlines the solutions to an assignment involving a two-stage operational amplifier (opamp) used in a unity-gain follower configuration. It includes calculations for DC gains, transconductance, loop gain, and the positions of poles and zeros, ultimately determining the phase margin. The assignment was due on February 21, 2024, and the solutions indicate that the answers provided by the students were incorrect.

Uploaded by

analogguys24
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Week 4: Assignment 4

u
The due date for submitting this assignment has passed.
Due on 2024-02-21, 23:59 IST.
As per our records you have not submitted this assignment.
P
Chmias Vo
Vd
·

oon t
&
Gm=201S to cam, Va
G,=0.2uS =
Gos Gn=2001S C=1pFR=125ks2
G,-2uS = am
Figure 1 Figure 2

The two stage opamp of figure 1 is used in the unity-gain follower configuration of fiqure 2, to drive a parallel combination of capacitance C and resistance R ,as
shown. The trasconductance (G ) and output conductance (G,) of the individual transconductor stages are marked in figure 1. The "+ and"" signs indicated at the
input nodes of figure 1 denote the respective positive and negative input terminals of the overall two stage opamp. The opamp is Miller-compensated using a
capacitor of value C-1pF, as indicated in figure 1. For all calculations, you may assumethat: (a) poles and zeros affect phase response oniy between 0.1X and 10X the
-

pole/zero frequency. (b) "DC" refers to low frequencies where there is no effect of any pole or zero.

=
1) In figure 1, determine the DC gain of the first stage in dB. = 100
Atc
God
volay Lo
=
No, the answer is incorrect.

As a
Score: 0 =
Accepted Answers:

100
-

(Type: Numeric) 40
Ader
2) In figure 1, determine the DC gain of the second stage in dB.
= 1 point

(Ade
No, the0wer iS incorrect
Score
Adap , eAdee) AB =
10t4t
= 8 DAD
Accepted Answers:
(Type: Numeric) 40
1 point
3) In figure 1, determine the overall DC gain of the opamp in dB.

No, the answer is incorrect.


Score: 0
Accepted Answers:
(Type: Numeric) 80

7point

Q O
4) In figure 1, determine the magnitude of the overall DC transconductance of the two-stage opamp (i.e. output current divided by input differential voltage) in mS.

Less
.
m
No, the answer is incorrect.
Score: 0 = so
Accepted Answers:
(Type: Numeric) 20
1 point

& 5) Determine the overall DC loop gain of the circuit of figure 2 (1.e. with C-R loading) in dB. Round off your answer to 2 decimal places.

No, the answer is incorrect.


Score: 0
Accepted Answers:
(Type: Range) 65,67
1point
1 point

&
6) Determine the value of the unity-gain frequency of loop gain in MHz.

No, the answer is incorrect.


Score: 0
Accepted Answers:
(Type: Range) 24.4

1 point

=
7) Determine the position of the dominant pole in Hz. Round off your answer to 2 decimal places.

No, the answer is incorrect.


wr
Score: 0
Accepted Answers:
Up, =
(e
(Type: Range) 1200,2000

1 point

-
8) Determine the position of the non-dominant zero in MHz.

No, the answer is incorrect.


Score: 0
Accepted Answers:
(Type: Range) 20,44
Wir
tor)=
=
1 point
9) Determine the position of the non-dominant pole in MHz. Round off your answer to 2 decimal places.
202 Mal
we

No, the answer is incorrect. tor = 32 MHz


Score:
Accepted Answers:
(Type: Range) 20,44
1point
10) Determine the phase margin of the loop of figure 2, in degrees. Round off your answer to 2 decimal places.

No, the answer is incorrect.


Score: 0
Accepted Answers:
(Type: Range) 75,105
1 point
Analog lC Design MÌOC
Solutions to Assignment 4: Opamp at the block level
Problems1through 10:
DC gain of the first stage = Gm1/Go1= 20uS/0.2uS = 100 =40dB
DC gain of the second stage = Gm2/Go2 = 200uS/2uS = 100 = 40dB
Overall DC gain of the opamp = 40+ 40 = 80dB

If a small-signal differential voltage v is applied to the opamp, the voltage at the output of the first
stage = 100v

The second transconductor develops an output current = Gm2 * 100v


Therefore, the magnitude of the overall transconductance of the twO-stage opamp 100*Gm2 =
20mS

Denote Load conductance by GL= 1/(RL) = 1/(125kQ) - 8uS


DC gain of the circuit of figure 2 = (Gm1/Go1)* [Gm2/(Go2 + GL)]
= 100°[200uS/(2uS+8uS)] = 2000 = 66.02 dB
Value of unity gain frequency of loop gain in rad/s = Gm1/C = 20uS/1pF = 20 Mrad/s
Value of unity gain frequency of loop gain in MHz = 20/6.28 MHz = 3.18 MHz
Let us assume that the non-dominant pole and zero are outside the unity gain frequency. Therefore:

Position of dominant pole = (unity gain frequency)/DC gain= 3.18 MHz/2000 = 1590 Hz

Position of non-dominant zero in rad/s = Gm2/C = 200uS/1pF = 200 Mrad/s


Position of non-dominant zero in MHz = 200/6.28 = 31.8 MHz (this lies outside unity gain frequency)

Approximate position of non-dominant pole in rad/s = Gm2/CL = 200u5/1pF = 200 Mrad/s


Approximate position of non-dominant pole in MHz = 200/6.28 = 31.8 MHz (this too lies outside
unity gain frequency)

Both non-dominant pole and zero lie at 10X the unity gain frequency. Therefore, they do not affect
the phase at the unity gain frequency. Therefore, the phase at the unity gain frequency is only due to
the dominant pole.
Total phase at unity gain frequency = -90 degrees.
Therefore, phase margin = 90 degrees.

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