Virtual Synchronous Machine Control with Virtual

Resistor for Enhanced Short Circuit Capability

Christoph Glöckler∗ , Daniel Duckwitz† , Friedrich Welck‡
Fraunhofer Institute for Wind Energy and Energy System Technology,
Division Energy Process Engineering, Control Engineering
Königstor 59, 34119 Kassel, Germany
∗ [email protected], † [email protected], ‡ [email protected]

Abstract—Increasing shares of power electronic converters Grid Generator

in renewable generation challenge power system stability. For
very high shares the state of the art current-control approach
should be replaced by grid forming control schemes. The virtual
synchronous machine (VSM) approach is grid forming and fully r2 + jx2 r1 + jx1
compatible to conventional synchronous-machine-based power
plants. The high fault currents of synchronous machines are Fig. 1. Equivalent circuit diagram of a virtual synchronous machine connected
also replicated and lead to excessive current ratings of the to an infinite bus grid model. The location of the grid fault is marked.
semiconductors. Current control could be applied again during
faults, however the grid-forming property is lost when it is most
needed. We propose a VSM with a virtual resistor that reduces implementation that is operated with direct voltage output, i.e.
fault currents while the grid forming functionality is maintained.
For the most severe fault the peak current amplitude is without fast inner voltage control loops [14].
reduced to 2.5 times the nominal current. Swing mode and Replicating the short-circuit behavior of a synchronous ma-
high-frequency stability is investigated in detail. The results have chine is a major challenge for VSM. The single-line diagram in
been confirmed by experiments. The over-current requirements Fig. 1 depicts the equivalent circuit of a VSM with machine
and thus component cost can be reduced drastically through the
application of a virtual resistor. Nonetheless, an increased current
impedance z1 = r1 + jx1 , grid impedance z2 = r2 + jx2
rating of the hardware is required to handle severe faults. System and the location. Fig. 2 depicts the simulation of a voltage
studies should be performed to confirm the method on system dip to Vfrt = 20 % for 200 ms at a grid with a short-circuit
level. ratio SCR = 1/x2 = 23. The VSM current space-phasor
Index Terms—Control design, dc-ac power converters, short amplitude reaches a peak of ten times the nominal current
circuit capacity, power conversion.
(case r1 = 0.01 pu) and oscillates with synchronous frequency
50 Hz. Semiconductors in typical inverters are selected accord-
I. I NTRODUCTION
ing to the steady-state nominal power with a typical over-
Power systems with large penetration of renewable energy current capability of approx. 2I0 for 1 ms [15]. Designing
are fed by a high share of power electronic generators (PEG), hardware for a VSM with equal over-current capability as a
i.e. wind farms, photovoltaic plants and battery storages. Grid SM would thus require to increase the current rating of the
forming control of at least some PEGs is required to allow the semiconductors tenfold, i.e., increase chip surface area by that
operation without synchronous machines (SM) in case of (a) factor.
an all-inverter island grid [1] or (b) an emergency islanding To reduce the fault current an additional series resistor can
situation due to a severe fault (see [2], [3], [4]). Situations be added to the inverter: the synchronous frequency oscillation
with very high shares of PEG occur frequently in countries decays much faster and the average value of the fault current
with large-scale renewable integration (e.g. [5], [6]). decreases, see Fig. 2. Values of r1 = 0.1 pu and 0.3 pu reduce
Virtual synchronous machines (VSM) are PEGs with a the peak to 5I0 and 3I0 , respectively. With a series resistor
control scheme that replicates the behavior of synchronous the inherent fault current of a SM is replicated, but peak
machines. Thus, VSM are both grid-forming and fully com- and average values are reduced to a more manageable level.
patible to conventional power plants. During faults, SM and However, a series resistor in the range 0.1 pu...0.3 pu would
VSM inherently supply active and/or reactive power to balance cause unacceptable losses.
and stabilize the system. This paper proposes a virtual resistor (VR) as in [16], [9]
Multiple VSM implementations have been described [7], to reduce fault currents of the VSM in order to reduce the
[8], [9], and some are equivalent [10] to classical droop requirement for over-rating semiconductors. In contrast to a
control schemes for battery inverters (see [11], [12], [13]). physical resistor, the VR has no physical losses and does not
Surveys were conducted for VSM in [10] and for droop disturb normal operation.
control in [1]. This paper deals with a third-order-model VSM Section II describes an inverter model and the VSM+VR
978-1-5386-1953-7/17/$31.00 c 2017 IEEE control scheme. Simulation results are presented in Section III

Published in the proceedings of "The 7th IEEE International Conference on Innovative Smart Grid
Technologies" (IEEE PES ISGT Europe 2017), September 27, 2017, Torino, Italy.

© 2017 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for
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 r2 i r1
l2 l1
c
vg vb
vc
rc

Reference frame transformation δ

vc vad vb∗
Gad
i vvc
Power Gvc
P Q
Q∗ - 1 1
hi e
Fig. 2. Voltage dip to Vfrt = 20 % for 200 ms, short-circuit ratio SCR = 23 ku Tu s+1 0
with a variation of the inner resistor r1 . e∗
P∗ - 1 ω ω0 δi
∗ - Ta s s
and experimental results follow in Section IV. Section V ω -
concludes the paper with a discussion and an outlook.
kpf ω0 kdf
II. M ODELING AND C ONTROL D ESIGN
The VSM control scheme is operated on a voltage-source Fig. 3. Model of the VSM controlled inverter - LCL filter (top) and control
inverter. A third-order model of the SM replicates the me- scheme (bottom); the VSM angle δ defines the control dq-coordinate system.
chanics of the machine (swing equation) and the excitation
system with automatic voltage regulator (AVR). The scheme
The bridge voltage vb is the input of the LCL system and the
is related to droop control schemes [10], but different in two
bridge current i and filter capacitor voltage vc are the outputs,
aspects: (1) the frequency droop can be disabled and (2) the
see Fig. 3. The LCL model and discretization rule are given
acceleration time constant Ta is an explicit parameter. The
in [3].
effect of the damper winding is replicated by the feed-forward-
damping approach ([11], [13], [14]) without increasing the B. VSM interface
model order. The inner voltage e and the machine angle δ are
The synchronous machine model requires measured active
the outputs of the model and form the voltage reference for
and reactive power P and Q, which are directly calculated
the inverter power module. The impedances z1 = r1 + jx1
from i and vc . The VSM model provides the reference
and z2 = r2 + jx2 of the inverter’s LCL filter form the output
machine voltage e and the machine angle δ which is used for
impedance of the VSM inverter and are the equivalent to the
the angle-modulation, see Fig. 3. The reference bridge voltage
SM’s transient reactance x0d (the grid impedance is added to
z2 in the model). No inner fast controls for voltage or current vb∗ = e + vvc + vad (2)
are present (see [10] for alternative VSM implementations).
Subsequently the inverter hardware model, the VSM interface is enhanced with feedback loops for the virtual resistor (vvc )
and VSM core are introduced. Active damping attenuates the active damping (vad ). vb∗ needs to be transformed to the grid
LC filter resonance. Virtual resistor control is the main concern coordinate system by applying the angle φ = −δ to the dq-
of this paper - it is introduced in Section II-D and its impact transformation:
on stability and dynamics is assessed.
 
cos(φ) sin(φ)
xgrid = · xvsm . (3)
A. Inverter model − sin(φ) cos(φ)
A semiconductor bridge, the LCL filter and the control Measurements of vc and i are transformed to the machine
system form the hardware of the inverter. An average model, dq-system by applying the angle φ = δ.
i.e. a controlled voltage source, is applied to represent the
semiconductor bridge. We use the vector notation C. VSM control
T The third-order synchronous machine model is the core
x = [xd xq ]
of the VSM. The P-branch describes the mechanical part
to denote the quantities in a dq-reference frame. The LCL filter of a synchronous machine by linking the power balance to
is modeled in dq-coordinates as a linear time-discrete MIMO frequency and machine angle through two integrations:
transfer function:

i
 ω̇ = 1/Ta (P ∗ − P − Pp )
= GLCL (z) · vb . (1) (4)
vc δ˙i = ω0 ω,
 where P ∗ is the reference power and P measured power. TABLE I
Proportional frequency control may be added through the term C ONTROL PARAMETERS
Pp = kpf (ω ∗ − ω). Ta is the acceleration time constant of the
Ta = 10 s kdf = 0.2 kpf =0
machine; ω0 is the rated frequency. Feed-forward damping Tu = 1s ku =2
replicates the effect of the damper winding [11], [14], as it flead = 0 Hz flag = 1936 Hz kll =1
superimposes an angle proportional to frequency:
TABLE II
δ = δi + kdf ω0 ω. (5) VSM EIGENFREQUENCIES AND DAMPING RATIOS
The reactive power branch is reduced to first-order dynamics SCR = 23 SCR = 4
relating the inner voltage amplitude e: Swing Sync. Res Swing Sync. Res
rv f in Hz ζ f ζ f ζ f ζ
1
ė = (ku (Q∗ − Q) + e∗ − e) 0 4.0 92 % 55 51 % 1.6 71 % 58 53 %
Tu (6) 0.1 2.8 51 % 87 82 % 1.5 54 % 68 68 %
T 0.3 1.7 14 % 184 95 % 1.2 29 % 95 84 %
e = [e 0] ,
where ku defines a voltage droop and Tu is the low-pass time
constant of the Q-branch. The resulting pole locations for the VSM control without
virtual resistor are shown in blue in Fig. 4 for SCR = 23.
D. Virtual Resistor Active damping results in a damped LC resonance for all val-
A virtual resistor rv is implemented to increase the inner re- ues of rv . Increasing the virtual resistor increases damping of
sistance of the machine. The virtual voltage drop is calculated the synchronous resonance (center plot) and reduces damping
from the measured inverter current: of the swing mode (right plot). Instability of the swing mode

−rv 0
 occurs for rv > 0.48 pu. The eigenfrequencies and damping
vvc = Gvc · i = ·i (7) ratios for specific values of rv are given in Table II, along
0 −rv
with the values for SCR = 4. Eigenfrequencies are strongly
and added to the VSM reference voltage, see (2). dependent on the SCR value, while damping remains in the
same range.
E. Active LC damping
The reduction of damping of the swing mode with increas-
Damping is increased by feeding back the measured capac- ing rv is related to increased cross-coupling of the active and
itor voltage vc to the reference voltage vb∗ through a lead-lag reactive power branch. Figure 5 and Fig. 8 depict P ∗ step
filter according to [17]: responses of active and reactive power for different values of

Gll (s) 0
 rv . Decoupling schemes [12] could mitigate this effect, but
vad = Gad · vc = · vc (8) are beyond the scope of this paper.
0 Gll (s)
s + ωlead III. S IMULATION
Gll (s) = kll . (9)
s + ωlag In this section, the results of the control design are verified
All equations given above are linearized and discretized with a nonlinear model in Matlab SimPowerSystems. For this
using the first-order-hold equivalent method with sampling paper, an average model was chosen since the relevant system
time Ts = 1/8000 s. eigenvalues are far below the switching frequency.

F. Control Design A. Verification

The VSM core parameters are chosen to represent a real The simulation results of the linear discrete model (Lin)
synchronous machine (RSM). Swing damping is increased and a nonlinear average model (Sim) are presented in Fig. 5.
beyond the level achievable in RSMs to avoid overshoot and The linear model is valid as long as the coupling between
oscillations of active power. The LC damping controller is active and reactive power is low (Fig. 5, left) and differs with
designed to damp oscillations while minimizing the feedback increasing values for rv (Fig. 5, right).
gain at low frequencies. The chosen voltage droop and time At the operating point P = 0.5 pu, instability occurs for
constant ensure an inherent, instant reaction to low voltage rv > 0.47 pu. Since both models react responses coincide,
events with reactive power, while the reactive power setpoint control design in the linear model is applicable.
is tracked with reasonable delay and reasonable steady-state B. Low Voltage Fault
deviation. The control parameters are given in Table I and The maximum current amplitude of the voltage dip is
hardware parameters are given in Table III. Two grid config- investigated for different values of rv . The fault duration is
urations are considered subsequently: 200 ms and different values for the voltage dip are simulated
• SCR = 23, representing the laboratory configuration in the average model utilizing the SimPowerSystem model
• SCR = 4, representing a unit connected via two trans- suite. The pre-fault steady-state power is 0.5 pu. Fig. 6 de-
formers and a moderately long line. picts the maximum inverter current caused by the fault for
 Full View Zoom - Synchronous Resonance Zoom - VSM Core
#10 -3
0.1 3
1 r_v = 0
LC Filter r_v = 0.5
2
0.05
Imaginary Axis 0.5
1
Syn. R. VSM Core
0 0 0

-1
-0.5
-0.05
-2
-1
-0.1 -3
-1 -0.5 0 0.5 1 0.6 0.8 1 0.996 0.998 1
Real Axis Real Axis Real Axis

Fig. 4. Root locus of the VSM for a variation of virtual resistor rv with SCR = 23; Increasing rv increases damping of synchronous resonance and
decreases damping of swing mode. See Table II for eigenfrequencies and damping and comparison to SCR = 4.

Fig. 6. Maximum inverter current during voltage dips at the infinite bus with
SCR = 23 (top) and SCR = 4 (bottom) at P = 0.5 pu.

Fig. 5. Comparison of the nonlinear average model against the linear model
with rv = 0 pu (left) and rv = 0.2 pu (right).
Lab Converter PM90F33 Ametek
Grid L1
i L1 L2 RS270

SCR = {23, 4}. Maximum current decreases with greater

VAC2 Cf VC CDC VDC Cf VC VAC
values of rv (see Fig. 2) and for lower SCR.
The gray data point in Fig. 6 (Vfrt = 0) is due to an angle to DC/2 to DC/2

instability of the VSM, see Eq. (4). An adjustment of the FPGA

active power setpoint during the fault could mitigate this issue
RT Target PC
but is intentionally not implemented. Short-circuit currents are
reduced significantly by the virtual resistor: With SCR = 4 Fig. 7. Laboratory setup with an inverter connected to the grid (left) and to
and rv = 0.3 pu the peak current is reduced to 2.5 pu for the an AC voltage source (right).
most severe fault.
IV. E XPERIMENTAL VALIDATION
This section presents measurement results in order to val- in Table III. The left hand side of the converter is used to
idate the model and demonstrate the performance during provide power and tightly control the DC voltage VDC while
voltage dips. the right hand side is controlled as VSM. The AC voltage
source provides constant AC voltage and is programmed to
A. Laboratory Setup induce voltage dips, thus emulating short circuit grid faults.
The setup consists of an AC/DC/AC converter (PM90F33) Currents and voltages of the VSM are measured through the
connected to the grid (Fig. 7, left hand side, Lab Grid) inductor L1 and at the capacitor C. The converter’s outer
and a programmable AC voltage source (Fig. 7, right hand inductance L2 acts as the grid impedance. Combined with the
side, Ametek R270). Specifications of the device are given AC voltage source it emulates a grid with SCR = 23.
 TABLE III
H ARDWARE S ETUP

90 kVA converter: TriPhase PM90F33

Rated voltage V0,RMS 230 V Filter inductor l1 0.09 pu
Rated power S0 90 kVA Series resistancea r1 0.1 pu
Rated current I0,RMS 130 A Filter capacitor c 0.03 pu
Rated frequency f0 50 Hz Series resistance rc 0.003 pu
PWM frequency fs 8 kHz Grid inductorb l2 0.04 pu
Control frequency fctrl 8 kHz Series resistanceb r2 0.03 pu
DC capacitor CDC 1 pu Grid inductorc l2 0.25 pu
DC voltage VDC 700 V Series resistancec r2 0.05 pu
a Estimated value: r1 = 0.1 pu at the operating point P = 0.5 pu
giving a good match of simulation and experimental data.
b SCR = 23. c SCR = 4.

90 kVA AC voltage source: Ametek RS270-3PI-400 in source mode

Fig. 9. Instability observed in the laboratory by changing rv .
Voltage VAC,RMS 230 V Frequency fAC 50 Hz

TABLE IV
M INIMUM VOLTAGE DIP EXPERIMENTED IN THE LAB WITH SCR = 23.

P = 0.25 pu P = 0.5 pu
rv Vfrt max(Iinv ) Vfrt max(Iinv )
0 pu 90 % 1.02 pu 90 % 1.26 pua
0.1 pu 80 % 1.17 pu 90 % 0.88 pu
0.2 pu 70 % 1.26 pu 80 % 1.12 pub
0.3 pu 70 % 1.03 pu 70 % 1.22 pu
a see Fig. 10 b see Fig. 11

with SCR = 23. The fault duration is 200 ms and the pre-fault
steady-state power is 0.5 pu. With respect to the simulation
results from Fig. 6, only certain voltage dips can be tested
before exceeding the the current limit of the inverter. Table IV
Fig. 8. Comparison of experimental data (solid) against the nonlinear model
(dashed)
shows the minimum voltage, which we could test successfully.
Due to the virtual resistor, the range of the fault voltage could
be extended from 90 % down to 70 %.
B. Verification Figure 10 and Fig. 11 depict the result of experimental
To verify the nonlinear model (dashed) with the experimen- voltage dips (Lab). Reactive power is injected during the fault
tal setup (solid), a P ∗ change for different values of rv is inherently. It can be seen that the simulation results (Sim)
conducted (see Fig. 8). With greater coupling of active and with r1 = 0.1 pu are only valid close to the operating point.
reactive power, the two results differ. We assume it is due to For the maximum current at t ≈ 0, r1 = 0.04 pu is a better
a nonlinear behavior of the effective value of r1 . At t = 0 s a approximation, which is another indication for the nonlinear
delayed response in the power output can be observed, which behavior of r1 .
we assume is due a nonlinear effect of r1 close to the operating
V. C ONCLUSION
point P = Q = 0 pu. At about t = 0.17 s, the voltage
source has a switching event in its control resulting in a ripple The virtual resistor is a simple addition to the VSM to
especially observable in the reactive power. reduce fault currents of the VSM drastically while keeping
To further verify the model, the value of rv was changed the inherent reaction of injecting reactive power.
while the inverter is in steady-state condition with P = 0.5 pu, Reasonable values for the VR that guarantee stability have
see Fig. 9. Instability occurs for rv > 0.48 pu, which is similar been selected and the short-circuit behavior was investigated.
to the stability limit observed in the nonlinear model. These theoretical results have been confirmed by laboratory
experiments. The maximum fault current amplitude with VR
C. Low Voltage Fault is reduced to 2.5 pu.
In this section, experimental results of low voltage fault Component costs for over-current capabilities can be re-
scenarios at the voltage source are given. Since the inverter is duced through the VR. For state-of-the-art hardware with strict
directly connected to the voltage source, the l2 impedance of current limits, the rating may still be exceeded during severe
the filter represents the grid impedance, leading to a strong grid faults with Vfrt < 70 %.
 applied. Second, a decoupling scheme for the active and
reactive power branches can increase the maximum value for
rv and improve the control quality of active and reactive
power. Third, EMT-grid studies need to be conducted, to verify
power system stability with the proposed control strategy.
ACKNOWLEDGMENT
The authors would like to thank the German Federal
Ministry for Economic Affairs and Energy for funding this
research within Transstabil-EE (FKZ: 0325796A).
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