IEEE 2006 Custom Intergrated Circuits Conference (CICC)

Delta-Sigma Modulation in Direct Digital Frequency Synthesis

Dayu Yang1, Weining Ni2, Foster F. Dai1, Yin Shi2 and Richard C. Jaeger1

1 Dept. of Electrical and Computer Eng., 200 Broun Hall, Auburn University, Auburn, AL 36849-5201, USA
2 Institute of Semiconductors, Chinese Academy of Sciences, China

ABSTRACT: This paper presents comparisons of various where Fr is the input frequency control word with L bits and
∆Σ modulations in direct digital frequency synthesis. ∆Σ W is the length of phase word to address the accumulator.
modulators such as MASH, feedforward, feedback and error In order to reduce the ROM size, one can either truncate
feedback have been implemented in both phase and frequency the phase accumulator output from L bits to W bits. With a
domains in a CMOS DDS. The DDS prototype is fabricated phase word truncation, we define B to be the number of bits
in a 0.35µm CMOS technology with core area of 1.7x2.1 mm2 truncated such that L-W=B. The output of the DDS becomes
and total 75 mA current. Measured DDS output demonstrates S ( n ) = sin 2π
2 B Fr
n (2)
t
that frequency domain ∆Σ modulation achieves better SFDR 2L 2B
and SINAD than phase domain ∆Σ modulation. where the operator [] represents truncation to integer values.
Equation (2) can alternatively be expressed as
Keywords: DDS, ∆Σ modulation, DAC, frequency synthesis.
2π
S t (n) = sin [Fr ⋅ n − ε p (n)] (3)
2L
where εp(n) represents the phase error sequence. Applying
1. INTRODUCTION trigonometric identities, Eq. (3) can be rewritten as
As illustrated in Fig.1, a conventional direct digital Fr ⋅ n ε p (n) Fr ⋅ n ε p ( n) (4)
S (n ) = sin 2π
t cos 2π − cos 2π sin 2π
synthesizer (DDS) consists of a numerically controlled 2L 2L 2L 2L
oscillator (NCO) and a digital-to-analog converter (DAC). Assuming εp(n)<< 2 , we get L

The NCO further includes a phase accumulator and a lookup Fr ⋅ n ε p ( n) Fr ⋅ n (5)

St (n) = sin 2π − 2π ⋅ cos 2π
table that transforms digital phase information to digital 2L 2L 2L
amplitude information. The DDS output spectrum contains Therefore, the output spectrum of the DDS is composed
spurious components mainly due to phase word truncation of a sine wave at the desired output frequency corrupted by
before the ROM lookup table. The periodic truncated phase the cosine modulated harmonics of the phase errorεp(n). The
error sequence causes spurs in its output spectrum. Although periodic sequence εp(n) can be expressed as Fourier series.
∆Σ modulators have been implemented in both frequency [1] Thus, the conventional DDS with phase truncation ends up
and phase [2] domains in DDS to reduce the spurs, their noise with spurs at different places in its output spectrum.
shaping effects and design tradeoffs haven’t been thoroughly
compared. In this paper, for the first time, we compare and
implement eight different ∆Σ modulators including MASH,
feedforward, feedback and error feedback in both frequency
and phase domains in a CMOS DDS chip. The noise shaping
effects, in-band SFDR, SINAD, operation speeds, and
stability are compared according to measured results.

Fig. 2. Phase domain ∆Σ modulation in DDS.

In order to reduce spurs due to phase truncation, we

apply ∆Σ modulation in phase domain, as shown in Fig. 2.
The phase word Fr⋅n after the accumulator is truncated into
Fr⋅n -εp(n)(W bits) and εp(n) (B bits). The phase error εp(n) is
fed into a ∆Σ modulator. The modulator’s output Ep(n) is
expressed as a single-bit or multi-bit word and added back to
Fig. 1. A conventional direct digital frequency synthesizer. the truncated phase.
Using a linear model for delta-sigma modulators, we get
2. PHASE DOMAIN ∆Σ MODULATION E p ( z ) = ε p ( z ) + Q ( z )(1 − z −1 ) k = ε p ( z ) + Noise ( z ) (6)
In an ideal DDS without phase truncation (L = W) and where Q(z) is the quantization noise from the quantizer inside
with infinite amplitude precision, the output sequence of the the modulator and k is the order of the modulator. We can
NCO is given by rewrite (6) as
E p (n) = ε p (n) + Noise(n) (7)
S (n ) = sin 2π
Fr
n
(1)
2L where the modulated quantization noise, Noise(n), is the
inverse Z-transform of Q(z)(1-z-1)k.

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 The DDS output is thus given by PE ( z ) = pe( z ) + Q ( z )(1 − z −3 ) = pe( z ) + Noise ( z ) (12)
2π
St (n) = sin L [Fr ⋅ n − ε p (n) + Ep(n)] where Q(z) is the quantization noise introduced by the ∆Σ
2 (8) modulator.
2π
= sin (Fr ⋅ n + Noise(n)) With the frequency domain ∆Σ modulation, the DDS
2L output is given by
Assuming Noise(n ) << 2 L , we obtain
Fr
S t ( n ) = sin 2 π n + PE ( n ) ⋅ n 2W
Fr ⋅ n Noise( n) Fr ⋅ n (9) 2B (13)
St ( n) = sin 2π − 2π ⋅ cos 2π
2L 2L 2L Fr
= sin 2 π n + pe ⋅ n + Noise ( n ) ⋅ n 2W
In equation (9), the modulated quantization Noise(n) 2B
takes place of the original phase error εp(n). Thus, spurs ≈ sin 2 π
Fr ⋅ n
− cos 2π
Fr ⋅ n
⋅ 2π
Noise ( n ) ⋅ n
introduced by the phase truncation are reduced, and 2L 2L 2W
modulated quantization noise with high frequency shaping
shows up in the spectrum. ∆Σ modulators with different noise Thus, the DDS output spectrum is composed of a sine
transfer functions thus lead to different DDS output spectra. wave at the desired output frequency and a cosine wave that is
modulated by the quantization noise shaped by the ∆Σ
3. FREQUENCY DOMAIN ∆Σ MODULATION modulator. Based on the linear model of a ∆Σ modulator, the
∆Σ modulation can also be implemented in the frequency periodic phase error due to frequency word truncation is
domain of a DDS. For frequency word truncation, the reduced. Instead, the modulated quantization noise from the
frequency word Fr is truncated from L bits to W bits before modulator occurs at the DDS output.
the phase accumulator. The discarded frequency bits B=L-W,
and the output sequence of the DDS ROM become 4. COMPARISON OF MEASURED NCO OUTPUT SPECTRA FOR
VARIOUS ∆Σ MODULATORS
Fr ( Fr / 2 B )
S ( n ) = sin 2 π n = sin 2 π ⋅n
2 L
2W (10) Although various ∆Σ modulators in both the phase
domain and frequency domain can move the spurs and
= sin 2 1 − W π
Fr
2B
⋅ n + Fr −
Fr
2B
⋅ 2B ⋅ n (2 )
B
quantization noise to a high frequency band, their
performances on noise shaping are different. To compare
Fr various ∆Σ modulator performances, we consider factors such
= sin 2 π n + pe ⋅ n 2W
2B as the modulator topology, the order of the modulator, the
where the operator [] represents truncation to an integer and modulator input, the in-band spurious tones, the number of
the frequency error due to frequency word truncation is quantizer bits, the modulator speed and area, etc. We first
implemented an NCO with several types of ∆Σ modulators in
Fr (11) both frequency and phase domain in FPGA as shown in Fig. 4.
Fr − ⋅2B 2B = pe
2B The NCO output is captured into a PC for analysis. First we
analyze the output characteristics such as the spurious-free-
As shown in (10), the phase accumulator size can be
dynamic-range (SFDR), defined as the ratio between the
reduced to W bits if the input frequency word Fr is truncated
fundamental signal and the highest spurs and the signal-to-
to [Fr/2B].
noise-and-distortion ratio (SINAD) shown in (14).
The frequency word truncation will also cause a phase
error (pe⋅n) which is periodic in nature and thus leads to spurs Signal (14)
SINAD = 20 ⋅ log
at the DDS output. If the input word Fr≤ 2B, then [Fr/2B]=0 , SUM (Noise + Harmonics )
there will be no DDS output due to frequency word truncation.
However, to avoid losing frequency information, the constant The oversampling ratio (OSR) of the ∆Σ modulator is
frequency error pe needs to be modulated and added back to chosen as 64 and the band of interest is from zero to 1/64 of
the accumulator. the clock frequency.
The measured in-band SINAD and SFDR of the NCO
output with various ∆Σ modulators are given in Fig. 5. The
measurements show that without ∆Σ modulation, direct phase
truncation has a low SFDR and SINAD. With ∆Σ modulation,
in-band SFDR and SINAD increase. In phase domain
modulation, the phase error pe (L-W bits LSBs) has different
repeating periods with respect to different Fr, which leads to a
Fig. 3 Proposed DDS with frequency domain ∆Σ modulation. varying the input to the modulator. In contrast, frequency
domain modulators have constant dc input. As a result, the
As shown in Fig. 3, the modulated frequency error pe is frequency domain ∆Σ modulation has higher SFDR and
added back to the truncated Fr that is represented by [Fr/2B]. SINAD than phase domain. Although using a high-order ∆Σ
Note that in Fig. 3, the ∆Σ modulator’s input pe is constant, modulator results in sharper noise shaping effect, it suffers
which benefits the modulator design with improved stability, from degraded SFDR and SINAD.
input range and speed. The noise shaped frequency error is
thus a series of numbers and is given by

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 modulator. MASH-111 has three 1-bit quantizers, while the
feedback type modulator has a multi-bit quantizer and the
error feedback ∆Σ modulator has one single-bit quantizer. A
feedforward type ∆Σ modulator is first presented in the
frequency domain in [1]. It’s a 2nd order feedforward type
with a multi-bit quantizer. The modulator’s order can be
increased by adding more accumulators in cascade and
different noise transfer functions can be obtained by varying
1 1 z −1
1 − z −1 1 − z −1 1 − z −1 the feedforward coefficients k1, k2, k3. We propose a
feedforward2 ∆Σ modulator with coefficients of k1=2.2,
k2=1.92, k3=0.72.
Fig. 6 compares the noise transfer function of MASH,
feedforward1 [3], and the proposed feedforward2 modulator.
It’s clear that MASH has much sharper noise shaping effect
in-band. But it has high out-of-band noise that requires a
high-order LPF for noise rejection. The feedforward2
modulator has lower in-band noise compared with existing
z −1 z −1 z −1 feedforward1 modulator and has flat out-of-band noise
1 − z −1 1 − z −1 1 − z −1
compared with MASH type. Fig. 7 gives the measured NCO
output spectrum for two types of ∆Σ modulators. The
measured spectra of the two ∆Σ modulators are almost
identical with the modulated noise. Multi-bit quantizer inside
the modulator can make feedback signal match input signal
Fig. 4. Four types ∆Σ modulators implemented in a DDS and NCO for more accurately and make the quantization noise more
comparison.
random, which better fits the liner model for ∆Σ modulators.

Fig. 6 simulated noise transfer function of MASH and feedforward Σ∆

modulators.
Normalized Power Spectrum of the DDS Output Normalized Power Spectrum of the DDS Output
0 0

-20
-20
-40
-40
-60
Power(dB)

Power(dB)

-80 -60

-100 -80

-120
-100
-140
-120
-160

-180 -5 -4 -3 -2 -1 0
-140 -5 -4 -3 -2 -1 0
10 10 10 10 10 10 10 10 10 10 10 10
Digital Frequency (Fout/Fclk) Digital Frequency (Fout/Fclk)

(a) NCO output spectrum with (b) NCO output spectrum with
3rd order MASH type delta- frequency domain 3rd order
sigma modulation in frequency feedforward2 ∆Σ modulation
domain(1-bit quantizer). (multi-bit quantizer).
Fig. 7 Comparison of Measured NCO output spectrum with different noise
shaping effects.
Fig. 5. Measured in-band SINAD and SFDR of the NCO output with various
∆Σ modulators in frequency and phase domains.
Although feedforward modulator can increase in-band
SINAD by a few dB, it has drawback of instability. In
Since the modulated quantization noise dominates the
contrast, a MASH type modulator is good for its high speed,
DDS output spectrum, its noise transfer function He(Z) can
sharp slope and full input dynamic range, and it is always
greatly affect the DDS output. We implemented four types of
stable. The drawback of a MASH modulator lies on its fixed
∆Σ modulators, i.e., MASH, feedforward, feedback and error number of output bits. The error feedback has the same noise
feedback as shown in Fig.4. MASH, feedback and error transfer function as that of MASH except for its lower speed.
feedback type ∆Σ modulators have the same noise transfer However, error feedback modulator can flexibly choose the
function of He(Z)=(1-Z-1)k, where k is the order of the

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number of output bits. Feedback modulator also has the same modulators are shown in Fig. 9. It’s clear that the in-band
noise transfer function as MASH and it also has an advantage spurs shown in Fig. 9(a) are reduced in Fig. 9(b).
of a multi-bit quantizer, but it has stability problem. The
proposed feedforward2 ∆Σ modulator is good for both in-
band and out-band performances, but its implementation
requires more hardware and its speed is lower.

5. IMPLEMENTATION OF DDS WITH VARIOUS ∆Σ

MODULATORS IN 0.35µµM CMOS TECHNOLOGY
To compare the DDS performance with various ∆Σ
modulations, we designed ∆Σ modulators including MASH1- (a) without ∆Σ modulator (b) with frequency domain 3rd order
1-1, 3rd order feedforward, feedback and error feedback ∆Σ MASH ∆Σ modulator
modulators and error feedback ∆Σ modulator as shown in Fig.
Fig. 9 Comparison of the measured output spectra for (a) conventional DDS
4 in both frequency and phase domains. Different ∆Σ without ∆Σ modulation and (b) proposed DDS with frequency domain ∆Σ
modulators can be selected individually while other ∆Σ modulation, fo=750KHz, Fclk=30MHz.
modulators are turned off. Table 1. Performance comparison of ∆Σ modulators in frequency and phase
The proposed DDS with frequency domain and phase domains of DDS. (In-band SFDR and SINAD are measured from NCO)
domain ∆Σ modulator was implemented in 0.35µm CMOS High No.of In- In- Stability Area Speed
Frequency freq output band band (mm2) (MHz)
technology with two poly and four metal layers. A 16-bit domain noise bits SFDR SINAD
accumulator is designed, and 8 phase bits are used for (dBc) (dB)
addressing the look-up ROM. The 12-bit current steering 3rd order poor 3 99.5 87.23 absolutely 0.112 180
MASH 111 stable
DAC is integrated to convert the ROM output to an analog 3rd order fair ≥3 99.4 86.11 fair 0.126 140
signal. For 12-bit amplitude resolution in a conventional DDS Feedback
3rd order good ≥3 103 89.03 poor 0.161 150
without a ∆Σ modulator, at least 12 phase bits should be used, Feedforward
which requires a look-up ROM with 212x12 bits. The use of a 3rd order EF poor ≥3 99.5 87.23 good 0.147 140

∆Σ noise shaper effectively reduces the required number of 4th order EF poor ≥4 85.4 75.15 good 0.148 160
Phase
phase bits. Thus, we use only 8 phase bits to address the domain
ROM, which reduces the ROM size by a factor of 24 or 16 3rd order poor 3 85.4 75.15 absolutely 0.112 180
times compared to that of a conventional DDS without a ∆Σ MASH 111 stable

modulator.
3rd order fair ≥3 84 74.57 fair 0.126 140
Feedback
3rd order good ≥3 87 78.59 poor 0.161 150
Feedforward
3rd order EF fair ≥3 85.4 75.15 good 0.147 140
4th order EF poor ≥4 73 64.10 good 0.148 160

CONCLUSIONS
We have implemented various ∆Σ modulators in both
frequency and phase domains in a CMOS DDS chip. The
measured data demonstrates that frequency domain
modulations have better SFDR and SINAD than their phase
domain counterparts. We have also compare factors such as
input range, quantizer bits, speed and stability for different
type of ∆Σ modulators(table 1). Mash 1-1-1 ∆Σ modulator in
frequency domain provides a good noise shaping means for
Fig. 8 Die photo of the CMOS DDS prototype chip with various ∆Σ DDS application with optimal speed, stability and input
modulators in frequency and phase domain. dynamic range. Feedforward ∆Σ modulator can provide both
The die photo of the fabricated CMOS DDS good in-band noise shaping and flat high frequency
prototype chip is shown in Fig. 8. The total die area is performance. Error-feedback takes advantage in its flexible
2x2.5mm2, in which the DDS active core area is 1.7 x 2.1mm2 output bit numbers.
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