10/2/2018

Indian Institute of Technology Jodhpur, Year 2018

Analog Electronics
(Course Code: EE314)
Lecture 18‐19: MOSFETs, Biasing

Course Instructor: Shree Prakash

Tiwari
Email: [email protected]

Webpage:
b h //h
http://home.iitj.ac.in/~sptiwari/
/ /
Course related documents will be uploaded on
http://home.iitj.ac.in/~sptiwari/EE314/

Note: The information provided in the slides are taken form text books for microelectronics
(including Sedra & Smith, B. Razavi), and various other resources from internet, for
teaching/academic use only 1

MOSFET in ON State (VGS > VTH)

• The channel charge density is equal to the gate capacitance

times the gate voltage in excess of the threshold voltage.
Areal inversion
charge density [C/cm2]: Qinv  Cox (VGS  VTH )

• Note that the reference voltage is the source voltage.

In this case, VTH is defined as the value of VGS at which the channel
surface is strongly inverted (i.e. n = NA at x=0, for an NMOSFET).

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MOSFET as Voltage‐Controlled Resistor

• For small VDS, the MOSFET
can be viewed as a resistor,
with the channel resistance
depending on the gate
voltage.

L 1 L
RON  resistivity   
tinv  W q n ninv tinv  W

• Note that qninv  tinv  Qinv  Cox VGS  VTH 

1
RON 
 nCox
W
VGS  VTH 
L

MOSFET Channel Potential Variation

• If the drain is biased at a higher potential than the source, the
channel potential increases from the source to the drain.
The p potential difference between the ggate and channel
decreases from the source to drain.

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Channel Charge
• MOS structure looks like parallel plate capacitor
while operating in inversions
– Gate – oxide – channel
• Qchannel = CV
• C = Cg = oxWL/tox = CoxWL Cox = ox / tox

• V = Vgc – Vt = (Vgs – Vds/2) – Vt

gate
Vg
polysilicon + +
gate source V gs
Cg Vgd drain
W
Vs - - Vd
tox
channel
n+ - + n+
SiO2 gate oxide
Vds
L
n+ n+ (good insulator, ox = 3.9) p-type body
p-type body

Carrier velocity
• Charge is carried by e‐
• Electrons are propelled by the lateral electric field
between source and drain
– E = Vds/L
• Carrier velocity v proportional to lateral E‐field
– v = E  called mobility
• Time for carrier to cross channel:
– t=L/v

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nMOS Linear I‐V

• Now we know
– How much charge Qchannel is in the channel
– How much time t each carrier takes to cross

Qchannel
I ds 
t
 Cox Vgs  Vt  ds Vds
W V
L 2
W
  Vgs  Vt  ds Vds
V  = Cox
 2 L

nMOS Saturation I‐V

• If Vgd < Vt, channel pinches off near drain
– When Vds > Vdsat = Vgs – Vt
• Now drain voltage no longer increases current

I ds   Vgs  Vt  dsat Vdsat

V
 2

V  Vt 
2
 gs
2

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Charge Density along the Channel

• The channel potential varies with position along the channel:

Qinv ( y)  Cox VGS VTH VC ( y)

• The
Th currentt fl
flowing
i ini the
th channel
h i I D  WQinv ( y)  v( y)
l is
dVC ( y)
• The carrier drift velocity at position y is v( y)   n E  n
dy
where n is the electron field‐effect mobility

Drain Current, ID (for VDS<VGS‐VTH)

dVC ( y)
ID  WQinv( y)  v( y)  WQinv( y)  n
dy
Integrating from source to drain:
L VD
0
I Ddy  WnQinv (VC )dVC
VS

 1 2
I D L  Wn  Cox VGS VTH VC dVC  WnCox VGS VTH VDS  VDS
VD

VS
 2 

W V 
I D  nCox (VGS VTH )  DS VDS
L 2 

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ID‐VDS Characteristic
• For a fixed value of VGS, ID is a parabolic function of VDS.
• ID reaches a maximum value at VDS = VGS‐ VTH.

W V 
I D  nCox (VGS VTH )  DS VDS
L 2 

Inversion‐Layer Pinch‐Off (VDS>VGS‐VTH)

• When VDS = VGS‐VTH, Qinv = 0 at the drain end of the channel.
 The channel is “pinched‐off”.

• As VDS increases above VGS‐VTH, the pinch‐off point (where

Qinv = 0) moves toward the source.
– Note that the channel potential VC is always equal to VGS‐VTH at the
pinch off point
pinch‐off point.
 The maximum voltage that can be applied
across the inversion‐layer channel (from
source to drain) is VGS‐VTH.
 The drain current “saturates” at a
maximum value.

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Current Flow in Pinch‐Off Region

• Under the influence of the
lateral electric field, carriers
drift from the source
(through the inversion‐layer
channel) toward the drain.
• A large lateral electric field
exists in the pinch‐off region:
V  VGS VTH 
E  DS
L  L1
• Once carriers reach the
pinch‐off point, they are
swept into the drain by the
electric field.

Drain Current Saturation

(Long‐Channel MOSFET)

• For VDS > VGS‐VTH: I D  I D , sat   nCox VGS  VTH 2

1 W
2 L

VD , sat  VGS  VTH

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MOSFET Regions of Operation

• When the potential • When the potential
difference between difference between the
the ggate and drain is ggate and drain is equal
q
greater than VTH, the to or less than VTH, the
MOSFET is operating MOSFET is operating in
in the triode region. the saturation region.

Triode or Saturation?
• In DC circuit analysis, when the MOSFET region of operation is
not known, an intelligent guess should be made; then the
resultingg answer should be checked against
g the assumption.
p
Example: Given nCox = 100 A/V2, VTH = 0.4V.
If VG increases by 10mV, what is the change in VD?

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The Body Effect

• VTH is increased by reverse‐biasing the body‐source PN junction:

2qN A Si (2B  VSB )
VTH  VFB  2B 
Cox
2qN A Si (2B ) 2qN A Si (2B ) 2qN A Si (2B  VSB )
 VFB  2B   
Cox Cox Cox

 VTH 0 
2qN A Si
Cox
 
2B  VSB  2B  VTH 0    2B  VSB  2B 
 is the body effect parameter.

Channel‐Length Modulation
• The pinch‐off point moves toward the source as VDS increases.
 The length of the inversion‐layer channel becomes shorter with increasing VDS.
 ID increases (slightly) with increasing VDS in the saturation region of operation.
L  VDS  VDSsat

1 1  L 
I Dsat   1  
L  L L  L 

 nCox VGS  VTH 2 1   VDS  VD ,sat 

1 W
I D , sat 
2 L
 is the channel length modulation coefficient.

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 and L
• The effect of channel‐length modulation is less for a long‐
channel MOSFET than for a short‐channel MOSFET.

Velocity Saturation
• In state‐of‐the‐art MOSFETs, the channel is very short (<0.1m);
hence the lateral electric field is very high and carrier drift
velocities can reach their saturation levels.
– The electric field magnitude at which the carrier velocity saturates is Esat.

v
8  106 cm/s for electrons in Si
vsat  
 6  10 cm/s for holes in Si
6

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Impact of Velocity Saturation

• Recall that I D  WQinv ( y )v( y )

• If VDS > Esat×L, the carrier velocity will saturate and hence the
drain current will saturate:

I D, sat  WQinvvsat  WCox VGS  VTH vsat

• ID,sat is proportional to VGS–VTH rather than (VGS – VTH)2
• ID,sat is not dependent on L
• ID,sat is dependent on W

Short‐Channel MOSFET ID‐VDS

P. Bai et al. (Intel Corp.),

Int’l Electron Devices Meeting, 2004.

• ID,sat is proportional to VGS‐VTH rather than (VGS‐VTH)2

• VD,sat is smaller than VGS‐VTH
• Channel‐length modulation is apparent (?)

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Drain Induced Barrier Lowering (DIBL)

• In a short‐channel MOSFET, the source & drain regions each “support”
a significant fraction of the total channel depletion charge Qdep×W×L
 VTH is lower than for a long‐channel
g MOSFET

• As the drain voltage increases, the reverse bias on the body‐drain PN

junction increases, and hence the drain depletion region widens.
VTH decreases with increasing drain bias.
(The barrier to carrier diffusion from the source into the channel is reduced.)
 ID increases with increasingg drain bias.

NMOSFET in OFF State

• We had previously assumed that there is no channel current
when VGS < VTH. This is incorrect!
• As VGS is reduced (toward 0 V) below VTH, the potential barrier to
carrier diffusion from the source into the channel is increased.
ID becomes limited by carrier diffusion into the channel, rather
than by carrier drift through the channel.
(This is similar to the case of a PN junction diode!)
ID varies exponentially with the potential barrier height at the
source which varies directly with the channel potential.
source, potential

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Sub‐Threshold Leakage Current

• Recall that, in the depletion (sub‐threshold) region of operation,
the channel potential is capacitively coupled to the gate potential.
A cchange
a ge in gate voltage
o tage ((VGS) results
esu ts in a change
c a ge in channel
c a e
voltage (VCS):
 Cox 
VCS  VGS     VGS / m
C C 
 ox dep 

• Therefore, the sub‐threshold current (ID,subth) decreases

exponentially with linearly decreasing VGS/m
ID log (ID) “Sub‐threshold swing”:
1
 d (log10 I DS ) 
S   
 dVGS 
S  mVT ln (10)  60mV/dec
VGS VGS

Short‐Channel MOSFET ID‐VGS

P. Bai et al. (Intel Corp.),

Int’l Electron Devices Meeting,
g, 2004.

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VTH Design Trade‐Off

• Low VTH is desirable for high ON‐state current:
ID,sat  (VDD ‐ VTH) 1<<2

• But high VTH is needed for low OFF‐state current:

log ID
Low VTH
VTH cannot be reduced
High VTH aggressively.
IOFF,low VTH

IOFF,high VTH
0 VGS

MOSFET Large‐Signal Models (VGS > VTH)

• Depending on the value of VDS, the MOSFET can be represented
with different large‐signal models.

VDS << 2(VGS‐VTH) VDS < VD,sat VDS > VD,sat

ID,sat  nCox VGS VTH 1VDS VD,sat

1 W V  1 W
I D,tri  nCox (VGS VTH )  DS VDS
2
RON 
W
 nCox (VGS  VTH ) L  2 2 L
L or
ID,sat  vsatWCox(VGS VTH)1VDS VD,sat

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MOSFET Transconductance, gm
• Transconductance (gm) is a measure of how much the drain
current changes when the gate voltage changes.
I D
gm 
VGS
• For amplifier applications, the MOSFET is usually operating in
the saturation region.
– For a long‐channel MOSFET:
W
g m   nCox VGS  VTH 1   VDS  VD ,sat 
L

g m  2  nCox 1   VDS  VD , sat I D

W
L
– For a short‐channel MOSFET:
g m  vsatWCox 1   VDS  VD , sat 

MOSFET Small‐Signal Model

(Saturation Region of Operation)
• The effect of channel‐length modulation or DIBL (which cause
ID to increase linearly with VDS) is modeled by the transistor
output resistance
resistance, ro.

V DS 1
ro  
I D I D

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PMOS Transistor
• A p‐channel MOSFET behaves similarly to an n‐channel
MOSFET, except the polarities for ID and VGS are reversed.
S h
Schematic
ti cross‐section
ti Circuit symbol

• The small‐signal model for a PMOSFET is the same as that for

an NMOSFET.
– The values of gm and ro will be different for a PMOSFET vs. an NMOSFET,
since mobility & saturation velocity are different for holes vs. electrons.

PMOS I‐V Equations

• For |VDS| < |VD,sat|:

VDS1 VDS VD,sat 

W VDS 
ID,tri  pCox (V V ) 
L  2 
GS TH

• For |VDS| > |VD,sat|:

ID,sat  pCox VGS VTH 1VDS VD,sat

1 W 2
for long channel
2 L
or
ID,sat  vsatWCox(VGS VTH)1VDS VD,sat for short channel

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CMOS Technology
• It possible to form deep n‐type regions (“well”) within a p‐type
substrate to allow PMOSFETs and NMOSFETs to be co‐fabricated
on a single substrate.
• This is referred to as CMOS (“Complementary MOS”) technology.

Schematic cross‐section of CMOS devices

Comparison of BJT and MOSFET

• The BJT can achieve much higher gm than a MOSFET, for a
given bias current, due to its exponential I‐V characteristic.

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Voltage‐Controlled Attenuator

• As the gate voltage decreases

decreases, the output drops because
the channel resistance increases.
• This type of gain control finds application in cell phones to
avoid saturation near base stations.

Application of Electronic Switches

• In a cordless telephone system in which a single antenna is used

for both transmission and reception, a switch is used to connect
either the receiver or transmitter to the antenna.

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Effects of On‐Resistance

• To minimize signal attenuation, Ron of the switch has to be as

small as possible. This means larger W/L aspect ratio and
greater VGS.

MOSFET Biasing
R
The voltage at node X is determined by VDD, R1, and R2: VX  2 VDD
R1  R2
Also, VX  VGS  I D RS

ID  nCox VGS VTH

1 W 2

2 L
 RV 
VGS  V1 VTH   V12  2V1 2 DD VTH 
 R1  R2 
1
where V1 
W
nCox RS
L

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Self‐Biased MOSFET Stage

• Note that there is no voltage dropped across RG
 M1 is operating in the saturation region.

I D RD  VGS  RS I D  VDD

MOSFETs as Current Sources

• A MOSFET behaves as a current source when it is operating in
the saturation region.
• An NMOSFET draws current from a point to ground (“sinks
( sinks
current”), whereas a PMOSFET draws current from VDD to a
point (“sources current”).

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What next
• MOSFET Amplifiers

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