Isolated, Bi-Directional DC-DC Converter for Fuel

Cell Electric Vehicle Applications

Yungtaek Jang, Milan M. Jovanović, Misha Kumar, Juan M. Ruiz, Robert Lu1, and Tony Wei1
Power Electronics Laboratory, Delta Electronics (Americas) Ltd., Research Triangle Park, NC, USA
1
Delta Electronics (Hangzhou) Co. Ltd., Hangzhou, People’s Republic of China

Abstract— An isolated bi-directional dc-dc converter that resonant converter is seen as a drawback [5]-[6]. Specifically, as
exchanges energy between the high-voltage battery (330 V±30%) the input or output voltage range increases, the control frequency
and low-voltage battery (12 V±30%) of fuel cell electric vehicle is range also increases so that driving and magnetic component
introduced. To achieve optimal performance in both directions, a losses also increase, thereby reducing conversion efficiency.
full-bridge (FB) series resonant converter (SRC) is employed Recently, a control technique that significantly improves the
because of its symmetrical input-to-output characteristic and soft- performance of a series resonant converter that operates with a
switching operation. In addition, a novel secondary-switch delay wide input-voltage range and/or a wide output-voltage range by
and/or lead time control method is incorporated with conventional substantially reducing their switching-frequency range has been
frequency control to make the converter operate in a wide voltage
introduced [7]. Reduction in the switching frequency range is
range in both directions and achieve zero-voltage switching (ZVS)
over the entire load range. Moreover, a frequency fold-back is
achieved by controlling the output voltage with a combination
automatically achieved by the lead time control, which makes it of variable-frequency feedback control and open-loop delay-
possible to regulate the output at light load without employing a time control. Variable-frequency control is used to control the
conventional burst-mode control. The performance of the primary switches of the series resonant converter, while delay-
proposed control method was evaluated on a 1-kW prototype time control is used to control secondary-side rectifier switches
operating between the 240-450-V high-voltage battery and the 9.5- provided in place of diode rectifiers.
15.5-V low-voltage battery. To increase the power density of the In this paper, an isolated bi-directional dc-dc converter that
converter, the prototype is implemented by using planar delivers energy between high-voltage battery and low-voltage
magnetics, as well as GaN switches operating above 300 kHz battery of FCV or FCEV is introduced. A full-bridge series
switching frequency. The prototype circuit exhibits the maximum resonant converter is employed as a power stage because of its
efficiency of 96.1%. input-to-output symmetricity for bi-directional operation and
Keywords—bidirectional power conversion; electric vehicle;
soft switching achieved by utilizing leakage inductance of the
auxiliary power module; dc-dc converter; zero voltage switching; LC isolation transformer. The introduced secondary-switch delay
series resonant converter time control incorporated with conventional frequency control
makes the converter operate from the wide voltage range in both
I. INTRODUCTION directions. Moreover, newly introduced lead-time control of the
Generally, a fuel cell vehicle (FCV) or fuel cell electric secondary switches makes the converter achieve ZVS of the
vehicle (FCEV) uses a fuel cell in combination with a high- high-voltage primary side switches over the entire load range
voltage battery to power its on-board electric motor. The high and effective frequency fold-back at light load, which allows the
voltage battery is connected between the fuel cell and the electric converter to regulate the output without burst mode operation.
motor and provides stable and reliable energy to the motor. The Power density of the converter is increased by using a planar
high voltage battery also charges a low-voltage battery that matrix transformer [8] as well as GaN switches to operate above
delivers energy to standard automotive accessories which are 300 kHz switching frequency. The performance evaluation of
designed to run on 12 V. One of the primary functions of the the proposed control method was done on a 1-kW prototype
high-voltage battery is to provide the initial energy for fuel cell operating between the 240-450-V high-voltage battery and the
start-up, i.e., for running a fuel-cell compressor, radiator fans, 9.5-15.5-V low-voltage battery. The prototype circuit exhibits
and coolant pumps [1]-[2]. However, to start-up a fuel cell in an the maximum efficiency of 96.1% with a switching frequency
abnormal situation when the high-voltage battery cannot deliver variation from 300 kHz to 1 MHz.
energy, the low-voltage battery should provide the energy to II. PROPOSED ISOLATED BI-DIRECTIONAL DC-DC
start the fuel cell, which requires an isolated, bi-directional dc- CONVERTER
dc converter that can deliver energy between the high-voltage
battery and low-voltage battery of the vehicle. Figure 1 shows a series resonant converter with block
Resonant converters with variable switching-frequency diagrams of the proposed control. As shown in Fig. 1, the
control are extensively used in state-of-the-art power supplies converter operates with switching frequency fS, which is set by
that offer the highest power densities and efficiencies [3]-[7]. the voltage controller and voltage controlled oscillator (VCO).
However in applications with a wide input-voltage and/or The delay and lead time are produced based upon the sensed
output-voltage range, variable switching-frequency control of a high voltage (HV), low voltage (LV), and LV current

978-1-5386-8330-9/19/$31.00 ©2019 IEEE 1674

 T1 and T2, which makes resonant current iLR increase until
S P1 S P4 TR S S1 S S4 resonant inductor LR stores enough ZVS energy. Providing
LR + optimal lead-time TL that is the time period between T1 and T2
V TR N1 N2 CB
CHV
CR i LR
CLV V LV makes the converter achieve ZVS of the high-voltage side
VHV -
SP2 SP3 SS3
switches over the entire load range.
N1 SS2
n=
N2
As shown in Figs. 2 and 3(c), delay-time control is added
to frequency control when M is greater than 1, i.e., nVLV is
S P1 SP2 S P3 SP4 SS1 SS2 SS3 SS4 higher than VHV. The delay-time control is implemented by
delaying the turn-on/off transition of switches SS1 and SS2 with
isolated DRIVER
respect to corresponding zero crossings of resonant current iLR
DRIVER
SSELECT so that both switches SS2 and SS3 are turned on during delay-
SSELECT LH HL
fS time intervals [T0-T1] and [T3-T4] shorting the LV side winding
VCO
fS HL LH f S & TD DELAY &
sensing &
scaling
of transformer TR as shown in Fig. 3(c). During delay time TD,
I LV
VEA ERORR AMPLIFIER
LEAD-TIME
CONTROL VLV(scld) resonant inductor LR stores energy to boost output voltage, and
w/ COMPENSATION
VHV(scld) hence, the resonant converter operates as a step-up converter.
VE
sensing, VHV(scld) SSELECT VLV(scld) sensing & As shown in Fig. 2 and Fig. 3 (d), it should be noted that lead
VHV scaling &
isolation - + LH HL + -
scaling
VLV
time control is also added if output power is low and current iLR
VHV(REF) VLV(REF) of resonant inductor LR is small to achieve ZVS, i.e., PO <
CONTROL
PO_CRITICAL. As shown in Fig. 3(d), delay-time interval [T0-T1]
Fig. 1. Circuit and control block diagram of proposed bi-directional series increases energy to boost output voltage while lead-time
resonant converter. Selection switches SSELECT are positioned at HL to interval [T2-T3] increases energy to achieve ZVS.
deliver energy from HV battery to LV battery. S P1
OFF
S P3 ON

Ts t
S P2
information. It should be noted that the direction of energy flow S P4 OFF ON
t
is determined by selection switch SSELECT that switches the roles S S1
ON OFF
of HV and LV side switches. Figures 2 and 3 show employed t
four control methods that make the converter operate to deliver S S2 OFF ON
t
energy over the entire load and voltage range. It should also be S S3
ON OFF
noted that the turns ratio n=N1/N2 of transformer TR is chosen t
to make HV-to-LV control characteristic M=nVLV/VHV equal to S S4 OFF ON

1 when each voltage of HV and LV sides is approximately in t

i LR
the middle. As a result, as shown in Fig. 2, the converter Delay
Time
TD = 0
operates with frequency control when M is less than 1, i.e., VHV
Delay t
is greater than nVLV. The series resonant converter operates as Time
TD = 0
a conventional step down converter with frequency control as nVO
shown in Fig. 3(a). If output power is low and current iLR of VTR
resonant inductor LR is small to discharge output capacitance of t
-nVO
the HV side switches and achieve ZVS, i.e., PO < PO_CRITICAL, T0 T1 T2 T4

lead time control is added to achieve ZVS as shown in Fig. 2 (a)

S P1
and Fig. 3 (b). At t=T1, the turn on/off transition of LV side S P3 ON OFF

switches SS3 and SS4 is executed before the turn on/off transition S P2
Ts t

of HV side switches SP1 and SP3, which happens at t=T2. S P4 OFF ON

t
Switches SS1 and SS4 are simultaneously turned on and short the S S1
ON OFF
LV side winding of transformer TR for the time period between t
S S2 OFF
VHV ON
t
VHV_MAX S S3
ON OFF
t
Frequency & S S4
Frequency OFF ON
Lead Time TL
t
i LR Lead
Delay
nVLV Time
Time
TL TD = 0
Frequency &
Lead t
Lead Time TL Frequency & Time
Delay TL
and Delay Delay Time TD Time
Time TD TD = 0
VHV_MIN nVO
VTR
PO_MIN PO_CRITICAL PO_MAX PO
t
-nVO
Fig. 2. Control scheme of proposed bi-directional series resonant converter. T0 T1 T2 T3 T4
Additional lead time TL control increases ZVS range at light load and (b)
delay time TD control increases input-to-output voltage gain.

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 S P1
ON OFF
range, the converter operates in a constant-current (CC) mode,
S P3
Ts t i.e., it charges the battery with the maximum current of 72.5 A.
S P2
S P4 OFF ON After the battery voltage exceeds 13.8 V, the battery is charged
t
S S1 with a constant power (CP) of 1 kW until the battery voltage
ON OFF
t reaches maximum voltage of 15.5 V and the charger starts
S S2 OFF ON operating in a constant-voltage (CV) mode.
t
S S3 To determine the values of the resonant tank components, it
ON OFF
t is necessary to select turns ratio of the transformer n, minimum
S S4 OFF ON switching frequency fS_MIN, and frequency range ΔfS for
t operation in the CC and CP modes. The turns ratio of the
i LR Delay
Time transformer is determined so that the efficiency of the dc-dc
TD
converter in the mid-voltage range (HV battery: 300-360 V, LV
t
Delay battery: 13.8 V) is maximized since the converter is expected to
Time
TD work most of the time in this range. Specifically, for the
nVO
VTR prototype circuit, turns ratio n is determined by assuming that
t the converter operates with gain M=nVLV/VHV=1 for the HV
-nVO
T0 T1 T2 T3 T4 T5 voltage VHV=330 V and output voltage VO=13.8 V so that the
(c)
turns ratio is selected to be n = 24 ≈ MVHV/VLV = 1×330/13.8
S P1
S P3 ON OFF = 23.9. With this selection of n, the converter needs to operate
t
S P2
Ts
as a boost converter from HV voltages lower than 330 V to LV
S P4 OFF ON
t
voltage of 13.8 V, i.e., it requires delay-time control, whereas it
S S1
ON OFF operates as a conventional series-resonant converter without
S S2
t delay-time control for HV voltages above 330 V.
OFF ON
t Generally, the selection of the minimum switching
S S3
ON OFF
frequency is based on the trade-off between efficiency and size.
t In this design, to meet the required power density, the minimum
S S4 OFF ON switching frequency is set at fS_MIN=300 kHz. As the HV
t
i LR Delay
voltage either decreases from 330 V toward 240 V or increases
Lead
Time
TL
Time
TD toward 450 V, the switching frequency increases. The
Lead
Time
t maximum switching frequency at full power occurs when the
Delay
Time
TL converter operates as a conventional series-resonant converter
TD
nVO without delay-time control, i.e., it occurs at the maximum HV
VTR
voltage of 450 V and nominal LV voltage of 13.8 V. Full load
t
-nVO
frequency range ΔfS=fS_MAX_FL-fS_MIN is set by properly
T0 T1 T2 T3 T4 T5 T6
selecting the value of resonant inductor LR and resonant
(d)
capacitor CR. It should be noted that in the CV mode as the
Fig. 3. Ideal waveforms during one half switching cycle of proposed circuit
output current decreases, the switching frequency increases
when it operates with (a) frequency control; (b) frequency and
secondary switch lead time TL control; (c) frequency and secondary
above full load maximum frequency fS_MAX_FL. To prevent
switch delay time TD control; (d) frequency, secondary switch lead excessive high-frequency switching losses, the absolute
time TL, and delay time TD control. maximum switching frequency is limited to 1 MHz and
effective frequency fold back occurs by applying lead time TL
as shown in Figs. 2 and 3(b).
III. DESIGN CONSIDERATIONS In this design, it is presumed that the frequency range when
For performance evaluation, the proposed dc-dc converter the charger operates in full load is ΔfS=240 kHz, i.e., that the
for EV has been designed and built according to the following maximum frequency at full load is fS_MAX_FL=fS_MIN+ΔfS=540
key specifications: kHz. Based on experience, this selection of the frequency range
offers a good balance between the switching and circulating-
HV battery voltage VHV: 240-450 VDC energy losses. To calculate the values of resonant inductor LR
LV battery voltage VLV: 9.5-15.5 VDC and resonant capacitor CR, it is necessary to determine the
Nominal LV battery voltage VLV-NOM: 13.8 VDC resonant frequency fO and Q-factor of the converter so that
Maximum LV battery current ILV-MAX: 72.5 A when it operates in the CP mode with maximum power
Maximum power PO-MAX: 1 kW PO_MAX=1000 W, minimum switching frequency fS_MIN
Efficiency η: >95% above 50% load becomes 300 kHz at VHV=330 V and VLV=13.8 V and
maximum switching frequency fS_MAX_FL becomes 540 kHz at
A. Selection of Resonant Tank Components VHV=450 V and VLV=13.8 V. Since in the CP mode the
According to the specifications, if the LV battery is deeply converter operates as a conventional series-resonant converter,
discharged, i.e., when the battery voltage is in the 9.5-13.8-V the dc-gain characteristic as obtained in [7] is

1676
 _
∙ ∙
∙ ∙
_ _
∙ +1 +M + ∙ +1+M + +1+
_
_

_
∙ ∙ ∙ ∙
∙ +1 + M − 2M ∙ +1 cos − 2 = 0, (1) _ _
+1 +M −
_
_

where dc-gain characteristic = and = . _

∙ ∙
_ _ _
2M + 1 cos
Two equations are derived by using Eq. (1) for operating point _ _
_
A where dc-gain characteristic MA = nVLV_NOM/VHV_A =
24×13.8/330 = 1 and switching frequency fS_A = fS_MIN = 300
kHz and operating point B where dc-gain characteristic MB = cos − _
+
_ _
nVLV_NOM/VHV_B = 24×13.8/450 = 0.736 and switching
frequency fS_B = fS_MAX_FL = 540 kHz. By using the two
equations that represent operating points A and B, two _
∙ ∙
_ _ _
unknowns that are resonant frequency f0 and Q-factor are _
∙
_
derived by using MathCadTM as _
_
= = 270 kHz and (2) _ _
∙ ∙
_
∙
_ _
=
= 0.359. (3) _
_
It should be noted that resonant frequency f0 is approximately −2 = 0 . (7)
10% lower than minimum switching frequency fS_MIN to Because an explicit solution for normalized delay time TD_N
provide a component tolerance margin. From Eq. (3), given by Eq. (7) is not available, it is numerically calculated.
characteristic impedance ZO is calculated as With given dc-conversion ratio M = nVLV/VHV = 24×15.5/240
= ⁄ = ∙ ∙ = ∙ ∙ ⁄ ∙ _ . ∙
. = 1.55, quality factor = = = =
= 0.359 ∙ 24 ∙ = 39.4 Ω . (4) ∙ .
.
_ ∙
Solving Eqs. (2) and (4), the calculated values of the resonant- 0.285 , and normalized frequency fS_N = = =
∙
tank components are
1.296 , i.e., the converter operates at the full load with the
= = 23.2 , (5)
minimum HV voltage of 240 V, the maximum LV voltage of
= = 14.9 . (6) 15.5 V, and the limited switching frequency of 350 kHz,
Since the closest standard value of capacitance is 10 pieces of normalized maximum delay time TD_N is derived from Eq. (7).
1.5 nF in parallel, in the prototype circuit CR=15 nF is used. The As a result, maximum delay time TD_MAX is
value of the resonant inductor in the prototype circuit is 23 μH. = _
=
.
= 517 . (8)
_ ∙
_
B. Delay-Time Selection Figure 4 shows calculated delay time TD that is obtained
Delay-time control is added to frequency control when dc- from Eq. (7) as a function of the HV battery voltage and
gain characteristic M is greater than 1, i.e., VHV is lower than switching frequency. This dependence of delay-time TD is
nVLV. The delay-time control is implemented by delaying the coded into a look-up table of the DSP-based control circuit.
turn-on/off transition of switches SS1 and SS2 with respect to
corresponding zero crossings of resonant current iLR as shown C. Lead-Time Selection
in Fig. 3(c). If output power is low and current iLR of resonant inductor
In the prototype circuit the maximum delay time occurs at LR is small to discharge output capacitance COSS of the HV side
the full load with the minimum HV voltage of 240 V and the switches and achieve ZVS, i.e., PO < PO_CRITICAL, lead time
maximum LV voltage of 15.5 V. Moreover, the delay time
should be determined by limiting the switching frequency well
below the maximum full-load switching frequency fS_MAX_FL.
The required normalized delay time TD_N can be calculated
from the following equation as obtained in [7].
∙ ∙
+1 +

_
∙ ∙
_ _ _
+ _
+1 1−
_
_
Fig. 4 Calculated delay time TD and switching frequency fS as function of
HV side voltage VHV when LV side voltage is 13.8 V.

1677
control is added to achieve ZVS as shown in Fig. 2 and Fig. 3 lead time control. Since ZVS of the LV-side switches does not
(b). To discharge output capacitance COSS of the HV side significantly influence the performance of the converter, the
switches, the current flowing through resonant inductor LR at lead time control is omitted in the control for the operation in
time t=T2 when HV side switches commutates should be LV-HV direction. As can be seen in Fig. 5, the variable
_
frequency control is implemented by the VCO whose frequency
| ≫ . (9) is determined by control output VEA of voltage controller GVC
Assuming the resonant inductor current is solely built up by which processes the error between sensed output voltage
lead time TL, the magnitude of ILR at t=T2 is VLV(scld) and reference VLV(REF). The nominal value of
VLV(REF)=13.8 V. The drive signals for both HV- and LV-side
_
| = sin 2 . (10) switches are obtained by using digital pulse width modulator
(DPWM) with the three identical synchronized digital carrier
By using Eqs. (9) and (10), the minimum TL to achieve ZVS is ramps that are generated by counting DSP clock period TCLK.
derived as Since the carrier ramp period TS=NCAR·TCLK, where NCAR is the
_ number of clock periods, carrier frequency fS is proportional to
= sin . (11)
_ 1/NCAR. The number of clock periods NCAR is obtained by
Since output capacitance COSS of the selected switch is finding the reciprocal value of the VCO output.
approximately 58 pF, minimum lead time TL is calculated as The VCO transfer function is set by the selection of its
140 nsec by using Eq. (11). It should be noted that the lead time maximum frequency fMAX, i.e., minimum count number NMIN,
coded into the DSP-based control circuit is linearly increased and gain KVCO. According to Fig. 5, the VCO output is given
inverse proportional to the output power to achieve frequency = − · .
by (12)
fold back.
D. Control Implementation
The control of the proposed converter was implemented Since = · = (13)
with TMS320F28377 DSP from TI. Figure 5 shows a simplified
and = · = , (14)
block diagram of digital control implementation for the
operation in HV-LV direction. In this section, only the relationship in Eq. (12) can be written as
operation in HV-LV direction is described because the control · .
= − (15)
for the operation in LV-HV direction is identical except for the

fCLK
TCLK = 10ns 1 fCLK N MIN = DSP TMS320F28377
DPWM NCAR = .f = fMAX
DIGITAL RAMP TCLK S fS f CLK = 100MHz
1 VCO
N CAR
N MIN
Ramp
SP2 SP4 N CAR X 1 CONTROLLER ADC SENSING
1
. NCAR VEA VE V LV(scld)
1
0 . KVCO G VC (z) Kd V
TCLK FSR LV
Ts
SP1 SP3 2.85
FSR=3.3V KD =
VLV(REF) 13.8
ND CALCULATION OF PERCENTAGE OF DELAY-TIME
NCAR/2 25 VHV
1 [V] ADC SENSING
2 240 V HV(scld)
20 1
ND KV VHV
DIGITAL RAMP FSR
15
N CAR P P FSR=3.3V
ND TD TD
Ramp X [%] 10 330
SENSING
SS2 ADC
5
I LV(scld)
0
1
KC i LV
SS1 TCLK 450 FSR
Ts 0
0 10 20 30 40 50 60 70 FSR=3.3V
I LV [A]
I LV(scld) 2034 2113 2192 2271 2350 2429 2508 2587
DIGITAL RAMP

N CAR CALCULATION OF PERCENTAGE OF LEAD-TIME

Ramp 450 VHV
SS4
400 [V]
0 350
SS3 TCLK f CLK
Ts 300
250
NL TL TL 200 240
ND
X [ns] 150
NL 330
100
ND 50
NL 0 450
0 10 20 30 40 50 60 70
I LV [A]
ILV(scld) 2034 2113 2192 2271 2350 2429 2508 2587

Fig. 5. Simplified block diagram of digital control implementation.

1678
As it can be seen from Eq. (15), the normalized frequency at the of iLV, the amplitude of resonant inductor current iLR is
output of VCO with respect to fCLK is a linear function of control sufficiently large to achieve ZVS of HV switches.
voltage VEA with negative slope KVCO. As a result, the The controller is designed by applying analog-redesign
frequency at the output of VCO increases as the control voltage approach, i.e., by designing controller GVC in the s-domain and
decreases, i.e., as the load current decreases. mapping it in the z-domain. The equivalent s-domain voltage-
The delay-time control in which the drive signals of loop gain of the control loop in variable-frequency control
secondary switches SS2 and SS1 are delayed by time TD with mode of the experimental converter is
respect to primary switches SP2, SP1 and SP4, SP3, is implemented (s) = ∙ ∙ (s) ∙ ∙ · (s) ∙ e ∙
by controlling the drive signals of the primary switches to lead
by time TD with respect to drive signals of the secondary ≈ ∙ ∙ (s) ∙ ∙ · (s), (16)
switches SS2 and SS1. As shown in Fig. 5, the drive signals of where KD is the sensing gain of the output voltage, FSR is the
complementary switches SS2 and SS1 that always operate with full-scale range of analog-to-digital (ADC) converter, GPS(s) is
50% duty cycle are obtained by comparing the carrier ramp the power-stage small-signal transfer function, and is the
with one-half of its count value NCAR, i.e., with 0.5NCAR. total digital-loop delay that includes ADC conversion time,
Whereas the drive signals of complementary switches SP2, SP1 DSP computational time, and the delayed update of DPWM to
and SP4, SP3 that also always operate with the 50% duty cycle achieve synchronization to the resetting of DPWM ramp. Since
are obtained by comparing the carrier ramp with 0.5NCAR-ND in the experimental circuit the sampling frequency fSAMPL=50
and NCAR-ND, where ND is proportional to the percentage of kHz is much greater than the desired 2-kHz bandwidth of the
delay-time with respect to the carrier ramp period, loop, the digital-loop delay can be neglected since it has no
PTD=TD·100/TS, i.e., ND= (PTD/100)·NCAR. The reason for the measurable effect on the voltage-loop phase margin. For a
ramp comparison with two levels is to preserve 50% duty cycle resistive load, power stage small-signal transfer function GPS(s)
of switches SP2, SP1 and SP4, SP3. Namely, the ramp comparison is a single-pole transfer function
with 0.5NCAR – ND defines the beginning of the on time, (s) = .
whereas the comparison with NCAR – ND defines its end. Since ∙ ∙
(17)
the difference between the two levels is 0.5NCAR, i.e., it is equal By using SimplisTM simulation, it was estimated that for the
one-half of the digital ramp height, the drive signals for experimental circuit at full-power of 1-kW and at HV voltage
switches SP2, SP1 and SP4, SP3 operate with 50% on time, i.e., of 240 V, power-stage gain KPS=3.9057·10-4 and power-stage
with 50% duty cycle. pole frequency fP0=500 Hz. To compensate the loop, a PI
The lead-time control is implemented by controlling the controller was used. The controller’s s-domain transfer function
drive signals of the secondary switches SS4 and SS3 to lead by is
time TL with respect to drive signals of the primary switches. (s) = ∙ 1+ .
∙ ∙ (18)
As shown in Fig. 5, the drive signals of complementary
switches SS4 and SS3 that also always operate with the 50% duty To obtain 2-kHz bandwidth, the controller parameters were
cycle are obtained by comparing the carrier ramp with 0.5NCAR- selected as K=1040.5 and fZ=600 Hz. Since the sampling
ND-NL and NCAR-ND-NL, where NL is proportional to the lead frequency in the prototype circuit is fSAMPL= 50 kHz, the
time TL, i.e., NL= TL·fCLK. The ramp comparison with 0.5NCAR- controller’s z-domain transfer function obtained by bilinear
ND-NL defines the beginning of the on time, whereas the (Tustin’s) transformation that is coded in the DSP is
. ∙
comparison with NCAR -ND-NL defines its end. Since the (z) = 0.286 + . (19)
difference between the two levels is 0.5NCAR, the drive signals Finally, it should be noted that the control signals at the output
for switches SS4 and SS3 operate with 50% duty cycle. of the DSP controller are coupled to the gate-to-source voltage
The graphs of the percentage of delay-time and the lead- of the corresponding switches with SI8235 drivers from Silicon
time, which were measured with the open-loop operation of LabsTM.
experimental circuit at different values of HV voltage and
output current ILV, are shown in Fig. 5. It can be seen in Fig. 5 IV. EXPERIMENTAL RESULTS
that at VHV=240V, the percentage of delay-time increases with The performance of the proposed converter shown in Fig. 1
the increasing value of output current ILV. In fact, as the load is was evaluated on a 1-kW prototype circuit that was designed to
increased, the delay time must also be increased so that resonant operate between a HV side with 240-450-V range and a LV side
inductor LR stores more energy during the delay-time to deliver with 9.5-15.5-V range. It should be noted that the turns ratio
to the output. It can also be seen from the calculation of lead n=N1/N2=24 of transformer TR is chosen to make input-to-
time in Fig. 5 that at VHV=240V, the lead time control is applied output control characteristic M equal to 1 when the voltage of
in the entire load range. In fact, it was found experimentally, HV side is approximately 330 V and the voltage of LV side is
that at VHV=240V, the lead time control was required to achieve approximately 13.8 V. Figure 6 shows the schematic diagram
ZVS even at full load, i.e, at VHV=240V, PO_CRITICAL>1kW. and the component details of the experimental prototype circuit.
Whereas, at VHV=450V, lead time control was only required for As shown in Fig. 6, the prototype is built using NV6117 eMode
iLV< 35A, i.e, at VHV=450V, PO_CRITICAL≈500W. At both
GaN FET (VDS = 650 V, RDS = 110 mΩ, COSS=58 pF, Qrr≈0 nC)
VHV=240V and VHV=450V, the lead time decreases with the
increasing value of output current iLV because at increased value from NavitasTM for each high-voltage side switch and two
BSC0500NSI Si MOSFETs (VDS = 30 V, RDS = 1.3 mΩ,

1679
 V HV
240 - 450 V
S P1 -S P4
NV6117
Planar EI, E43/10/28, 3C96
Litz AWG#38-200 strands
SS1 -S S4
2 x BSC0500NSI
V LV
9.5 - 15.5 V
Ten parallel connected ceramic capacitors (NPO, 1.5 nF,
12 turns, 22 uH 630 VDC) were used for resonant capacitor CR. Twenty parallel
S P1 S P4 TR S S1 S S4 connected ceramic capacitors (0.1 uF, 630 VDC) were used for
CR
CHV
LR X7R, 25 V
ceramic CLV HV-side filter capacitor CHV. Ninety-six parallel connected
X7R
NPO, 630 V
ceramic
N1 N2 96 x 10 uF
X7R, 25 V
ceramic capacitors (X7R, 10 μF, 25 VDC) were used for
630 V
ceramic SP2
10 x 1.5 nF
SP3 4-leg custom core SS2
CB
SS3
ceramic blocking capacitor CB. It should be noted that the blocking
32 x 10 uF
20 x 0.1 uF N1 =24 turns, PCB winding capacitor connected in series with the LV-side winding of TR
N2 =1 turns, PCB winding
L M = 600 uH, L LK = 1.2 uH prevents saturation of the transformer when the prototype
Fig. 6. Experimental prototype circuit. circuit delivers power from the LV side to the HV side. Thirty-
two parallel connected ceramic capacitors (X7R, 10 μF,
25 VDC) were used for LV-side filter capacitor CLV. The
voltage regulation that employs variable-frequency control
together with open-loop (pre-programmed) delay-time and
lead-time control was implemented by a TMS320F28377
microcontroller with 32-bit CPU from TI.
Figures 8 and 9 show the measured waveforms of
transformer voltage VTR, drain-to-source voltage of switches
SP1 and SP2, and resonant inductor current iLR when the
converter delivers 1 kW and 10 W, respectively. The converter
steps up output voltage with respective delay time TD as shown
(a)
in Figs. 8(a), 8(b), 9(a), and 9(b) when input voltage is 240 V
and 300 V, i.e., M is 24×13.8/240=1.38 and 24×13.8/300=1.1,
respectively. Delay time TD is set to zero when input voltage is

(a)

(b)
Fig. 7. (a) Custom made ferrite core and (b) PCB winding structures of
4-leg matrix transformer.

COSS=850 pF, Qrr=20 nC) in parallel from InfineonTM for each

low-voltage side switch. To obtain the desired inductance of
resonant inductors LR of approximately 22 μH and also to
achieve high efficiency at light-load, the inductor was built
using a set of planar E I ferrite cores (E43/10/28, 3C96) with 12 (b)
turns of Litz wire (AWG#38, 200 strands) and approximately
1.7 mm gap at the internal and external legs. Litz wire was used
to reduce the fringing-effect-induced winding loss near the gap
of the inductor core.
To increase power density, a matrix transformer introduced
in [8] is employed for the prototype circuit. The core and PCB
winding structures of the 4-leg matrix transformer are shown in
Fig. 7. The transformer consists of a pair of the custom made 4-
leg ferrite cores (3C96) with 24 turns of PCB winding (2nd and
3rd layers) for the HV side and 8 turns of PCB winding (top and
bottom layers) for the LV side. It should be noted that all 8 turns (c)
Fig. 8. Measured waveforms of transformer voltage VTR, and drain-to-source
of the LV side windings are effectively in parallel. The voltage of switches SP1 and SP2, and resonant inductor current iLR
measured magnetizing and leakage inductances at the HV side when converter delivers 1 kW (a) from 240 V to 13.8 V, (b) from 300
of TR are 600 μH and 1.2 μH, respectively. V to 13.8 V, and (c) from 430 V to 13.8 V.

1680
 100
VHV = 330 V

90

Efficiency [%]
80
VHV = 430 V
VHV = 240 V
70

V LV = 13.8 V
60
50 100 200 300 400 500 600 700 800 900 1000
Output Power [W]
(a) (a)
100

VHV = 330 V
95

Efficiency [%]
90

VHV = 240 V VHV = 450 V

85

V LV = 13.8 V
80
50 100 200 300 400 500 600 700 800 900 1000
Output Power [W]
(b) (b)
Fig. 10. Measured efficiency when converter delivers energy (a) from high
voltage to low voltage and (b) from low voltage to high voltage.

side switches over the entire load range and effective frequency
fold-back at light load, which allows the converter to regulate
the output without burst mode operation. The performance of
the proposed control method was verified on a 1-kW prototype
operating between the 240-450-V high-voltage battery and the
9.5-15.5-V low-voltage battery. The prototype circuit exhibits
the maximum efficiency of 96.1% with a switching frequency
(c) variation from 300 kHz to 1 MHz.
Fig. 9. Measured waveforms of transformer voltage VTR, and drain-to-source
voltage of switches SP1 and SP2, and resonant inductor current iLR REFERENCES
when converter delivers 10 W (a) from 240 V to 13.8 V, (b) from 300
V to 13.8 V, and (c) from 430 V to 13.8 V. [1] H.J. Chiu and L.W. Lin, “A bidirectional dc–dc converter for fuel cell
electric vehicle driving system,” IEEE Trans. Power Electron., vol. 21,
No. 4, pp. 950-958, Jul. 2006.
430 V as shown in Figs. 8(c) and 9(c) when M=0.77 < 1. As
[2] D. Zhao, F. Gao, D. Bouquain, M. Dou, and A. Miraoui, “Sliding-mode
shown in Fig. 9 when the converter delivers approximately 10 control of an ultrahigh speed centrifugal compressor for the air
W, lead time TL is applied to make iLR increase and achieve management of fuel-cell systems for automotive applications,” IEEE
ZVS. Figure 10 shows measured efficiency of the prototype trans. on vehicular technology, vol. 63, pp. 51–61, 2014
converter when it operates from full load to 5% load. It should [3] B. Lu, W. Liu, Y. Liang, F.C. Lee, and J.D. Van Wyk, "Optimal design
be noted that the converter exhibits the best full-load efficiency methodology for LLC resonant converter," in IEEE Applied Power
Electronics Conf. Rec. 2006, pp. 533-538.
when the voltages of HV and LV side are in the middle of their
[4] I.O. Lee, “Hybrid PWM-Resonant Converter for Electric Vehicle On-
respective range, i.e., HV=330 V and LV=13.8 V. The Board Battery Chargers,” IEEE Trans. Power Electron., vol. 31, No. 5,
prototype circuit exhibits the maximum efficiency of 96.1%. pp. 3639-3649, May 2016.
Switching frequency fS varies between 350 kHz and 1 MHz. [5] B. Yang, P. Xu, and F.C. Lee, “Range winding for wide input range front
end DC/DC converter,” in IEEE Applied Power Electronics Conf. Rec.
V. CONCLUSIONS 2001, pp. 476-479.
[6] I.H. Cho, Y.D. Kim, and G.W. Moon, “A half-bridge LLC resonant
An isolated bi-directional dc-dc converter that delivers converter adopting boost PWM control scheme for hold-up state
energy between high-voltage battery and low-voltage battery of operation,” IEEE Trans. Power Electron., vol. 29, No. 2, pp. 841-850,
FCV or FCEV has been introduced. A full-bridge series Feb. 2014.
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input-to-output symmetricity for bi-directional operation. The 3.3-kW dc-dc converter for EV on-board charger employing series-
resonant converter with reduced-frequency-range control,” IEEE Trans.
introduced secondary-switch delay time control incorporated Power Electron., vol. 32, No. 6, pp. 4168-4184, Jun. 2017.
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switches makes the converter achieve ZVS of the high-voltage

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