unit 3 question bank solution
unit 3 question bank solution
Unit-3
QUESTION BANK SOLUTION
SUBJECT NAME: COMPUTER ORGANIZATION AND ARCHITECTURE (COA)
Q.1 How pipeline performance can be measured? Discuss. Give a space time diagram
for visualizing the pipeline behavior for a four stage pipeline.
Solution: Pipelining: A pipelining is a series of stages ,where some work is done at each stage .The
work is not finished until it has passed through all stages.It is a technique used in advanced
microprocessors where the microprocessor begin executing a second instruction before the first has
been completed
Performance of Pipelined Execution-
The following parameters serve as criterion to estimate the performance of pipelined
execution-
Speed Up
Efficiency
Throughput
1. Speed Up-
It gives an idea of “how much faster” the pipelined execution is as compared to non-pipelined
execution.
It is calculated as-
3. Throughput-
Throughput is defined as number of instructions executed per unit time.
It is calculated as-c
Difficult to modify as the control signals that Easy to modify as the modification need
need to be generated are hard wired to be done only at the instruction level
Only limited number of instructions are used Control signals for many instructions
due to the hardware implementation can be generated
Q.3
Solution:
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Solution:
S.
No Horizontal µ-programmed CU Vertical µ-programmed CU
It is more flexible than a vertical It is less flexible than horizontal but more
5. micro-programmed control unit. flexible than that of a hardwired control unit.
Q.5: The memory unit of a computer has 256K words of 32 bits each. The computer has an
instruction format with four fields: an operation code field, a mode field to specify one of seven
addressing modes, a register address field to specify one of 60 processor registers and a
memory address. Specify the instruction format and the number of bits in each field if the
instruction is in one memory word. (2018-19)
Solution: : Instruction format (32- bit instruction):
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CISC RISC
Some instructions with long execution No instruction with a long execution time
times. These include instructions that due to a very simple instruction set. Some
copy an entire block from one part of early RISC machines did not even have an
memory to another and others that integer multiply instruction, requiring
copy multiple registers to and from compilers to implement multiplication as a
memory. sequence of additions.
CISC RISC
Q.9: What is micro programmed control unit? Give the basic structure micro programed
control unit and also discuss the micro instruction format and the control unit
organization for a typical micro programmed controllers using suitable diagrams (2017-
18).
Solution: A control unit whose binary control variables are stored in memory is known as a
microprogrammed control unit.
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In Microprogrammed Control, the control information is stored in the control memory and is
programmed to initiate the required sequence of micro-operations.
By creating a definite collection of signals at each system clock beat, a controller generates
the instructions to be executed. Each of these output signals causes a single micro-operation,
such as register transfer. As a result, defined micro-operations that can be preserved in
memory are formed from the sets of control signals.
Each bit in the microinstruction is connected to a single control signal. The control signal is
active when its bit is set. The control signal becomes inactive when it is cleared. The internal
control memory can store a sequence of these microinstructions. A microprogram-controlled
computer's control unit is a computer within a computer.
The block diagram of a Microprogrammed Control Organization is shown below.
F1, F2, F3 are the micro-operation fields. They determine micro-operations for the computer.
CD is the condition for branching. They choose the status bit conditions.
AD is the address field. It includes the address field whose length is 7 bits.
The micro-operations are divided into three fields of three bits each. These three bits can
define seven different micro-operations. In total there are 21 operations as displayed in the
table.
Q.10: Illustrate different types of Program Control Instructions and their types with
example.
Solution: Instructions of the computer are always stored in consecutive memory locations.
These instructions are fetched from successive memory locations for processing and
executing.
When an instruction is fetched from the memory, the program counter is incremented by 1
so that it points to the address of the next consecutive instruction in the memory. Once a data
transfer and data manipulation instruction are executed, the program control along with the
program counter, which holds the address of the next instruction to be fetched, is returned
to the fetch cycle.
Data transfer and manipulation instructions specify the conditions for data processing
operations, whereas the program control instructions specify the conditions that can alter the
content of the program counter.
The change in the content of the program counter can cause an interrupt/break in the
instruction execution. However, the program control instructions control the flow of program
execution and are capable of branching to different program segments.
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Q.11: Define vertical microprogramming and explain its advantages over horizontal
microprogramming.
Solution: The control unit (CU) is the engine that runs the entire functions of a computer
with the help of control signals in the proper sequence. In the micro-programmed control
unit approach, the control signals that are associated with the operations are stored in
special memory units. It is convenient to think of sets of control signals that cause specific
micro-operations to occur as being “micro-instructions”. The sequences of micro-
instructions could be stored in an internal “control” memory.
The micro-programmed control unit can be classified into two types based on the type of
Control Word stored in the Control Memory, viz., Horizontal micro-programmed control
unit and Vertical micro-programmed control unit.
In the Horizontal micro-programmed control unit, the control signals are
represented in the decoded binary format, i.e., 1 bit/CS. Here ‘n’ control signals
require n bit encoding. On the other hand.
In a Vertical micro-programmed control unit, the control signals are represented
in the encoded binary format. Here ‘n’ control signals require log2n bit encoding.
S.
No Horizontal µ-programmed CU Vertical µ-programmed CU
S.
No Horizontal µ-programmed CU Vertical µ-programmed CU
It is more flexible than a vertical It is less flexible than horizontal but more
5. micro-programmed control unit. flexible than that of a hardwired control unit.
Example: Consider a hypothetical Control Unit that supports 4 k words. The Hardware
contains 64 control signals and 16 Flags. What is the size of control word used in bits and
control memory in a byte using:
a Horizontal Programming
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b) Vertical programming
a) For Horizontal
64 bits for 64 signals % 16 bits for flags
Control Word Size = 64 + 16 = 80 bits
Control Memory = 4 kW = ( (4* 80) / 8 ) = 40 kByte
b) For Vertical
6 bits for 64 signals i.e log264
4 bits for 16 flags i.e log216
12 bits for 4K words i.e log2(4*1024)
Q.12: What are the different types of instructions commonly found in computer
architectures? Provide examples of each.
Solution: These instructions are typically divided into three categories: data movement
instructions, arithmetic and logic instructions, and control instructions.
Data movement instructions are used to move data between different parts of the
computer system. These instructions include load and store instructions, which
move data between memory and the CPU, and input/output (I/O) instructions,
which move data between the CPU and external devices.
Arithmetic and logic instructions are used to perform mathematical operations and
logical operations on data stored in the system. These instructions include add,
subtract, multiply, and divide instructions, as well as logic instructions such as AND,
OR, and NOT.
Control instructions are used to control the flow of instructions within the
computer system. These instructions include branch instructions, which transfer
control to different parts of the program based on specified conditions, and jump
instructions, which transfer control to a specified memory location.
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The basic computer has 16-bit instruction register (IR) which can denote either memory
reference or register reference or input-output instruction.
1. Memory Reference – These instructions refer to memory address as an
operand. The other operand is always accumulator. Specifies 12-bit address, 3-
bit opcode (other than 111) and 1-bit addressing mode for direct and indirect
addressing.
Q.16 A processor has 40 distinct instruction and 24 general purpose register. A 32bit
instruction word has an opcode, two register operand. Evaluate the number of bits available
for the immediate operand fields. (2018-19)
Solution:
Q.17 Consider a non-pipelined system which takes 100ns to perform a task. The same task
can be performed using a 6 segment pipeline with cycle time of 19ns.
Calculate 1) speed up of pipeline for 1000 tasks.
2) What is the maximum speed up?
Soltion:
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So,
⟹(3+100−1)×20ns
⟹2040ns
Q.21: A control unit generates 125 control signals which can be divided into 5 groups of
mutually exclusive signals as follows: Group 1 : 20 signals, Group 2 : 70 signals, Group 3
: 2 signals, Group 4 : 10 signals, Group 5 : 23 signals How many bits of the control words
can be saved by using vertical microprogramming over horizontal microprogramming?
Solution: In horizontal microprogramming we need 1 bit for every control word, therefore
total bits in
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Now in this question these 5 groups contains mutually exclusive signals, i.e, they can be
activated one at a time for a given group, we can safely use decoder.
group 1=⌈log2 20⌉=5 (Number of input bits for decoder, given output
is number of control word in given group)
Q.22 Consider an instruction pipeline with four stages (S1, S2, S3 and S4) each with
combinational circuit only. The pipeline registers are required between each stage and at
the end of the last stage. Delays for the stages are 5, 6, 11, 8 and 1nanosec of pipeline
registers. What is the approximate speed up of the pipeline in steady state under ideal
conditions when compared to the corresponding non-pipeline implementation?
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Solution:
Solution:
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