Universal Asynchronous Receiver Transmitter (UART) Protocol

UART means Universal Asynchronous Receiver Transmitter Protocol. UART is used for serial
communication without clock signal

.
before starting with the communication we need to define the data format and transmission speed.
NRZ encoding for data communication.

Start Bit
The UART data transmission line is normally held at a high voltage level when it’s not transmitting data. To start
the transfer of data, the transmitting UART pulls the transmission line from high to low for one clock cycle. When
the receiving UART detects the high to low voltage transition, it begins reading the bits in the data frame at the
frequency of the baud rate.

Data Frame
The data frame contains the actual data being transferred. It can be 5 bits up to 8 bits long if a parity bit is used. If
no parity bit is used, the data frame can be 9 bits long. In most cases, the data is sent with the least significant bit
first.

Parity
Parity describes the evenness or oddness of a number. The parity bit is a way for the receiving UART to tell if any
data has changed during transmission. Bits can be changed by electromagnetic radiation, mismatched baud rates,
or long distance data transfers. After the receiving UART reads the data frame, it counts the number of bits with a
value of 1 and checks if the total is an even or odd number. If the parity bit is a 0 (even parity), the 1 bits in the
data frame should total to an even number. If the parity bit is a 1 (odd parity), the 1 bits in the data frame should
total to an odd number. When the parity bit matches the data, the UART knows that the transmission was free of
errors. But if the parity bit is a 0, and the total is odd; or the parity bit is a 1, and the total is even, the UART knows
that bits in the data frame have changed.

Stop Bits
To signal the end of the data packet, the sending UART drives the data transmission line from a low voltage to a
high voltage for at least two bit durations.

UART is having serial communication, therefore, it has less speed. two lines for communication,
Can configure at different baud rates.
Start bit, stop bit, and the parity bit is other overhead.
we should configure both devices at the same speed because the clock signal is absent.
One master to one slave.
SPI Communication:
Ex: SD card reader modules, RFID card reader modules, and 2.4 GHz wireless transmitter/receivers.
Any number of bits can be sent or received in a continuous stream.
Maximum speed upto 10mbps.

MOSI (Master Output/Slave Input) – Line for the master to send data to the slave.
MISO (Master Input/Slave Output) – Line for the slave to send data to the master.
SCLK (Clock) – Line for the clock signal.
SS/CS (Slave Select/Chip Select) – Line for the master to select which slave to send data to.

The clock signal synchronizes the output of data bits from the master to the sampling of bits by the slave. One bit
of data is transferred in each clock cycle, so the speed of data transfer is determined by the frequency of the clock
signal. SPI communication is always initiated by the master since the master configures and generates the clock
signal.

SPI is a synchronous communication protocol.

Clock polarity can be set by the master to allow for bits to be output and sampled on either the rising or falling
edge of the clock cycle. Clock phase can be set for output and sampling to occur on either the first edge or second
edge of the clock cycle, regardless of whether it is rising or falling.

The master can choose which slave it wants to talk to by setting the slave’s CS/SS line to a low voltage level. In
the idle, non-transmitting state, the slave select line is kept at a high voltage level. Multiple CS/SS pins may be
available on the master, which allows for multiple slaves to be wired in parallel. If only one CS/SS pin is present,
multiple slaves can be wired to the master by daisy-chaining.

MOSI and MISO

The master sends data to the slave bit by bit, in serial through the MOSI line. The slave receives the data sent
from the master at the MOSI pin. Data sent from the master to the slave is usually sent with the most significant
bit first. The slave can also send data back to the master through the MISO line in serial. The data sent from the
slave back to the master is usually sent with the least significant bit first.
I2C Communication
I2C combines the best features of SPI and UARTs. With I2C, you can connect multiple slaves to a single
master (like SPI) and you can have multiple masters controlling single, or multiple slaves. This is really
useful when you want to have more than one microcontroller logging data to a single memory card or
displaying text to a single LCD.

SDA (Serial Data) – The line for the master and slave to send and
receive data.
SCL (Serial Clock) – The line that carries the clock signal.

I2C is a serial communication protocol, so data is transferred bit by

bit along a single wire (the SDA line).

Speed:
Standard mode: 100kbps
Fast Mode : 400kbps
High Speed Mode: 3.4mbps
Ultra Fast mode: 5mbps

Start Condition: The SDA line switches from a high voltage level to a low voltage level before the SCL line
switches from high to low.

Stop Condition: The SDA line switches from a low voltage level to a high voltage level after the SCL line
switches from low to high.

Address Frame: A 7 or 10 bit sequence unique to each slave that identifies the slave when the master
wants to talk to it.

Read/Write Bit: A single bit specifying whether the master is sending data to the slave (low voltage
level) or requesting data from it (high voltage level).

ACK/NACK Bit: Each frame in a message is followed by an acknowledge/no-acknowledge bit. If

an address frame or data frame was successfully received, an ACK bit is returned to the sender from the
receiving device.

Addressing
I2C doesn’t have slave select lines like SPI, so it needs another way to let the slave know that data is
being sent to it, and not another slave. It does this by addressing. The address frame is always the first
frame after the start bit in a new message.
The master sends the address of the slave it wants to communicate with to every slave connected to it.
Each slave then compares the address sent from the master to its own address. If the address matches,
it sends a low voltage ACK bit back to the master. If the address doesn’t match, the slave does nothing
and the SDA line remains high.

Read/Write bit:
The address frame includes a single bit at the end that informs the slave whether the master wants to
write data to it or receive data from it. If the master wants to send data to the slave, the read/write bit
is a low voltage level. If the master is requesting data from the slave, the bit is a high voltage level.

The Data Frame

After the master detects the ACK bit from the slave, the first data frame is ready to be sent.
The data frame is always 8 bits long, and sent with the most significant bit first. Each data frame is
immediately followed by an ACK/NACK bit to verify that the frame has been received successfully. The
ACK bit must be received by either the master or the slave (depending on who is sending the data)
before the next data frame can be sent.
After all of the data frames have been sent, the master can send a stop condition to the slave to halt the
transmission. The stop condition is a voltage transition from low to high on the SDA line after a low to
high transition on the SCL line, with the SCL line remaining high.

Steps of I2C Data Transmission

1. The master sends the start condition to every connected
slave by switching the SDA line from a high voltage level
to a low voltage level before switching the SCL line from
high to low
2. The master sends each slave the 7 or 10 bit address of
the slave it wants to communicate with, along with the
read/write bit

3. Each slave compares the address sent from the master

to its own address. If the address matches, the slave
returns an ACK bit by pulling the SDA line low for one
bit. If the address from the master does not match the
slave’s own address, the slave leaves the SDA line high.

4. The master sends or receives the data frame.

5. After each data frame has been transferred, the receiving device returns another ACK bit to the
sender to acknowledge successful receipt of the frame
 6. To stop the data transmission, the master sends a stop
condition to the slave by switching SCL high before switching
SDA high

Because I2C uses addressing, multiple slaves can be controlled from a

single master. With a 7 bit address, 128 (27) unique address are
available. Using 10 bit addresses is uncommon, but provides 1,024
(210) unique addresses. To connect multiple slaves to a single master,
wire them like this, with 4.7K Ohm pull-up resistors connecting the SDA
and SCL lines to Vcc:

Multiple masters can be connected to a single slave or multiple slaves.

The problem with multiple masters in the same system comes when
two masters try to send or receive data at the same time over the SDA
line. To solve this problem, each master needs to detect if the SDA line
is low or high before transmitting a message. If the SDA line is low, this
means that another master has control of the bus, and the master should wait to send the message.
If the SDA line is high, then it’s safe to transmit the message.

CAN Protocol, Controller Area Network

The Controller Area Network protocol (CAN or CAN Bus) is a two-wire (twisted-pair), bidirectional
serial bus communication method that allows electronic subsystems to be linked together and
interact in a network.

Terminating resistance of 120ohm

Lower Id has higher priority. “0” bit overpowers “1” bit
Can high speed differential bus.
Can High & Can Low.

Difference between these to differentiate between low.

2V difference then at dominant voltage, bit 1.
else at recessive voltage, bit 0.

Standard CAN ID: Uses an 11-bit identifier, allowing for 2,048 unique message IDs.
Extended CAN ID: Uses a 29-bit identifier, offering a significantly larger address space with 536,870,912
unique message IDs.
Start of Frame (SOF): Marks the beginning of the frame with a dominant bit, synchronizing all nodes to
the start of the message.
Arbitration Field:
Identifier: A unique value used to identify the message and determine its priority during arbitration.
RTR (Remote Transmission Request): Differentiates between data frames and remote frames (requests
data).
Control Field:
IDE (Identifier Extension): Indicates whether the identifier field is standard (11 bits) or extended (29
bits).
r (Reserved bit): Reserved for future use, should always be dominant.
DLC (Data Length Code): Specifies the number of bytes of data (0 to 8 bytes).
Data Field: Contains the actual payload data, from 0 to 8 bytes.
CRC Field:
CRC Sequence: Holds the Cyclic Redundancy Check value for error detection.
CRC Delimiter (DEL): A single recessive bit separating the CRC field from the acknowledgment field.
ACK Field:
ACK Slot: Indicates successful receipt of the message by setting a dominant bit.
ACK Delimiter (DEL): Follows the acknowledgment bit and is recessive.
End of Frame (EOF): Consists of seven recessive bits marking the end of the frame.
Interframe Space (ITM): A period of bus inactivity between consecutive data frames ensuring the bus is
idle before the next message.

To add termination resistors, connect a 120-ohm resistor between the CAN_H and CAN_L lines at both
ends of the CAN bus. This ensures that the electrical signals are properly terminated, preventing
reflections and maintaining signal integrity.

Start with SOF  0->1 transition

Arbitration  which CAN node will get access to bus
DLC, Data Length Code  Message has this many no of bits.
Then we have CRC for the data
ACK bits  acknowledged from the receiver.
Then EOF bits, recessive voltage, bus idle certain amount of bits.
Interframe spacing bits, ample space between CAN frames on CAN bus  3 bits.

CAN uses short messages – the maximum utility load is 94 bits

The CAN standard defines four different message types.
 the Data Frame
 the Remote Frame
 the Error Frame
 the Overload Frame
Data Frame:
For CAN 2.0A, an 11-bit Identifier and one bit, the RTR bit, which is dominant for data frames.
For CAN 2.0B, a 29-bit Identifier (which also contains two recessive bits: SRR and IDE) and the RTR bit
the Data Field, which contains zero to eight bytes of data.
the CRC Field, which contains a 15-bit checksum
an Acknowledgement Slot; any CAN controller that has been able to correctly receive the message sends
an Acknowledgement bit at the end of each message.
The transmitter checks for the presence of the Acknowledge bit and retransmits the message if no
acknowledge was detected.

The Remote Frame

The Remote Frame is just like the Data Frame, with two important differences:
 it is explicitly marked as a Remote Frame (the RTR bit in the Arbitration Field is recessive), and
there is no Data Field.
 The intended purpose of the Remote Frame is to solicit the transmission of the corresponding
Data Frame. If, say, node A transmits a Remote Frame with the Arbitration Field set to 234, then
node B, if properly initialized, might respond with a Data Frame with the Arbitration Field also
set to 234.
  Remote Frames can be used to implement a request-response type of bus traffic management.
In practice, however, the Remote Frame is little used.
 There’s one catch with the Remote Frame: the Data Length Code must be set to the length of
the expected response message. Otherwise the arbitration will not work.

The Error Frame

 It is transmitted when a node detects a fault and will cause all
other nodes to detect a fault – so they will send Error Frames,
too. The transmitter will then automatically try to retransmit
the message. There is an elaborate scheme of error counters
that ensures that a node can’t destroy the bus traffic by
repeatedly transmitting Error Frames.
 The Error Frame consists of an Error Flag, which is 6 bits of the
same value (thus violating the bit-stuffing rule) and an Error
Delimiter, which is 8 recessive bits. The Error Delimiter provides some space in which the other
nodes on the bus can send their Error Flags when they detect the first Error Flag.

The Overload Frame

 It is very similar to the Error Frame with regard to the format and it is transmitted by a node that
becomes too busy

Max Speed:
 100 meters (330 ft) at 500 kbit/s
 200 meters (650 ft) at 250 kbit/s
 500 meters (1600 ft) at 125 kbit/s
 6 kilometers (20000 ft) at 10 kbit/s

Universal Serial Bus(USB)?

Universal Serial Bus (USB) is an industry standard that establishes specifications for connectors, cables,
and protocols for communication, connection, and power supply between personal computers and
their peripheral devices. There have been 3 generations of USB specifications:
 USB 1.x
 USB 2.0
 USB 3.x

USB Transfer Speeds

Specification USB 1.x USB 2.0 USB 3.x

Release Year 1996 2000 2008

Data Transfer Low Speed: 1.5 High Speed: 480 SuperSpeed: 5

Rate Mbps, Full Mbps Gbps,
Specification USB 1.x USB 2.0 USB 3.x

SuperSpeed+
Speed: 12 Mbps
(SS+): 10 Gbps

5V, 500mA 5V, 900mA

(2.5W) for USB (4.5W) for USB
5V, 500mA
Power Delivery 2.0, 5V, 900mA 3.x, 20V, 5A
(2.5W)
(4.5W) for USB (100W) for USB
3.x 3.1

Type A, Type B,
Same as USB 1.x,
Connector Types Mini-USB, Micro- Same as USB 2.0
plus Type C
USB

Cable Length 5 meters (16.4

Same as USB 1.x Same as USB 2.0
Limit feet)

Backward
Yes Yes Yes
Compatibility

USB 3.x includes USB 3.0, USB 3.1, and USB 3.2. The USB 3.2 standard also includes two additional transfer
modes: SuperSpeed+ (SS+) and SuperSpeed+ (SS++) which can transfer data at up to 20Gbps and 40Gbps
respectively.