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CIA II - CAMP -

The document outlines the Continuous Internal Assessment for the Computer Science department at Annai Violet Arts and Science College, focusing on Computer Architecture and Microprocessors. It includes various parts with questions on binary conversion, microprocessor functions, instruction sets, and data representation, along with detailed explanations of concepts like DMA and vector processing. The assessment is structured into three parts, covering multiple-choice questions, descriptive questions, and practical applications related to the 8085 microprocessor.

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0% found this document useful (0 votes)
28 views5 pages

CIA II - CAMP -

The document outlines the Continuous Internal Assessment for the Computer Science department at Annai Violet Arts and Science College, focusing on Computer Architecture and Microprocessors. It includes various parts with questions on binary conversion, microprocessor functions, instruction sets, and data representation, along with detailed explanations of concepts like DMA and vector processing. The assessment is structured into three parts, covering multiple-choice questions, descriptive questions, and practical applications related to the 8085 microprocessor.

Uploaded by

moselin0362
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOCX, PDF, TXT or read online on Scribd
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ANNAI VIOLET ARTS AND SCIENCE COLLEGE

DEPARTMENT OF COMPUTER SCIENCE ANNAI VIOLET ARTS AND SCIENCE COLLEGE


CONTINUOUS INTERNAL ASSESSMENT – II (EVEN SEM.) DEPARTMENT OF COMPUTER SCIENCE
CONTINUOUS INTERNAL ASSESSMENT – I (ODD SEM.)
Introduction of Computer Architecture and Microprocessor
Introduction of Computer Architecture and Microprocessor
Class : I B.Sc., Computer Science Date : 19.03.2025-FN
Class :I B.Sc.,Computer Science Date : 19.03.2025-FN Max.Marks : 75 Sub. Code: 436E1D
Max.Marks: 75 Sub. Code: 125C2A PART A (10  1 = 10 Marks)
PART A (101=10 Marks) Answer ALL questions
Answer ALL questions 1. Find the decimal number for the following binary number: 1101
1. Find the decimal number for the following binary number: 1101 2. Define Accumulator?
2. Define Accumulator? 3. Define “Microprocessor”
3. Define “Microprocessor” 4. What is Opcode and Operand?
4. What is Opcode and Operand? 5. What is an Instruction Set?
5. What is an Instruction Set? 6. Differentiate data bus and address bus.
6. Differentiate data bus and address bus. 7. What is a Flag?
7. What is a Flag? 8. Define Digital Computer
8. Define Digital Computer 9. Find 9’s and 10’s complement for (543)
9. Find 9’s and 10’s complement for (543) 10. What is program control?
10. What is program control? 11. Difference between RIM and SIM
11. Difference between RIM and SIM 12. Write a note on interrupt.
12. Write a note on interrupt.
PART B – (2  5 = 10 Marks)
PART B – (25= 10Marks) Answer any TWO questions
Answer any TWO questions 13. Convert the decimal number 111011 into octal and Hexadecimal.
13. Convert the decimal number 111011 into octal and Hexadecimal. 14. Explain the BCD to Binary conversion with example.
14. Explain the BCD to Binary conversion with example. 15. Discuss the functional block diagram of 8085 Microprocessor.
15. Discuss the functional block diagram of 8085 Microprocessor. 16. Explain the 8257 DMA Controller?
16. Explain the 8257 DMA Controller? 17. Difference between RISC vs CISC
17. Difference between RISC vs CISC 18. Write a note on Interrupts of 8085.
18. Write a note on Interrupts of 8085. 19. Explain the pipeline and their types.
19. Explain the pipeline and their types.
PART C – (3  10 = 30 Marks)
PART C –(3 10 = 30 Marks) Answer ALL questions
Answer ALL questions 20. Describe the Data representation.
20. Describe the Data representation. 21. Details about the architecture of the 8085 microprocessor.
21. Details about the architecture of the 8085 microprocessor. 22. Explain the 8085 Instruction set and addressing modes.
22. Explain the 8085 Instruction set and addressing modes. 23. Explain the block diagram of DMA and how DMA is used to transfer data
23. Explain the block diagram of DMA and how DMA is used to transfer data from peripherals.
from peripherals. 24. Determine the vector processing and array processors.
24. Determine the vector processing and array processors.
Prepared by
Mrs. G.Sudha
Asst.Prof. Computer Science Group into 3-bit sections: 110 110 101 011
Convert to octal: 6653₈
ANNAI VIOLET ARTS AND SCIENCE COLLEGE  Hexadecimal Conversion: Group binary into 4-bit sections: 1101
DEPARTMENT OF COMPUTER SCIENCE 1010 1011
CONTINUOUS INTERNAL ASSESSMENT – II (EVEN SEM.) Convert to hexadecimal: DAB₁₆
Introduction of Computer Architecture and Microprocessor
Scheme of Valuation
PART A (10  1 = 10 Marks)
14. BCD to Binary Conversion with Example
Answer ALL questions
BCD (Binary Coded Decimal) represents each decimal digit separately in 4-
1. 1101 in decimal: 13 bit binary.
2. Accumulator: A register in the CPU that stores intermediate Steps for conversion:
arithmetic and logic operation results.
3. Microprocessor: A single integrated circuit (IC) that acts as the 1. Convert each BCD digit to decimal.
central processing unit (CPU) of a computer. 2. Convert the decimal number to pure binary.
4. Opcode& Operand: Opcode is the part of an instruction that
specifies the operation; Operand is the data or memory location used Example: Convert BCD 1001 0010 (92 in decimal) to binary.
in the instruction.
5. Instruction Set: A collection of machine language instructions that a  Decimal 92 → Binary 1011100
processor can execute. Thus, 1001 0010 (BCD) → 1011100 (Binary)
6. Data Bus vs. Address Bus: The data bus carries actual data, while
the address bus carries memory addresses for data access.
7. Flag: A status indicator in the processor that shows results of
operations, such as zero, carry, or overflow.
15. Functional Block Diagram of 8085 Microprocessor
8. Digital Computer: A computer that processes data in binary (0s and
1s) using electronic circuits.
8085 has the following components:
9. 9’s Complement of 543: 456
10’s Complement of 543: 457
 Accumulator (A): Stores results of operations.
10. Program Control: The mechanism that directs the execution flow of
 ALU (Arithmetic and Logic Unit): Performs arithmetic and logical
instructions in a computer system.
operations.
11. RIM vs. SIM: RIM (Read Interrupt Mask) checks interrupt status;
 Registers: Includes B, C, D, E, H, L for temporary storage.
SIM (Set Interrupt Mask) is used to set or reset interrupts.
 Program Counter (PC): Holds the address of the next instruction.
12. Interrupt: A signal that temporarily halts the CPU’s current
 Stack Pointer (SP): Points to the top of the stack in memory.
execution to handle an urgent task or event.
 Instruction Decoder & Control Unit: Decodes instructions and
manages control signals.
PART B – (2  5 = 10 Marks)
 Address & Data Buses: Address bus (16-bit) locates memory, Data
Answer any TWO questions
bus (8-bit) transfers data.
13. Convert the decimal number 111011 into Octal and Hexadecimal

 Octal Conversion: Convert decimal 111011 to binary:


16. 8257 DMA Controller
111011 in binary is 110110101011
 Direct Memory Access (DMA) allows data transfer between
memory and I/O devices without CPU intervention.
 8257 DMA Controller manages high-speed data transfers in 8085- 19. Pipeline and Its Types
based systems.
 Features: Pipelining improves CPU performance by executing multiple instructions in
1. Four DMA Channels for multiple device communication. parallel.
2. Data Transfer Modes: Burst and Cycle Stealing. Stages of a Pipeline:
3. Auto Initialization to reload parameters after transfer
completion. 1. Fetch: Instruction is fetched from memory.
4. Priority Control for selecting DMA requests. 2. Decode: Instruction is decoded.
3. Execute: Operation is performed.
4. Memory Access: Data is read or written.
5. Write Back: Result is stored.
17. RISC vs. CISC
Types of Pipelines:
RISC (Reduced Instruction CISC (Complex Instruction
Feature
Set Computer) Set Computer)  Arithmetic Pipeline: Used in floating-point operations.
Instruction Set Simple, limited instructions Complex, many instructions  Instruction Pipeline: Executes multiple instructions simultaneously.
Execution Faster (one instruction per Slower (multi-cycle  Processor Pipeline: Divides CPU operations into stages.
Speed cycle) execution)
Fewer instructions but
Memory Use Requires more instructions
complex
Design PART C – (3  10 = 30 Marks)
Easier to design More complex Answer ALL questions
Complexity
Example ARM, MIPS Intel x86, AMD
20. Data Representation
18. Interrupts in 8085 Data representation refers to the methods used to store, process, and
manipulate data in a computer system. It includes different formats such as
Interrupts temporarily halt the CPU to handle urgent tasks. Types of binary, octal, decimal, hexadecimal, ASCII, and Unicode.
interrupts in 8085:
Types of Data Representation
1. Maskable Interrupts (Can be disabled):
o RST 5.5
1. Number Systems
o RST 6.5
o Binary (Base 2): Uses 0 and 1, fundamental in computers
o RST 7.5
(e.g., 1010₂ = 10₁₀).
2. Non-Maskable Interrupt (Cannot be disabled):
o Octal (Base 8): Uses digits 0-7 (e.g., 12₈ = 10₁₀).
o TRAP
o Decimal (Base 10): Commonly used by humans (e.g., 25₁₀).
3. Software Interrupts:
o Hexadecimal (Base 16): Uses digits 0-9 and A-F (e.g., A3₁₆
o RST 0 to RST 7
= 163₁₀).
2. Character Representation 5. Interrupt Control: Manages hardware interrupts.
o ASCII (American Standard Code for Information 6. Address and Data Bus: Transfers data and addresses.
Interchange): 7-bit code for characters (e.g., 'A' = 65).
o Unicode: 16-bit or 32-bit encoding for international character
sets.
22. 8085 Instruction Set and Addressing Modes
3. Fixed-Point and Floating-Point Representation
o Fixed-Point: Used for integers. The 8085 instruction set consists of 74 instructions categorized into five
o Floating-Point: Used for real numbers (IEEE 754 standard). groups:

4. Signed and Unsigned Representation Instruction Set of 8085


o Signed (Two’s Complement): Represents negative numbers.
o Unsigned: Only represents positive numbers. 1. Data Transfer Instructions: Move data between registers or memory.
o Example: MOV B, A (Copy data from A to B).
2. Arithmetic Instructions: Perform mathematical operations.
o Example: ADD B (Add B to A).
21. Architecture of the 8085 Microprocessor 3. Logical Instructions: Perform logical operations.
o Example: ANA B (AND A with B).
The 8085 microprocessor is an 8-bit microprocessor developed by Intel, 4. Branching Instructions: Change program sequence.
based on NMOS technology. o Example: JMP 2000H (Jump to address 2000H).
5. Control Instructions: Manage microprocessor functions.
Key Features of 8085 o Example: HLT (Halt the microprocessor).

 8-bit data bus (processes 8-bit data at a time). Addressing Modes of 8085
 16-bit address bus (can address 64 KB memory).
 74 instructions and 5 addressing modes. 1. Immediate Addressing: Operand is directly in the instruction.
 Operates on a +5V power supply and uses a 3 MHz clock speed. o Example: MVI A, 32H (Load 32H into A).
2. Register Addressing: Operand is in a register.
8085 Microprocessor Block Diagram o Example: MOV A, B (Move B to A).
3. Direct Addressing: Operand is in memory.
1. Arithmetic and Logic Unit (ALU): Performs arithmetic and logic o Example: LDA 2500H (Load value from 2500H into A).
operations. 4. Indirect Addressing: Operand is pointed to by a register.
2. Registers: o Example: MOV A, M (Move memory at HL to A).
o Accumulator (A): Stores intermediate results. 5. Implied Addressing: Operand is implied in the instruction.
o General-purpose registers (B, C, D, E, H, L): Used for data o Example: CMA (Complement the accumulator).
storage.
o Program Counter (PC): Holds the address of the next
instruction.
o Stack Pointer (SP): Points to the top of the stack. 23. Block Diagram of DMA and Data Transfer
3. Control Unit: Manages instruction execution.
4. Instruction Decoder: Decodes instructions.
Direct Memory Access (DMA) allows high-speed data transfer between 2. Array Processors
memory and peripherals without CPU involvement.
 A type of parallel processor that applies the same operation to
Block Diagram of DMA Controller multiple data sets simultaneously.
 Used in real-time applications like signal processing.
1. DMA Request (DREQ): Peripheral requests DMA transfer.
2. DMA Acknowledge (DACK): Controller acknowledges request. Types of Array Processors
3. Address Register: Holds memory address for data transfer.
4. Control Register: Manages transfer mode and status. 1. Attached Array Processor: Works as a co-processor for the main
5. Data Buffer: Temporarily holds data for transfer. CPU.
6. Bus Control Logic: Manages bus access. 2. SIMD (Single Instruction Multiple Data) Array Processor: Executes
one instruction on multiple data simultaneously.
Steps in DMA Data Transfer

1. Peripheral requests data transfer via DREQ.


2. CPU grants permission by sending HLDA (Hold Acknowledge). Prepared by
3. DMA controller takes control of the system bus. Mrs. G.Sudha
4. Data is transferred directly between memory and peripheral. Asst.Prof. Computer Science
5. After completion, control is returned to the CPU.

24. Vector Processing and Array Processors

Vector processing and array processors are used in high-speed computations


such as graphics, scientific applications, and AI.

1. Vector Processing

 Processes multiple data elements simultaneously using vector


registers.
 Used in supercomputers for large-scale mathematical computations.
 Example: Cray-1 Supercomputer

Vector Operations Example:

A = [2, 4, 6, 8]
B = [1, 3, 5, 7]
C = A + B → [3, 7, 11, 15] (Parallel execution)

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