Chapter 3 Objectives

• Perform the three basic logic operations.

• Describe the operation of and construct the truth tables for the
AND, NAND, OR, and NOR gates, and the NOT (INVERTER)
circuit.
• Draw timing diagrams for the various logic-circuit gates.
• Write the Boolean expression for the logic gates and
combinations of logic gates.
• Implement logic circuits using basic AND, OR, and NOT gates.
• Use Boolean algebra to simplify complex logic circuits.
• Use DeMorgan’s theorems to simplify logic expressions.
• Use either of the universal gates (NAND or NOR) to implement
a circuit represented by a Boolean expression.
• Explain the advantages of constructing a logic-circuit diagram
using the alternate gate symbols versus the standard logic-
gate symbols.
• Describe the concept of active-LOW and active-HIGH logic
signals.
 3-1 Boolean Constants and
Variables
• Boolean algebra allows only two
values—0 and 1. (부울 값 – logic level)
§ Logic 0 can be: false, off, low, no, open
switch.
§ Logic 1 can be: true, on, high, yes,
closed switch.
• The three basic logic
operations:
– OR, AND, and NOT.
 3-2 Truth Tables (진리표)

• A truth table describes the relationship

between the input and output of a logic
circuit.
• The number of entries corresponds to
the number of inputs.
§ A 2-input table would have 22 = 4
entries.
§ A 3-input table would have 23 = 8
entries.
 3-2 Truth Tables
Examples of truth tables with 2, 3, and 4 inputs.
3-3 OR Operation With OR Gates

• The Boolean expression for the OR

operation is:
X = A + B — Read as “X equals A OR B”
The + sign does not stand for ordinary
addition—it stands for the OR operation

• The OR operation is similar to addition, but when

A = 1 and B = 1, the OR operation produces:
1 + 1 = 1 not 1 + 1 = 2
In the Boolean expression x = 1 + 1 + 1 = 1…
x is true (1) when A is true (1) OR B is true (1) OR C is true (1)
3-3 OR Operation With OR Gates

• An OR gate is a circuit with two or more inputs,

whose output is equal to the OR combination
of the inputs.

Truth table/circuit symbol for a two input OR gate.

3-3 OR Operation With OR Gates

• An OR gate is a circuit with two or more inputs,

whose output is equal to the OR combination
of the inputs.
Truth table/circuit symbol for a three input OR gate.

A가 참(1) 또는 B가 참(1) 또는 C가
참(1) 일 때 x가 참(1)이다.

x 는 A 또는 B 또는 C 와 같다.
3-3 OR Operation With OR Gates
• Example of the use of an OR
gate in an alarm system.
ì0, VT < VTR
TH = í
î1, VT ³ VTR

온도가 최대값을
넘거나

알람을 울려야 함

ì0, VP < VPR

PH = í
압력이 최대값을 î1, VP ³ VPR
넘거나

VT, VTR, VP, VTR : analog TH, PH : digital

3-3 OR Operation With OR Gates
Timing diagram
3-4 AND Operations with AND
gates
• The AND operation is similar to
multiplication:
X = A • B • C — Read as “X equals A AND B AND C”
The + sign does not stand for ordinary
multiplication—it stands for the AND operation.
x is true (1) when A AND B AND C are true (1)

빨래건조기 또는
마이크로웨이브
동작

Truth table — Gate symbol.

3-4 AND Operations with AND
gates

Truth table/circuit symbol for a three input AND gate.

3-4 AND Operations with AND
gates
 AND / OR

The AND symbol on a logic-

circuit diagram tells you output
will go HIGH only
when all inputs are HIGH.

The OR symbol means the

output will go HIGH when
any input is HIGH.
 3-5 NOT Operation

• The Boolean expression for the NOT

operation: “X equals NOT A”
— Read as: “X equals the inverse of A”
X=A “X equals the complement of A”
The overbar represents
the NOT operation.

A' = A
Another indicator for
inversion is the
prime symbol ('). NOT Truth Table
 3-5 NOT Operation
A NOT circuit—commonly called an INVERTER.

This circuit always has only a single input, and the out-put
logic level is always opposite to the logic level of this input.
3-5 NOT Operation
The INVERTER inverts (complements) the
input signal at all points on the waveform.

Whenever the input = 0, output = 1, and vice versa.

 3-5 NOT Operation

• Typical application of the NOT gate.

This circuit provides an expression that

is true when the button is not pressed.
 Boolean Operations

• Summarized rules for OR, AND and

NOT

These three basic Boolean operations

can describe any logic circuit.
 3-6 Describing Logic Circuits
Algebraically
• If an expression contains both AND and
OR gates, the AND operation will be
performed first.

• Unless there is a parenthesis in the expression.

< Operator precedence :

- AND first, OR later
- Parentheses first
 3-6 Describing Logic Circuits
Algebraically

• Whenever an INVERTER is present, output is

equivalent to input, with a bar over it.
– Input A through an inverter equals A.
 3-6 Describing Logic Circuits
Algebraically

• Further examples…
 3-6 Describing Logic Circuits
Algebraically

• Further examples…
 3-7 Evaluating Logic Circuit
Outputs 출력값 구하기
• Rules for evaluating a Boolean expression:
1. Perform all inversions of single terms. (괄호를
뺀) 변수의 모든 역변환을 수행
2. Perform all operations within parenthesis.
괄호내의 연산 수행
3. Perform AND operation before an OR
operation unless parenthesis indicate otherwise.
괄호가 없다면 AND 연산 수행후 OR 연산 수행
4. If an expression has a bar over it, perform
operations inside the expression, and then invert
the result. 연산식에 바가 있으면 내부 연산 수행후
결과를 역변환 해줌
 3-7 Evaluating Logic Circuit
Outputs
< Example :

A = 0, B = 1, C = 1, and D = 1
x = ABC ( A + D)
x = 0 ×1 ×1 × (0 + 1)
x = 1 ×1 ×1 × (0 + 1)
x = 1 ×1 ×1 × (1)
x = 1 ×1 ×1 × 0
x=0
 3-7 Evaluating Logic Circuit
Outputs
• The best way to analyze a circuit made up
of multiple logic gates is to use a truth
table.
§ It allows you to analyze one gate or logic
combination at a time. 한번에 한 개의 게이트
또는 논리조합 분석
§ It allows you to easily double-check your work.
확인작업을 쉽게 할 수 있음
• When you are done, you have a table of
tremendous benefit in troubleshooting the logic
circuit. 논리회로 고장 점검이 쉬운 장점
 3-7 Evaluating Logic Circuit
• The next step is Outputs
to fill in the values for column v.
The first step after listing all input combinations
is to create a column in the truth table for each
intermediate signal (node).

v =AB — Node v should be HIGH

when A (node u) is HIGH AND B is HIGH
 3-7 Evaluating Logic Circuit
Outputs
• The third step is to predict the values at node w
which is the logical product of BC.

This column is HIGH whenever B is HIGH

AND C is HIGH
 3-7 Evaluating Logic Circuit
Outputs
• The final step is to logically combine columns v
and w to predict the output x.

Since x = v + w, the x output will be HIGH when v

OR w is HIGH
 3-7 Evaluating Logic Circuit
Outputs
• Output logic levels can be determined
directly from a circuit diagram.
§ Output of each gate is noted until final
output is found.
• Technicians frequently use this method.
3-7 Evaluating Logic Circuit
Outputs

Table of logic state

at each node of the
circuit shown.
3-8 Implementing Circuits From
Boolean Expressions
• It is important to be able to draw a
logic circuit from a Boolean expression.
§ The expression X = A • B • C, could be
drawn as a three input AND gate.
§ A circuit defined by X = A + B, would
use a two-input OR gate with an
INVERTER on one of the inputs.
3-8 Implementing Circuits From
Boolean Expressions
A circuit with output y = AC + BC + ABC
contains three terms which are ORed together.

…and requires a three-input OR gate.

3-8 Implementing Circuits From
Boolean Expressions
• Each OR gate input is an AND product
term,
§ An AND gate with appropriate inputs
can be used to generate each of these
terms.
3-8 Implementing Circuits From
Boolean Expressions

Circuit diagram to implement x = (A + B) (B + C)

3-9 NOR Gates and NAND Gates

• Combine basic AND, OR, and NOT

operations.
§ Simplifying the writing of Boolean
expressions
• Output of NAND and NOR gates may be
found by determining the output of an
AND or OR gate, and inverting it.
§ The truth tables for NOR and NAND
gates show the complement of truth
tables for OR and AND gates.
3-9 NOR Gates and NAND Gates

• The NOR gate is an inverted OR gate.

§ An inversion “bubble” is placed at the
output of the OR gate, making the
Boolean output expression x = A + B
3-9 NOR Gates and NAND Gates

• Output waveform of a NOR gate for

the input waveforms shown here.
3-9 NOR Gates and NAND Gates

§ The NAND gate is an inverted AND gate.

§ An inversion “bubble” is placed at the
output of the AND gate, making the
Boolean output
expression x = AB
3-9 NOR Gates and NAND Gates

• Output waveform of a NAND gate for

the input waveforms shown here.
3-9 NOR Gates and NAND Gates

Logic circuit with the expression x = AB • (C + D)

using only NOR and NAND gates.
 3-10 Boolean Theorems

• The theorems or laws that follow

may represent an expression
containing more than one variable.
• Help us to simplify logic expressions
and logic circuits
 3-10 Boolean Theorems

Theorem (1) states that if any variable

is ANDed with 0, the result must be 0.

Theorem (2) is also obvious

by comparison with ordinary
multiplication.

Theorem (4) can be proved

in the same manner.

Prove Theorem (3) by trying each case.

If x = 0, then 0 • 0 = 0
If x = 1, then 1 • 1 = 1
Thus, x • x = x
 3-10 Boolean Theorems
Theorem (5) is
straightforward,
as 0 added to anything does
not affect value, either in
Theorem (6) states that if any variable regular addition or in OR
is ORed with 1, the is always 1.
Check values: 0 + 1 = 1 and 1 + 1 = 1. addition.

Theorem (7) can be proved by

checking for both values of x:
0 + 0 = 0 and 1 + 1 = 1.

Theorem (8) can be proved similarly.

 3-10 Boolean Theorems
Multivariable Theorems
Commutative laws (교환 법칙)

Associative laws (결합 법칙)

Distributive law (분배 법칙)

 3-10 Boolean Theorems
Multivariable Theorems
Theorems (14) and (15) do not have counterparts in ordinary
algebra. Each can be proved by trying all possible cases for x and
y. Analysis table & factoring
for Theorem (14)
 3-11 DeMorgan’s Theorems
Equivalent circuits implied by Theorem (16)

The alternative symbol

for the NOR function.
 3-11 DeMorgan’s Theorems

Equivalent circuits implied by Theorem (17)

The alternative symbol

for the NAND function.
 3-11 DeMorgan’s Theorems
Example 3-16

z = ( A + C ) × ( B + D)
= ( A + C ) + ( B + D)
= (A ×C) + B × D
= AC + BD

Page 98: 2개 이상 변수도 가능함

3-12 Universality of NAND and
NOR Gates
• NAND or NOR gates can be used to
create the three basic logic expressions.
§ OR, AND, and INVERT.
• Provides flexibility—very useful in logic
circuit design.
3-12 Universality of NAND and
NOR Gates
• How combinations of NANDs or NORs are
used to create the three logic functions.

It is possible, however, to implement any logic expression using only

NAND gates and no other type of gate, as shown.
 3-12 Universality of NAND and
NOR Gates
• How combinations of NANDs or NORs are
used to create the three logic functions.

NOR gates can be arranged to implement

any of the Boolean operations, as shown.
 3-12 Universality of NAND and
NOR Gates
• A logic circuit to generate a signal x, that will go
HIGH whenever conditions A and B exist
simultaneously, or whenever conditions C and D
exist simultaneously.
The logic expression will be x = AB + CD.
Each of the TTL ICs shown here
will fulfill the function. Each IC is a
quad, with four identical gates on
one chip
3-12 Universality of NAND and
NOR Gates
In a certain manufacturing process, a conveyor belt
Ex. 3-18
will shut down whenever specific conditions occur

x = AB + CD

A: High whenever the conveyor belt speed is too fast

B: High whenever the collection bin at the end of the
4 logic signals belt is full
C: High when the belt tension is too high
D: High when the manual override is off
3-12 Universality of NAND and
NOR Gates
• Possible Implementations # 1

74LS08 and 74LS32

→ 2 ICs
3-12 Universality of NAND and
NOR Gates
• Possible Implementations #2

74LS00 → only 1 IC

[그림 3-32]
< How to build digital circuits easily?
- Use breadboard
Electrically connected

Breadboard + : 5V or VCC
- : 0V or GND
< WinBreadBoard
- Simulation of Digital Circuits
Where can I buy IC’s?

< Online
- Device Mart : http://www.devicemart.co.kr/
- Eleparts : http://www.eleparts.co.kr
- IC bank : http://www.icbank.co.kr

< Offline
- Yongsan
- Guro

< Datasheets :
- http://www.alldatasheet.co.kr
 3-13 Alternate Logic-Gate
Representations
• To convert a standard symbol to an
alternate: 기본 논리게이트 (AND, OR,
INVERTER, NAND, NOR)를 대안논리
기호로 사용
§ Invert each input and output in
standard symbols. 모든 입력과 출력을
역변환
• Add an inversion bubble where there are
none.
• Remove bubbles where they exist.
§ 연산기호를 AND에서 OR로 또는 OR에서
AND로 변환
3-13 Alternate Logic-Gate
Representations
 3-13 Alternate Logic-Gate
Representations
• Points regarding logic symbol
equivalences 논리기호의 등가:
§ The equivalences can be extended to
gates with any number of inputs.
등가성은 입력단자의 수가 많을 때도 성립
§ None of the standard symbols have
bubbles on their inputs, and all the
alternate symbols do. 표준기호는 입력에
버블이 없으나 모든 대안기호는 버블이 있음
 3-13 Alternate Logic-Gate
Representations
§ Standard & alternate symbols for each gate
represent the same physical circuit. 표준기호와
대안기호는 모두 같은 회로 나타냄
§ NAND and NOR gates are inverting gates.
NAND와 NOR 게이트는 역 연산 게이트
• Both the standard and the alternate symbols
for each will have a bubble on either the
input or the output. 표준기호와 대안기호 모두
입력 또는 출력 한쪽에만 버블이 있음
§ AND and OR gates are noninverting gates.
AND와 OR는 역 연산이 없는 게이트로
• The alternate symbols for each will have
bubbles on both inputs and output.
대안기호는 입력과 출력에 모두 버블이 있음
 3-13 Alternate Logic-Gate
Representations
• Active-HIGH – an input/output has no
inversion bubble. 입력 또는 출력에 버블이
붙어 있지 않을 때

• Active-LOW – an input or output has an

inversion bubble. 입력 또는 출력에 버블이
붙어 있을 때
 3-13 Alternate Logic-Gate
Representations
• Interpretation of the two NAND gate
symbols.
AND gate

모든 입력이 HIGH 일 때
출력 LOW

OR gate

입력중 어느 하나라도 LOW

일 때 출력 HIGH
 3-13 Alternate Logic-Gate
Representations
• Interpretation of the two OR gate
symbols.

OR gate

입력중 어느 하나라도 HIGH

일 때 출력 HIGH

AND gate
모든 입력이 LOW 일 때
출력 LOW
 3-14 Which Gate Representation
to Use
Proper use of alternate gate symbols in the circuit
diagram can make circuit operation much clearer.
Original circuit
using standard
NAND symbols.

Equivalent
representation
where output Z is
active-HIGH.

① Z will go HIGH when either X or Y is LOW

putting this all together
② X will go LOW only if A=B=1
③ Y will go LOW only if C=D=1

Output Z will go HIGH whenever either A=B=1 or C=D=1 (or both)

3-14 Which Gate Representation
to Use
Proper use of alternate gate symbols in the circuit
diagram can make circuit operation much clearer.
Original circuit
using standard
NAND symbols.

Equivalent
representation where
output Z is
active-LOW.

① Z will go LOW when X=Y=1

putting this all together
② X will go HIGH when either A or B is LOW
③ Y will go HIGH when either C or D is LOW

Output Z will go LOW only when A or B is LOW and C or D is LOW

3-14 Which Gate Representation
to Use

< Which circuit diagram should be used?

• Circuit causes action when output goes to 1 state
→ active-HIGH diagram used
• Circuit causes action when output goes to 0 state
→ active-LOW diagram
3-14 Which Gate Representation
to Use
• When possible, choose gate symbols so
bubble outputs are connected to bubble
input. 가능하면 버블이 달린 출력은 항상
버블이 달린 입력에 연결하고
§ Nonbubble outputs connected to
nonbubble inputs. 방울이 없는 출력은
방울이 없는 입력에 연결함
3-14 Which Gate Representation
to Use
• The logic circuit shown activates an
alarm when output Z goes HIGH.
Modify the circuit diagram
so it represents the circuit
operation more effectively.

The NOR gate symbol should be

changed to the alternate symbol with a
nonbubble (active-HIGH) output to
match the nonbubble input of AND
gate 2.
The circuit now has nonbubble outputs
connected to nonbubble inputs of gate 2.
3-14 Which Gate Representation
to Use
Example 3-22 Determine the input condition necessary to activate MEM

1. MEM is active LOW. It will go LOW only when X and Y are HIGH
2. X will be HIGH only when RD=0
3. Y will be HIGH when either W or V is HIGH
4. V will be HIGH when RAM = 0
5. W will be HIGH when either ROM-A or ROM-B = 0
6. Putting all this together → MEM will go LOW only when RD = 0 and
at least one of the three inputs ROM-A, ROM-B, or RAM is LOW
3-14 Which Gate Representation
to Use
< Asserted levels 주장하는 값:
- asserted = active
- unasserted = inactive
< Labeling active-LOW logic signals → overbar

RD, ROM - A, ROM - B, RAM , MEM

No overbar → the signal is active-HIGH
3-14 Which Gate Representation
to Use
MEM은
Active LOW

RD, RAM 등
은 Active LOW

• When a logic signal is in the active state (HIGH or LOW) it

is said to be asserted. 논리신호가 Active HIGH 또는 Active
LOW 일 때를 asserted 주장하고 있다고 함
• When a logic signal is in the inactive state (HIGH or LOW) it
is said to be unasserted. 논리신호가 활성상태가 아닐 때를
unasserted 주장하지 않고 있다고 함
A bar over a signal Absence of a bar
means asserted
(active) LOW.
RD means asserted
(active) HIGH
RD
3-14 Which Gate Representation
to Use
• An output signal can have two active states, with
an important function in the HIGH state, and
another in the LOW state. 출력신호가 두가지
활성상태를 가지는 경우: HIGH에서 중요한 기능
LOW에서도 중요한 기능

§ It is customary to label such signals so both active

states are apparent. 두가지 활성상태가 있다는 것을
분명하게 드러나도록 이름을 붙이는 것이 일반적임

§ Labeling bistate signals

- Bistate : two active states
(Ex) read/write action : RD / WR
HIGH → read operation, LOW → write operation
 3-15 Propogation Delay
• Propagation delay is the time it takes
for a system to produce output after it
receives an input.
§ Speed of a logic circuit is related to
propagation delay.
• Parts to implement logic circuits have a
data sheet that states the value of
propagation delay.
§ Used to assure that the circuit can
operate fast enough for the application.
§ [Figure 3-41]
• 전파지연 (Propagation delay) [Fig 3-41]

• 신호의 천이는 갑자기 직각으로 올라갈 수가 없다. 그러므로

입력신호의 50% 지점과 출력의 50% 지점으로 측정한다
(Transitions are not truly instantaneous so we
measure from the 50% point on the input to the 50%
on the ouput)

• 출력이 HIGH로 갈때 걸리는 시간과 LOW로 갈때 걸리는

시간은 똑같지 않다. 신호가 LOW에서 HIGH로 가는 시간을
tPLH라 하고 HIGH 에서 LOW 로 가는 시간을 tPHL라 한다
(The time it takes to make the output go HIGH is not
necessarily the same as the time to make the output
go LOW. These delay times are called tPLH [time
propagation LOW to HIGH) and tPHL (time propagation
HIGH to LOW)])