electronics

Article
EMC Analysis of the Inverting Boost/Buck Converter Topology
Daniel Kircher 1, * and David Johannes Pommerenke 1,2

1 Institute of Electronics, Graz University of Technology, 8010 Graz, Austria

2 Silicon Austria Lab, SAL Graz EMC Laboratory, 8010 Graz, Austria
* Correspondence: [email protected]

Abstract: This paper describes the electromagnetic compatibility (EMC) analysis of an inverting
buck/boost converter. The inverting buck/boost converter differs from other DC/DC converters,
such as the noninverting boost or buck converters, in that one inductor terminal is connected to the
ground and not to the input or output of the converter, i.e., neither input nor output is isolated from
an EMC perspective. A SPICE model was developed for analyzing the EMC properties of the circuit.
Two electromagnetic interference EMI-relevant resonances were observed depending on the state
of the switch. Simulations are confirmed with measurements using a circuit designed from discrete
components. Further, integrated commercially available converters were analyzed and showed EMC
properties that were similar to those of the general model.

Keywords: EMC; inverting buck/boost; DC/DC converter; SMPS

1. Introduction
Switched-mode power supplies SMPS cause electrical noise due to their fast di/dt
and dv/dt. Depending on the power requirement and voltage conversion, a variety of
Citation: Kircher, D.; Pommerenke, SMPS concepts exist. Boost, buck, and flyback converters are widely used. The inverting
D.J. EMC Analysis of the Inverting buck/boost topology is often used in display drivers for AMOLED displays. AMOLED
Boost/Buck Converter Topology. displays need two positive and one negative supply lines. The positive supply lines
Electronics 2022, 11, 3388. https://
are often controlled by buck converters, while the negative is controlled by an inverting
doi.org/10.3390/electronics11203388
buck/boost converter [1].
Academic Editors: Riccardo Torchio, The different topologies are shown in Figure 1. Each topology had its own electro-
Thomas Bauernfeind and Shinichi magnetic compatibility EMC properties. For example, the electromagnetic interference
Yamagiwa EMI performance of isolated flyback converters is often dominated by the interwinding
capacitance [2–5]. For boost and buck converters, the inductor isolates either the input or
Received: 31 August 2022
the output side from switching noise. In a buck converter, most switching noise is visible at
Accepted: 14 October 2022
Published: 19 October 2022
the input [6], while for a boost converter, the position of the inductor causes most switching
noise to appear at the output [7]. An inverting buck/boost converter uses an inductor
Publisher’s Note: MDPI stays neutral connected to the ground. Thus, the switching noise appears at both the input and the
with regard to jurisdictional claims in output of the circuit.
published maps and institutional affil-
The authors of [8] focused on the modeling of and reduction in radiated emissions
iations.
using a cross-capacitor and an improved printed circuit board PCB layout.
This paper presents the analysis of the conducted EMI for a converter of this kind.
The analysis is based on the simulation and measurements of a converter produced with
Copyright: © 2022 by the authors.
discrete components and of integrated commercial converters. The measurements and
Licensee MDPI, Basel, Switzerland.
simulations show two distinct resonances, and identify the components and associated
This article is an open access article parasitics that determine the ringing frequencies during turn-on and turn-off.
distributed under the terms and
conditions of the Creative Commons
Attribution (CC BY) license (https://
creativecommons.org/licenses/by/
4.0/).

Electronics 2022, 11, 3388. https://doi.org/10.3390/electronics11203388 https://www.mdpi.com/journal/electronics

Electronics 2022, 11, 3388 2 of 17

(a) Buck Converter (b) Flyback Converter (c) Boost Converter (d) Inverting buck/boost
Converter
Figure 1. Basic schematic of different converter types. (a) Buck; (b) flyback; (c) boost; (d) inverting
buck/boost.

2. Brief Description of the Inverting Buck/Boost Topology

The inverting buck/boost converter creates a negative output voltage from a positive
input. Its magnitude can be either higher or lower than the magnitude of the input voltage.
The basic elements of the simple inverting buck/boost topology in Figure 1d are a
transistor operated as a switch, a diode, an inductor, an output capacitor, and a controller
integrated circuit IC that generates the pulse width modulation PWM signal and controls
the gate of the MOSFET. Other more complex topologies can be found in the literature.
For higher power, synchronous buck/boost converters are used. Here, the diodes were
substituted with a second transistor. Therefore, diode losses were reduced. There also
exist advanced concepts to increase the voltage range of the converter [9] or lower the
input current ripple [10]. However, in this article, we discuss the basic topology in order to
understand the fundamental generation of resonances within the circuit.

3. EMI Path of the Inverting Buck/Boost Converter

By extending the circuit of the inverting buck/boost converter with a set of parasitic
components (Figure 2) of the different devices and the circuit board, the EMI paths to input
and output can be analyzed. The parallel capacitance of the inductor is usually less than
10 pF and often only a few pF. It does not shunt a significant current to ground. Its value is
less than the capacitance of the diode. This allows for EMI noise to be visible at both the
input and the output.
The following parasitics were added to the circuit:
• MOSFET capacitance in its open stage (50 pF to 500 pF).
• Diode capacitance in its open stage (10 pF to 200 pF).
• The inductance of the loop, which is formed by the input capacitor, the path through
the transistor to the diode, and via the diode, and the output capacitor back to the
ground plane were broken down into ESLCin , L Trace1 , L Trace2 , ESLCout .
• The Equivalent Series Inductance ESL and Equivalent Series Resistance ESR of the
output and the input capacitors allow for a voltage drop along the capacitor that can
drive EMI currents on the connected wires. These could be differential mode currents,
however, as there were multiple return paths, e.g., along both input and output wiring,
the currents can also show as common mode currents. The common mode currents
are not treated in this paper. In practical application, multiple capacitors are used
for filtering. In this case, the ESL and ESR in the circuit need to be understood as the
combined effective ESL and ESR of the parallel capacitors.
• The switching frequencies considered in this paper were in the range of MHz. The
commercial ICs used 1.2 MHz to 2.4 MHz
The investigated converters were small and had a nominal power of only a few watts.
We only conducted single-ended analysis, as these smaller converters are not stand-alone
PCBs with cable in and cable out, but are usually integrated into larger PCBs. Therefore,
common mode effects are not dominant in these converters and are not treated in this paper.
Two resonances need to be considered:
• When the switch is open, it forms a capacitor, and the diode forms a conductive path.
• When the switch is closed, the diode acts as a capacitor, and the switch forms a
conductive path.
Electronics 2022, 11, 3388 3 of 17

Cdiode
(10...200pF )

Ltrace1 Ltrace2
(1..5nH) (1..5nH)

Cin D
CFET Cout
10uF
(50...500pF ) 10uF

ESRCin ESRCout
(10...100m Ω) CL (10...100m Ω)
(1...10pF )

ESLCin ESLCout
(0.5...2nH ) (0.5...2nH )

Figure 2. Circuit including parasitic components.

3.1. EMI Path When the Switch Is Closed

Turning on MOSFET increases the phase voltage and reverses the bias of the diode.
The fast transient excites an LC structure that is formed by the loop inductance and the
diode capacitance (blue line in Figure 3a). Interestingly, the main inductor was not part of
this path as long as we could neglect its parasitic parallel capacitance.

(a) EMI path during turn-on (b) EMI path during turn-off

Figure 3. EMI path during turn-on and turn-off.

3.2. EMI Path When the Switch Is Open

The resonance circuit is different during turn-off; see Figure 3b. Two aspects determine
the differences between turn-on and turn-off ringing:
• The inductances stay the same, but the critical capacitance changes from the diode to
the MOSFET. Both are nonlinear.
• The voltage rise, and fall times are usually not the same, leading to different excitations
of the resonances.
Electronics 2022, 11, 3388 4 of 17

4. Simulation Model in Different Levels

We first present a basic SPICE circuit in Figure 4 to familiarize the reader with the
basic function. This is later extended to include parasitic components to illustrate the
EMI behavior.

a)schematic of the basic converter b)Voltage and current waveforms

of the basic circuit

Figure 4. Basic converter model with ideal components.

4.1. Basic Simulation Model

Figure 4 shows taht the transistor and controller IC were replaced with an ideal SPICE
switch driven by a pulse voltage source. As all the components and the connections were
ideal, no parasitic resonances or overshoots occurred during simulation. The simulation
results and the schematic shown in Figure 4 demonstrate the basic switching action.

4.2. Simulation Model Including Parasitics

Figure 5 shows the extended model. A 100 pF capacitor was added in parallel with the
switch to simulate the drain–source capacitance of a MOSFET. A fixed switch capacitance
was used for the sake of simplicity. In Section 5.2, a model of a PMOS transistor was used.
In addition, a real model of a Schottky diode (SL03), a parasitic capacitance of the inductor,
ESL and ESR of the capacitors, and trace impedances were added. The extended simulation
model is shown in Figure 5.
C2

100p
LTrace1 LTrace2
S1

L6 in D2 out L7
LX
100µ 1.5n 1.5n SL03 C1 100µ
C4
V1 C3 L1
10µ 10µ
sw

V2 1p 10µ
ESL_in ESL_out R1
5 100
1n 1n
R3
ESR_in 96.4m ESR_out
50m 50m

Figure 5. Simulation model including parasitics.

During turn-on, the dominating resonance is formed by the capacitance of the diode
and the loop inductance L Loop of the circuit, which is the sum of L Trace1 , L Trace2 and the ESL
of the in- and output capacitors. The frequency can be calculated with (1). The simulation
results during turn-on and turn-off are presented in Figure 6.

1 1
f = p = p = 404 MHz (1)
2π · L Loop · Cdiode 2π · 5 µH · 31 pF
Electronics 2022, 11, 3388 5 of 17

During turn-off, the dominating resonance is formed by the capacitance of the switch
and the loop inductance. The frequency can be calculated with (2).

1 1
f = p = p = 225 MHz (2)
2π · L Loop · Cswitch 2π · 5 µH · 100 pF
During turn-on, another resonance is formed by the capacitance of the inductor and
the loop inductance L Loop0 , which is formed by ( L Trace1 + ESLin )||( L Trace2 + ESLout ). The
frequency of this resonance is calculated in (3). This resonance is also visible in Figure 6.

1 1
f = q = p = 4.5 GHz (3)
2π · L Loop0 · Cinductor 2π · 1.25 µH · 1 pF

1 1
f = p = p = 4.4 MHz (4)
2π · Lmain · (Cswitch + Cdiode ) 2π · 10 µH · (100 pF + 31 pF)

10 0.04
0.02
0
0
−10 −0.02
−0.04
0.45 0.5 0.55 0.6 0.65 0.7

1
6
0
4
−1
2
0.45 0.5 0.55 0.6 0.65 0.7

−14 1
−16 0
−18 −1
0.45 0.5 0.55 0.6 0.65 0.7

Figure 6. Simulation results during turn-on and turn-off of the converter including parasitic (shown
signals are related to Figure 5).

This is the highest frequency in the circuit. The lowest frequency resonance in the
circuit was found during the discontinuous conduction mode (Figure 7). As no DC current
was flowing through the main inductor, the transistor and the diode acted like capacitors.
The main inductor was then part of the resonances. Interestingly, the highest and the lowest
frequency resonances were formed by the same loops, but all inductors were transformed
into inductors and vice versa. The resonance frequency in the discontinuous current mode
is calculated in (4).
The EMI voltage on the input and output ports could be calculated with (5), where
ESL and ESR are the parasitics of the in- or output capacitor, i Loop is the current in the
high-frequency loop, and ω the angular frequency of the current.

v = ( jωESL + ESR) · i Loop (5)

Electronics 2022, 11, 3388 6 of 17

−5

0 0.5 1 1.5

Figure 7. Measured oscillation during discontinuous current conduction mode.

5. Converter Built with Discrete Components

To confirm the correctness of the observations obtained by simulation, a converter
was built from discrete components, and measurements were taken. The SPICE model
was adapted to the components used in the circuit. The SPICE simulation model can
be found in Appendix A. The structure of the converter was kept as simple as possible
without any control loop to control the output voltage. The assembly used a minimal area
(50 mm × 30 mm) on a solid ground plane.
Since the aim of this article was to illustrate dominating EMI generation processes, a
very fast gate driver was selected. The 20 % to 80 % rise time of the gate driver was 2.4 ns,
and the slew rate during the rising edge was 1.5 V/ns. The 80 % to 20 % fall time was 1.8 ns.
The slew rate during falling was −2 V/ns. The output of the gate driver increased from
−3 V to 3 V. The source of the MOSFET was connected to the input port (Vin = 3 V), so the
gate-source voltage rises from −6 V to 0 V.
To avoid bootstrapping, a P-channel MOSFET was used. For both the diode and
the MOSFET, low-capacitance devices were selected to increase the dv/dt values. The
resulting 20% to 80% slew rate on the phase node was 2.62 V/ns during the rising edge,
and −1.75 V/ns during the falling edge.
A list of the used components is shown in Table 1.

Table 1. Components used in the circuit.

Component Part Number Properties

MOSFET ZXMP10A13FTA COSS = 40 pF@VDS = −4 V
Schottky diode ZLLS350 CTotal = 5 pF@4 V
Inductor CDRH4D16FB/NP-100MC L = 10 µH
Gate driver IX4340N Iout = ±5 A

To illustrate the EMI behavior and compare it with the simulation, additional discrete
capacitors were added to vary the diode and MOSFET capacitances in both the simulation
and the measurements. Further, inductances were added to observe the resonances when
the loop inductance was varied.

5.1. Measurement of the Converter

Figure 8 shows the principal measurement setup, which was realized on a solid
ground plane. The EMI currents could be captured using GHz bandwith Line Impedance
Stabilization Networks (LISNs) placed on the input and output. LISNs prevented the
high-frequency signals from reaching the source and load. Instead, radio frequency (RF)
currents were redirected into the 50 Ω port of the measurement device.
Electronics 2022, 11, 3388 7 of 17

LISN LISN

Inverting Buck/Boost

Inverting
LISN Buck/Boost LISN LISN Inverting
LISN
Buck/Boost

Spectrum Analyzer 9 kHz–3.2 GHz

Oscilloscope 4 GHz 20 GSa/s
50 Ω
50 Ω Coax Cable
Coax Cable

Resolution Bandwidth 300 kHz

50 Ω input mode
Frequency Domain Measurement Time Domain Measurement

Figure 8. Measurement Setup.

The phase voltage was probed via 1.8 kΩ terminating into a 50 Ω oscilloscope input.
We did not attempt to measure the current, as the introduction of any current probe would
add at least a few nH into the loop. The measurements were taken with an oscilloscope and
a spectral analyzer on ports Vin ,Vout , and VPhase . A 50 Ω coax cable was directly connected
to the nodes to be measured on the PCB. The oscilloscope had 4 channels, which allowed for
capturing time domain signals on the ports at the same time. The 4 GHz input bandwidth of
the oscilloscope allowed for zooming into the ringing, and measuring the ringing frequency
during turn-on and turn-off events. The used spectral analyzer had only one channel, so
the frequency domain measurements were taken sequentially. The reslolution bandwidth
(RBW) of the spectral analyzer was set to 300 kHz for all frequency domain measurements.
The gate driver had a positive and a negative supply voltage. The negative supply voltage
was fixed to −3 V, and the positive was connected to the input voltage of the converter to
guarantee that the transistor was in a completely off state. The gate-source voltage of the
MOSFET thus changes from 0 V to −6 V. The PWM signal which controls the gate driver is
set to a duty cycle d = 50% and a frequency of 3 MHz.
Figure 9 shows the measurement results on the phase node of the converter. The
time-domain signal, the frequency spectrum, and the spectrogram of the signal are shown.
The difference in oscillation frequency in turn-on and turn-off is visible. The dominant
frequencies are also visible in the time domain data, 333 MHz during the turn-off event
and 645 MHz during the turn-on event. Both frequencies were visible as peaks in the
frequency spectrum.
To provide evidence for the analysis of the two main loops causing EMI, capacitors
were placed in parallel with the diode and/or the MOSFET. By adding different capacitors
in parallel with the diode, the influence of the diode capacitance was investigated.
Electronics 2022, 11, 3388 8 of 17

-on
Turn 645 MHz

0 - off
Turn 333 MHz

−2
0.35 0.4 0.45 0.5

Power/frequency [dB/Hz]
1500 40 1500
20
1000 0 1000
−20
500 −40 500
−60
0 0
0.35 0.4 0.45 0.5 60 70 80 90 100 110

Figure 9. Measurement results on the phase node of the converter.

Figure 10 compares the oscillation frequencies with different values of the circuit
parasitics. Using (1) and (2), including the resulting diode capacitance due to the parallel
connection, led to the calculated data in Figure 10. The oscillation frequencies during the
turn-on event were decreased, while the frequencies during turn-off were approximately
the same. This confirms the EMI path discussed in Section 3.1 and the analysis of the
resonance during the turn-on given in Section 4.2.
The influence of the loop inductance was investigated by adding a 15 nH inductor in
series to the diode. Due to the increased loop inductance, both EMI paths were affected,
and both parasitic resonances were shifted to lower frequencies; see Figure 10. The calcu-
lated results in that figure were again obtained with (1) and (2) using the resulting loop
inductance.
The influence of the MOSFET capacitance could be observed by adding different
capacitor values across the drain and source of the transistor. Figure 10 compares the
different oscillation frequencies with different capacitor values. The calculated values were
obtained using (1) and (2) using the resulting MOSFET capacitance. A decrease in the
ringing frequency during turn-off with increasing capacitor values is visible. The frequency
during turn-on stayed constant, confirming the analysis of Section 4.2 and the EMI path
discussed in Section 3.2.

5.2. Simulation of the Converter

The SPICE simulation model was adapted to the used components and the estimated
parasitics of the PCB. SPICE models of the transistor and the diode were provided by
the manufacturer. Figure 11 shows the simulation results compared to the measurements
on the phase node of the converter. A spike at 650 MHz is visible in the simulation and
measurement results. The spike corresponds to the turn-on ringing. The turn-off frequency
is not visible in the simulation because of the small amplitude of the ringing and the high
low-frequency components in the signal.
Electronics 2022, 11, 3388 9 of 17

700 700
Turn-on calculated Turn-on calculated
Turn-on measured Turn-on measured
650
Turn-off claculated 600 Turn-off calculated
Turn-off measured Turn-off measured
600
Ringing Frequency [MHz]

Ringing Frequency [MHz]

500
550

500 400

450
300

400

200
350

300 100
12 14 16 18 20 22 24 26 28 5 10 15 20
Diode Capacitance [pF] Loop Inductance [nH]

(a) (b)

700
Turn-off calculated
650 Turn-off measured
Turn-on claculated
600 Turn-on measured

550
Ringing Frequency [MHz]

500

450

400

350

300

250

200

150
40 60 80 100 120 140
MOSFET Capacitance [pF]

(c)

Figure 10. Influence of circuit parasitics on the ringing frequency during turn-on and turn-off. Data
were obtained by adding (a) additional capacitors across the diode, (b) additional inductors into the
current loop, (c) additional capacitors across the MOSFET.

120

110

100

90

80

70

60
0 0.5 1 1.5 2

Figure 11. Simulation and measurement results of the frequency spectrum of the phase node signal.
Electronics 2022, 11, 3388 10 of 17

The frequency spectra of the in- and output ports, and the time domain signals are
shown in Figure 12. The spectra of the in- and output show two peaks on the turn-on
(333 MHz) and turn-off (645 MHz). The simulation results show slightly higher frequencies.
The simulated and the measured signals correspond in the time domain. A pre-pulse is
visible on the input port, before turn-on and turn-off. This pre-pulse is generated by the
gate driver, which is not modeled adequately in the simulation model. This pre-pulse is
also observed when the input voltage of the converter is set to 0 V and no current flows
from the input into the converter circuit. The frequency range above 1 GHz is not well
modeled. This is why the measurement results and the simulation results differ in this area.

4 60
2
0 50
-2
-4 40
4. 3 4. 32 4. 34 4. 48 4. 5 4. 52
4 30
2 Gate driver
0 20 caused difference
-2
10
4. 3 4. 32 4. 34 4. 48 4. 5 4. 52 0 0. 5 1 1. 5 2
50 70

0 60
Pulse signal
- 50 from gate driver
50
4. 3 4. 32 4. 34 4. 48 4. 5 4. 52
200 40
0
30 Gate driver
- 200 caused difference
20
4. 3 4. 32 4. 34 4. 48 4. 5 4. 52 0 0. 5 1 1. 5 2

Figure 12. Comparison between measurement (blue) and simulation (red). The gate driver causes
spectral content and generates differences in simulation and measurement results at a low frequency.

We did similar experiments in simulation as we did in measurements. The capacitances

across the transistor and diode, and the loop inductance are varied to compare the change
in behavior in simulation and measurement.
The main effects observed during the measurement are also visible in the simulation.
By increasing the capacitance across the diode, the frequency of the turn-on ringing is
shifted to lower frequency values. The results are shown in Figure 13.
By increasing the capacitance across the transistor, the ringing frequency during the
turn-off event was shifted to lower frequencies. The simulation results are shown in
Figure 13.
Increasing the loop inductance affected the ringing frequency during both turn-on and
turn-off. Both frequencies were shifted to lower frequency values. The results are shown in
Figure 13.
The discussed simulations again confirmed the EMI paths derived in Section 3.
The EMI current could be estimated using the measured EMI voltage on the phase node
and the parasitics along the EMI path. The parasitic capacitances of diode (5 pF@VReverse = 4 V)
and transistor (40 pF@VDS = −4 V) are given in the datasheet. The ESL of the input and
output capacitors was measured by measuring the S12 parameter. The measurement setup is
shown in Figure 14. The setup was the same for measuring the input and output capacitors.
The capacitor was connected to the ground, and the S12 was measured from Port 1 to Port
2. The results of these measurements are shown in Figure 14. Since we wanted to estimate
the ESL of the capacitors, the plot shows the S12 in the frequency range where the capacitor
showed its inductive behavior. The ESL of the input capacitors was approximately 50 pH,
Electronics 2022, 11, 3388 11 of 17

and the ESL of the output capacitors was approximately 400 pH. Several capacitors were
connected in parallel at the input and the output. So, the measured ESL must be understood
as the effective ESL of the capacitors in parallel. There was a significant difference between
the ESL values at the input and the output because more capacitors were connected in parallel
at the input.

700 700
Turn-on simulated
650
Turn-on measured
650
Turn-off simulated
600
Turn-off measured Turn-on simulated
600 550 Turn-on measured

Ringing Frequency [MHz]

Ringing Frequency [MHz]

Turn-off simulated
500 Turn-off measured
550
450
500
400

450 350

300
400
250
350
200

300 150
8 10 12 14 16 18 20 22 24 40 60 80 100 120 140
Diode Capacitance [pF] MOSFET Capacitance [pF]
(a) (b)
700
Turn-on simulated
Turn-on measured
600 Turn-off simulated
Turn-off measured
Ringing Frequency [MHz]

500

400

300

200

100
5 10 15 20
Loop Inductance [nH]
(c)

Figure 13. Comparison of the measurement and simulation of the influence of the parasitic elements
on the ringing frequency during turn-on and turn-off. (a) Simulated and measured ringing frequency
using different capacitance values across the diode and (b) across the MOSFET; (c) simulated and
measured ringing frequency using different values for the loop inductance.

Inductances L Trace1 and L Trace2 were estimated using the measured ringing frequen-
cies and the known parasitics of the electronic components. The resonance frequency
during turn-on is given with (1). L Loop is the sum of L Trace1 , L Trace2 , and the ESL of the
in- and output capacitors. With this information, L Trace1 and L Trace2 could be estimated to
approximately 2 nH.
The simple simulation model shows the basic behavior and function of an inverting
buck/boost converter. The model including the parasitics of the circuit could reconstruct the
fundamental resonances that occur when turning MOSFET on and off. The measurements
on the circuit, designed with discrete components, confirm the explored theories by means
Electronics 2022, 11, 3388 12 of 17

of simulation. The influence of the MOSFET capacitance during turn-on, and of the diode
capacitance during turn-off was confirmed with a modification of the tested circuit in terms
of adding capacitors in parallel with the diode and the MOSFET.

−20
S12 in
S12 out
S12 in, sim
−40 S12 out, sim

Magnitude (dB)
−60

−80

7 8 9
10 10 10
f [Hz]
(a) (b)

Figure 14. S12 measurements of the in- and output capacitors to estimate the ESLin/out . (a) Measure-
ment setup for the S12 measurement of the in- and output capacitors. (b) S12 measurement of the in-
and output capacitors.

6. Measurements on Commercial Converters

To verify the EMI analysis on actual circuits, different commercially available convert-
ers were investigated. In principle, these converters showed similar behavior. However,
due to the fact that the internal structure of the converters was not known, only assumptions
could be made about their internal behavior.
Two different evaluation boards were investigated. The two converters had the same
nonisolated inverting buck/boost topology. They differed in switching frequency, gate
drive, input voltage range, output voltage, and maximal output current. The specifications
of the different evaluation boards are listed in Table 2

Table 2. Specifications of the different evaluation boards.

Switching Slew Rate

Board Manufacturer Output Voltage Documentation
Frequency Settings
ADP5075 Analog Devices 1.2 MHz/2.4 MHz −5 V fast/normal/slow [11]
TPS63700 Texas Instruments 1.4 MHz −12 V Default [12]

6.1. Measurement Setup

The ground plane of the evaluation board was soldered directly onto a large copper
reference plane in order to achieve a similar measurement setup to that shown in Figure 8.
GHz bandwidth LISNs was added to the circuit.

6.2. Measurement Results of the Commercial Converters

Measurements on the commercial converters showed similar behavior to that of mea-
surements on the converter built with discrete components. Different ringing frequencies
during turn-on and turn-off could be observed. Frequencies during turn-on were signifi-
cantly higher than those during turn-off, indicating low diode capacitance. Figure 15 shows
the influence of the diode capacitance on the ringing frequencies.
The influence of the parasitic capacitance of the transistor is shown in Figure 15. For
these measurements, an additional capacitor was connected in parallel with the input
and the phase node. As the exact internal structure of the converter was not known, and
the additional capacitance may have also influenced other operations in the converter,
 Electronics 2022, 11, 3388 13 of 17

the measured results may not describe the influence of the MOSFET capacitance exactly.
However, as expected, the ringing frequency during turn-off was lowered by the additional
capacitance across the input and the phase node.

1000 1000
Turn-on measured Turn-on measured
Turn-off measured Turn-off measured
900 900

800 800
Frequency [MHz]

Frequency [MHz]
700 700

600 600

500 500

400 400

300 300
0 2 4 6 8 10 0 5 10 15
Additional Capacitance Phase Node to Output [pF] Additional Capacitance Input to Phase Node [pF]
(a) (b)

Figure 15. ADP5075: ringing frequencies depending on the parasitic capacitance of the (a) diode and
(b) the MOSFET.

ADP5075 allows for changing its phase node slew rate. The voltage slew rate changes
from 2.7 V/ns to 5.7 V/ns during turn-on and from −1.8 V/ns to −3.3 V/ns during turn-off.
In addition to the frequency measurements, we also measured the efficiency. With
lower slew rates, the EMI amplitude of the converter decreased in the frequency region
from 400 MHz to 3.2 GHz (Figure 16).

80
3V
78 3.7V
4.5V

76
Efficiency [%]

74

72

70

fast normal slow

setting
(a) (b)

Figure 16. ADP5075: Ringing frequencies depending on the parasitic capacitance of the diode and
the MOSFET. (a) ADP5075: Frequency spectrum on the output port at different slew rate settings;
(b) ADP5075:Efficiency dependent on the slew rate and input voltage.
Electronics 2022, 11, 3388 14 of 17

The second commercial converter, TPS63700, showed similar behavior, indicating that
SPICE-based analysis and the converter designed from discrete components captured the
main EMI properties of this class of converters.
As with the other converters examined in this paper, two different resonances could
be observed. The resonance frequency during turn-on (368 MHz) was higher than the
resonance frequency during turn-off (215 MHz). Figure 17 shows the spectrogram and the
time domain signal on the output port of the converter.
Figure 18 shows the frequency spectrum of ADP5075 on the output port depending
on the input voltage. The amplitude of the 909 MHz turn-on ringing was increased with a
higher input voltage. Due to the increased input voltage, the amplitude of the phase node
voltage and the slew rate increased. The turn-off ringing amplitude remained unchanged
while the input voltage was varied because of the internal regulation of the output voltage.
Figure 18 shows the frequency spectrum of TPS63700 on the output port. The 215 MHz
turn-off ringing amplitude was decreased by higher load resistors. This can be explained by
the decreased load current. So, the current that discharged the phase node capacitance dur-
ing turn-off was smaller; therefore, the voltage slew rate on the phase node was decreased
during turn-off. Due to the internal control loop, the output voltage was kept constant
while varying the load resistor. So, the turn-on transition was nearly unchanged.
Table 3 shows a comparison of the ringing frequencies of the investigated converters.

Table 3. Comparison of the investigated converters.

Turn-On Ringing Turn-Off Ringing Switching

Board
[MHz] [MHz] Frequency (MHz)
Discrete Components 645 333 3
ADP5075 906 352 2.4
TPS63700 368 215 1.4

50

-50

1.35 1.4 1.45 1.5

0
Power/frequency [dB/Hz]

600 600

400 400
-50

200 200

0 -100 0
1.35 1.4 1.45 1.5 40 45 50 55

Figure 17. Measured EMI on the output port LISN using TPS63700 at 3.7 V input, −12 V output, and
123 mA.
Electronics 2022, 11, 3388 15 of 17

(a) (b)

Figure 18. Influence of input voltage and load current on the noise spectrum of an inverting
buck/boost converter. (a) ADP5075: frequency spectrum depending on input voltage; (b) TPS63700:
frequency spectrum depending on load resistor.

7. Conclusions
The EMC analysis of the inverting buck/boost converter showed that two resonances
were excited, and both the input and the output sides of the converter could conduct EMI
signals. One resonance was excited during turn-on, and the other during turn-off. In both
cases, the inductance was formed by the loop inductance that included the capacitor, the
MOSFET, the diode and the decoupling capacitors. For turn-on, however, the reversed
biased diode formed the capacitor, while after turn-off, the MOSFET formed the capacitance,
and the diode conducted currents. This general behavior was verified in simulation and
with the design of a converter from discrete components. The analysis of commercial
converters demonstrated the same behavior in principle, even though the internal structure
of commercial converters is not known.

Author Contributions: Conceptualization, D.K. and D.J.P.; methodology, D.K. and D.J.P.; software,
D.K.; formal analysis, D.K.; investigation, D.K.; writing—original draft preparation, D.K. and D.J.P.;
supervision, D.J.P. All authors have read and agreed to the published version of the manuscript.
Funding: This research received no external funding.
Acknowledgments: This work is an extended version of Chapter 3 in [13] and Open Access Funding
by the Graz University of Technology.
Conflicts of Interest: The authors declare no conflict of interest.
Electronics 2022, 11, 3388 16 of 17

Appendix A
Appendix A.1

.SUBCKT TP3E106M050C0300_noL 1 8
* TaPoly, Polar Capacitor: 10μF, 050WVDC at 25°C, and 25 VDC Bias .SUBCKT C2012X5R1A106K085AB_p n1 n2
* Model 5RC.JPG , Center Freq. at 1000kHz C1 n1 11 8.84501676E-06
* VISHAY Intertechnologies, Inc., Vishay SPICE® C2 n1 12 3.37092220E-07
R6 1 8 1.000e+6 C3 n1 13 3.37092220E-07
*L1 1 2 .400e-9 C4 n1 14 3.37092220E-07
C1 2 7 2.863e-7 C5 n1 15 3.37092220E-07

v_gate
.MODEL BZX884-B2V7 D(IS = 7.066E-16 N = 0.9643 BV = 3 IBV = 0.005 RS = 0.2544 CJO = 3.518E-10 VJ = 0.6816 M = 0.3174 FC = 0.5 Vpk = 2.7 R1 7 8 1.027e-1 C6 n1 16 3.37092220E-07
mfg = Philips type = Zener) C2 2 6 5.725e-7 C7 n1 17 3.37092220E-07
.nodeset V(vcc) = 3 V(m1:1) = 2.855130571 V(m1:2) = -1.693004615 V(m1:3) = 2.854714382 V($v_phase$) = 2.853152434 R2 6 7 2.751e-2 L1 n2 21 4.80000000E-10
+ V(m1:23) = 2.83555137 V(n001) = -1.307686949 V(m1:22) = -1.693008361 V(m1:12) = 4.548135186 C3 2 5 1.145e-6 R1 11 21 2.85151563E-03
+ V(m1:14) = 0 V(m1:13) = 4.266387303 V(m1:15) = 0.2818238213 V(n008) = 2.651137447 V(n010) = 0.005521480268 R3 5 6 2.751e-2 R2 11 12 1.80459016E+00

v_gate_
+ V(n005) = -1.744968334 V(n009) = 2.916918834 V(v_gate) = -0.9999999998 V(n007) = -1.742329851 C4 2 4 2.290e-6 R20 R3 11 13 1.22318574E+01
+ V(n006) = -1.745627781 V($v_out$) = -0.001050735538 V(n003) = 3.012807952 V(n004) = 3.028781683 R23
R4 4 5 2.751e-2 R4 11 14 8.27046347E+01
+ V($v_in$) = 0.02891712108 V(n002) = -1.262246089 V(c1:2) = 2.620170764 V(c1:7) = 0.006954807204 C5 2 3 4.580e-6 7 1.8k R5 11 15 5.57908415E+02
+ V(c1:6) = 0.00570415807 V(c1:5) = 0.004557688424 V(c1:4) = 0.003877883674 V(c1:3) = 0.003663793033 R5 3 4 3.026e-1 R17 R6 11 16 3.75540359E+03
+ V(c11:2) = -0.007687121037 V(c11:7) = -1.748874147 V(c11:6) = -1.749973909 V(c11:5) = -1.750891264 .ENDS 50 R7 11 17 2.52272471E+04
R12 R13
+ V(c11:4) = -1.751484991 V(c11:3) = -1.751749496 V(d1#int1) = -1.751909308 V(d:m1:sd#int1) = 2.85308931 R8 n1 11 1.00000000E+07
.ENDS C2012X5R1A106K085AB_p
.savebias smc.txt internal time = 1m 1.8k 50
C15
R7 R6 R4 R5
*DIODES_INC_SPICE_MODEL K1 L10 L11 0.2
*ORIGIN = DZSL_DPG_SU 7p
*SIMULATOR = PSPICE 500 500 500 500
*DATE = 17/ 12/ 2014 L5 L6 R10 L7 D1 L2 L4 L3
vcc $V_Phase$
*VERSION = 1 C4 C9 C8 C14 C13 C7 C5 C12 C10 C3
v_gate

M1
ZXMP10A13F
V1 1µ 10µ 10 2n 2n 10µ 1µ
.1µ 220n 220n 220n 220n 220n 220n 220n 220n .1µ
C2
.SUBCKT ZXMP10A13F 10 20 30 {vin} 10u 10u
M1 1 2 3 3 Pmod1 35p
C1
RD 10 1 Rmod1 300E-3 $V_in$ $V_out$
R9 10u R16 R22 10R21
u R15 10R14
u R19 10R18
u
RS 23 3 Rmod1 600E-3
TP3E106M050C0300_noL C11 R1
RG 20 22 10 50m 50m 50m 50m 50m 50m 40m 40m
V3
RIN 20 23 2E11 11k
R8 TP3E106M050C0300 R3
RDS 10 23 2E9 L1
50 R11 C6 50
CGS 2 3 13E-12
10k 10µ
EGD 12 0 1 2 1 1p L8 L9
REGD 12 0 1 L11
L10 1n 1n
VFB 14 0 0 0.226n
FFB 1 2 VFB 1 0.5n R2
CGD 13 14 8E-12
118m
R1 13 0 1
D1 12 13 DLIM
DDG 15 14 DCGD
R2 12 15 1
D2 15 0 DLIM PULSE(-3 3 0 3n 3n 176n 333n)
.SUBCKT TP3E106M050C0300 1 8
DSD 10 23 DSUB
* TaPoly, Polar Capacitor: 10μF, 050W VDC at 25°C, and 25 VDC Bias
EL 2 22 1 3 .009 *ZETEX ZLLS350 Spice Model v2.0 Last revision 24/ 05/ 2007 * Model 5RC.JPG , Center Freq. at 1000kHz
RL 30 23 3 * * VISHAY Intertechnologies, Inc., Vishay SPICE®
LS 30 23 2E-9 *This simple model has limitations w ith respect to temperature R6 1 8 1.000e+6
.MODEL Pmod1 PMOS (LEVEL = 3 VTO = -4 TOX = 10.4E-8 NSUB = 3.5E+14 KP = 38 NFS = 13.7E+11 IS = 1E-15 N = 10) *best fit of forw ard characteristitics w ith temperature EG = 0.63 L1 1 2 .400e-9
.MODEL DCGD D (CJO = 8E-12 VJ = 0.45 M = 0.33 T_ABS = 25) *best fit of reverse characteristitics w ith temperature EG = 0.85 C1 2 7 2.863e-7
.MODEL DSUB D (IS = .29E-12 N = 1.01 RS = 0.05 BV = 105 CJO = 20E-12 VJ = 0.45 M = 0.33 TT = 14E-9 TRS1 = 2m IKF = .5) * R1 7 8 1.027e-1
.MODEL DLIM D (IS = 100U N = 1 T_ABS = 25) .MODEL ZLLS350 D IS = 14E-8 N = 1.03 ISR = 9E-8 NR = 2 IKF = 0.043 BV = 56 C2 2 6 5.725e-7
.MODEL Rmod1 RES (TC1 = 1.2e-3 TC2 = 1E-6) IBV = 1E-4 +RS = 1.2 TT = 1e-9 CJO = 13.5E-12 VJ = 0.6 M = 0.33 EG = 0.63 XTI R2 6 7 2.751e-2
.ENDS = 2 TRS1 = 4E-3 C3 2 5 1.145e-6
* R3 5 6 2.751e-2
*$ C4 2 4 2.290e-6
.SUBCKT TR3A106M010C0900 1 8 *
.param vin = 2.5 load = 40.5 cd = 1f CL R4 4 5 2.751e-2
* TaPoly, Polar Capacitor: 10μF, 010WVDC at 25°C, and 5 VDC Bias
= 7p C5 2 3 4.580e-6
* Model 5RC.JPG , Center Freq. at 1000kHz
R5 3 4 3.026e-1
* VISHAY Intertechnologies, Inc., Vishay SPICE®
.ENDS
R6 1 8 1.000e+7
L1 1 2 1.600e-9 .tran 0 0.5m 496.666u 100p uic
C1 2 7 2.980e-7
R1 7 8 3.041e-1 .options numdgt=8
C2 2 6 5.960e-7 .options plotwinsize=0
R2 6 7 2.901e-2
C3 2 5 1.192e-6
R3 5 6 5.803e-2
C4 2 4 2.384e-6
R4 4 5 1.451e-1
C5 2 3 4.768e-6
R5 3 4 5.803e-1
.ENDS

Figure A1. Used spice model to generate simulation results of the converter built with discrete components.
Electronics 2022, 11, 3388 17 of 17

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