LABORATORY WORK # 9.

ENCODER.

Aims: investigate operation of the octal-to-binary encoder.

PREPARATION TO LAB WORK.

1. Learn the information about encoder

2. Consider the scheme of experiment 9A and define the results theoretically. Draw the
scheme using Scheme Design System.
3. Implement the scheme of octal-to-binary encoder using OR gates and draw the scheme
with application of Scheme Design System. This will be the scheme for the experiment 9B.
4. Answer the question below in written form.
4.1. What is an encoder?
4.2. What is a priority encoder?
4.3. Show the principal scheme of octal-to-binary and explain why D0 is not connected
with any of OR gates.
4.4. What discrepancy may be for this scheme?

LAB WORK PERFORMANCE.

1. Demonstrate presence of your home preparation for lab work to your instructor.
2. Pass test of 10 questions.
3. Get a permission to begin the work.
4. Mount the scheme of experiment 9A on the breadboard and perform it. Fill in the table.
5. Make a conclusion about functionality of the scheme. Compare your results with
theoretical ones.
6. Demonstrate your results to your instructor. If your results are correct you may dismount
your scheme, if no – find the mistake.
7. Repeat steps 4-6 for experiment 9B.
8. Be ready to answer your instructor’s questions in process of work.
9. Complete your work, dismount your schemes, clean your working place.
10. Answer your instructor’s final questions, obtain your mark.
11. Ask your instructor’s permission to leave.

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Experiment 9A. Realize the following circuit on a breadboard. Connecting D 0-D7 to GND or
VCC based on the following table, fill in the blanks. Write ON or OFF for LEDs. Remember
that EI is active LOW enable input: a HIGH on this input forces all outputs to their inactive
(HIGH) state; EO is active-LOW enable output: this output pin goes LOW when all inputs are
inactive (HIGH) and EI is LOW; GS is active-LOW group signal output: this output pin goes
LOW whenever any of the inputs are active (LOW) and EI is LOW.

LED1

330

LED2

330
U? LED3
D0 10 9
D1 0 A
11 7 330
D2 1 B
12 6
2 C
D3 13 LED4
3
D4 1 14
D5 4 GS
2 330
D6 5
3
6
D7 4
7
LED5
E 5 15
EI EO
330
74LS148

INPUTS OUTPUTS
(EI)’ D0 ’ D1 ’ D2 ’ D3 ’ D4 ’ D5 ’ D6 ’ D7 ’ GS’ A B C EO’

1 5 x x x x x x x x
2 0 5 5 5 5 5 5 5 5
3 0 x x x x x x x 0
4 0 x x x x x x 0 5
5 0 x x x x x 0 5 5
6 0 x x x x 0 5 5 5
7 0 x x x 0 5 5 5 5
8 0 x x 0 5 5 5 5 5
9 0 x 0 5 5 5 5 5 5
10 0 0 5 5 5 5 5 5 5

Experiment 9B. Implement the scheme of octal-to-binary encoder using OR gates and mount
it on the breadboard. Fill in the table below. Compare your results with the table above.
INPUTS OUTPUTS
D0 D1 D2 D3 D4 D5 D6 D7 A B C

1 5 0 0 0 0 0 0 0
2 0 5 0 0 0 0 0 0
3 5 5 0 0 0 0 0 0
4 0 0 5 0 0 0 0 0
5 0 5 5 0 0 0 0 0
6 0 0 5 0 0 5 0 0
7 0 0 0 5 0 0 0 0
8 0 0 0 0 5 0 0 0
9 0 0 5 5 5 5 5 5
10 0 5 5 5 5 5 5 5

Conclusion.

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 TEST QUESTIONS

1. An encoder is a combinational circuit that

A. converts binary information from n input lines to a maximum of 2 n unique output lines
B. has 2n (or less) unique input lines and n output lines
C. selects binary information from one of many input lines and direct it to a single output line
D. receives information on a single line and transmits this information on one of 2 n possible
output lines
E. converts binary information from n input lines to m output lines

2. If D1 is active input outputs XYZ will be _______

D0 A.111
X
D1 B. 100
D2 C.101
D3 D.011
Y
E. 001
D4
D5
D6 Z
D7

3. 74139 is
A. decoder
B. DUX
C. MUX
D. dual 2-to-4 line decoder
E. triple 3-input NAND gate

4. DUX sometimes is called

A. code converter B. data selector C. data distributor
D. decoder E. all answers are correct

5. What output of 1*4 demultiplexer will be chosen if selection lines AB=00?

D 0

1*4
D 1
E
DUX D 2

D 3

A B

A. D1 B. D0 C. D2 D. D3 E. any of them

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6. For the circuit below if EI=5V, D1=0, D5=0 the state of L1 to L5 will be:
LED1

330

LED2

330
U? LED3
D0 10 9
D1 0 A
11 7 330
D2 1 B
12 6
2 C
D3 13 LED4
3
D4 1 14
D5 4 GS
2 330
D6 5
3
6
D7 4
7
LED5
E 5 15
EI EO
330
74LS148

A. ON,ON,ON,ON,ON B. OFF,OFF,OFF,ON,ON
C. ON,ON,ON,OFF,OFF D. OFF,OFF, ON,ON,ON,
E. OFF, ON,ON,ON, OFF

7. For the circuit in question 6 if EI=0, D0 to D7=5V the state of L1 to L5 will be:
A. ON,ON,ON,ON,OFF B. OFF,OFF,OFF,ON,ON
C. ON,ON,ON,OFF,OFF D. OFF,OFF, ON,ON,ON,
E. OFF, ON,ON,ON, OFF

8. For the circuit in question 6 enable input is active-______. A ____ on this input forces all
outputs to their inactive _____ state.
A. LOW, HIGH, LOW B.LOW, LOW, HIGH,
C. HIGH, LOW, HIGH D. HIGH, HIGH, LOW E. LOW, HIGH, HIGH

9. For priority encoder we have got input lines D1, D3, and D6 active simultaneously. In such
case output signal will be corresponded to …
A. D1 B. D3 C. D6 D. D1or D3 E. D3 or D6

10. For the circuit in question 6 output signals are: L1 is ON, L2 is ON, L3 is ON, GS is OFF,
EO is ON. It means that
A. the chip is disabled B. any input signal is absent
C. number 7 is encodered D. number 0 is encodered
E. all answers are wrong

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