04. Three-Phase Induction Motor Drive Control Structure
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Volume 02, Issue 04, April 2025 ISSN: 3048-913X
www.jets.org.in DOI: https://doi.org/10.5281/zenodo.15065466
Three-Phase Induction Motor Drive Control Structure
Vikram Singh1 and Ranveer Singh2
Department of Electrical Engineering, PES University, Bangalore
1
Corresponding Author: [email protected]
To Cite this Article
Vikram Singh and Ranveer Singh, “Three-Phase Induction Motor Drive Control Structure”, Journal of Engineering
Technology and Sciences, Vol. 02, Issue 04, April 2025, pp:14-19, DOI:https://doi.org/10.5281/zenodo.15065466
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Abstract: Industrial control systems require Field Programmable Gate Arrays (FPGAs) as an appropriate hardware
integration. An implementation of these dynamically reconfigurable FPGAs enables digital replacement of traditional
microcontrollers and DSPs to ensure fast functioning. A validation of FPGA-based implementation for DTCSVM
control of induction motors appears in this research. A Xilinx System Generator functions within a MATLAB/Simulink
platform to emulate the DTC-SVM control of induction motor drives.
Keywords: FPGA, Xilinx System Generator, DTC-SVM, Induction Motor, MATLAB/Simulink
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I. Introduction
Direct torque control with space vector modulation (DTC-SVM) used for induction motor drives has shown
rapid growth since the last few years. The SVM-DTC with low pass filter achieves three core characteristics: a constant
switching frequency combined with minimal torque and flux ripple together with low current distortion [1-4].
Electronic Devices need to execute all required functions properly to implement electrical controller devices. Multiple
industrial fields such as automotive and aerospace applications and space programs must satisfy a set of important
performance standards. These standards include obtaining high concentration of targets along with the needed level
of control integration. Multiple control operations function through a single device due to embedded systems with low
cost and integrated controllers.
High-performance control algorithms are applied and the system provides flexibility to modify parameters
while changing the controller strategy. Implementation occurs rapidly when designers use appropriate processes
followed by quick real-time computations and achievement of accuracy and dependability in challenging operational
conditions. FPGAs represent programmable integrated circuits that contain both configurable logic blocks and
customizable interconnection components [6]. Engineers who build the devices can program them for execution of
various extensive functional capabilities. FPGAs serve as development resources for ASIC prototypes and provide
confirmation platforms that verify physical implementation of new algorithms. These controllers enter the market
quickly and with affordable development costs so producers integrate them into finished products at a rapid pace.
FPGA technology delivered high-performance devices which included numerous millions of gates when it
reached commercial markets in the early twenty-first century. The integration of high-speed input/output (I/O) ports
as well as embedded CPU cores and similar features exists within multiple such devices. The current FPGAs serve as
a base to execute every possible application including systems which combine hardware and software along with
communication devices, software-defined radios and radars and image processing and digital signal processing (DSP)
tasks.
II. Principles of DTC-SVM
Traditional DTC faces its main shortcomings because the SVPWM-based DTC framework uses load angle
controls to minimize these issues. A single space vector emerges through typical space vector transformation of three-
phase voltage systems. Space vector modulation method allows the application of required stator voltage vectors. The
use of fixed switching frequency allows both zero steady state error and virtually non-existent torque ripple
measurements to be achieved [7]. The control approach has an easy application process because it needs one PI
regulator paired with a basic flux calculation block while omitting rotating coordinate translation. Figure 2
demonstrates this control block diagram example.
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Three-Phase Induction Motor Drive Control Structure
Fig 1: Reference and estimated flux relations
Fig 2: Block scheme of DTC-SVM with closed loop torque control
Fig 3: Three-phase voltage source PWM Inverter
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Three-Phase Induction Motor Drive Control Structure
III. PI Controller
There are a lot of PI controllers in every industry. They can take on a variety of shapes. Additionally, PI
controllers are integrated into a variety of special purpose control systems. These controllers perform a number of
crucial tasks, including feedback and steady state error elimination.
Fig 4: Block diagram of PI Control system
Figure 4 illustrates the representation of the torque control loop block diagram. A low-pass filter serves as
the simplest solution to deal with the starting conditions and dc drift issues which occur in pure integrators. Figure 5
illustrates the block diagram of low-pass filter application.
Fig 5: Flux Estimator based on voltage model with low-pass filter
IV. Design of PI Controller
The Xilinx System Generator serves to replicate the Module PI controller based on Figure 9. Users benefit
from the graphical algorithm features of Xilinx system generator within MATLAB/Simulink to produce complex
designs efficiently.
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Three-Phase Induction Motor Drive Control Structure
Fig 6: Induction Motor Drive Controller Design and Implementation Process
Fig 7: Xilinx Model of SVPWM
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Three-Phase Induction Motor Drive Control Structure
Fig 8: XSG and MATLAB/Simulink model of torque and flux estimation
Fig 9: XSG model of PI controller
Fig 10: KSG simulation of torque and flux estimator with low pass filter
V. FPGA Simulation Results
The simulation of SVPWM-based DTC for an induction motor takes place using XSG and
MATLAB/Simulink. The simulation integrates switching patterns from various SVPWM sectors together with a
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Three-Phase Induction Motor Drive Control Structure
torque estimator that uses a low pass filter along with the PI controller. The above-designed model is synthesized by
Xilinx Synthesis Tool (XST) followed by an implementation procedure using Xilinx Plan Ahead software. The
illustration in Figure 11 shows both the FPGA internal arrangement along with its I/O pin interface.
Fig 11: Internal structure of FPGA
VI. Conclusion
This paper established a dynamic control structure design along with simulation for three phase induction
motor drives. The high-performance DTC-SVM with low pass filter eliminates all traditional DTC disadvantages such
as variable switching frequency and torque and flux ripples as well as current distortions. The paper demonstrates
simulation outcomes for the proposed concept.
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