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High-Speed and Low-Energy Resistive

Switching with Two-Dimensional Cobalt
Phosphorus Trisulfide for Efficient
Neuromorphic Computing
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Yun Ji, Baoshan Tang, Jinyong Wang, Haofei Zheng, Zhengjin Weng, Yangwu Wu, Sifan Li,
Aaron Voon-Yew Thean, and Kah-Wee Ang*
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sı Supporting Information

ABSTRACT: Two-dimensional (2D) materials hold significant

potential for the development of neuromorphic computing
architectures owing to their exceptional electrical tunability,
mechanical flexibility, and compatibility with heterointegration.
However, the practical implementation of 2D memristors in
neuromorphic computing is often hindered by the challenges of
simultaneously achieving low latency and low energy con-
sumption. Here, we demonstrate memristors based on 2D
cobalt phosphorus trisulfide (CoPS3), which achieve impressive
performance metrics including high switching speed (20 ns),
low switching energy (1.15 pJ), high switching ratio (>400),
and low switching voltages (1.05 V for set and −0.89 V for
reset). The creation of sulfur vacancies in CoPS3 through an electroforming process facilitates the formation of conductive
filaments, leading to uniform fast switching with minimal energy requirements. The CoPS3 memristors also show linear
conductance modulation and long-term memory retention, enabling high-accuracy modeling of artificial neural networks for
handwritten digit recognition and convolutional neural networks for image processing. Furthermore, robust memristive
switching is achieved in solution-processed large-scale CoPS3 films, underscoring their potential for wafer-scale, low-
temperature integration. The combination of rapid switching, low energy consumption, extended memory retention, high
switching ratio, linear conductance update, and scalability manifests the potential of 2D CoPS3 materials for energy-efficient
neuromorphic computing circuits.
KEYWORDS: CoPS3, memristor, fast resistive switching, low-energy consumption, neuromorphic computing

INTRODUCTION consumption,7,8 fast switching speed,9 excellent mechanical

Memristors are two-terminal-resistive devices with electrical stability and flexibility,10,11 multimode resistive switching
resistances that can be modulated by an applied electrical bias.1 behaviors,12,13 precise control over synaptic functionalities,14
With the ability to integrate computing and memory functions, and high integration density.3
memristors show great promise for overcoming the von The most widely investigated 2D memristors are based on
Neumann bottlenecks inherent in conventional computing.2−4 binary transition metal sulfides (such as MoS2, WS2, and ReS2)
A broad range of memristive materials and their switching and binary insulators (such as hexagonal BN).10,14−19
mechanisms have been extensively investigated, with a primary However, in their pristine single-crystal form, these materials
focus on three-dimensional (3D) oxide materials and two-
dimensional (2D) van der Waals materials. While 3D oxide Received: August 27, 2024
memristors offer high endurance and ambient stability, they are Revised: December 9, 2024
hindered by high energy consumption.5,6 Additionally, their Accepted: December 17, 2024
bulk structure results in poor mechanical flexibility and low Published: December 31, 2024
integration density. On the contrary, 2D memristors offer
distinct advantages, including exceptionally low energy

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Figure 1. Device configuration and thickness-dependent performance. (a) Schematic diagram of CoPS3 memristors. (b) Crystalline structure
of CoPS3 single crystal. (c) Top-view SEM image of a CoPS3 memristive crossbar array. (d) Cross-sectional TEM image of a Ti/CoPS3/Au
memristor. (e) High-resolution TEM image of the CoPS3 layer in a Ti/CoPS3/Au memristor. (f) Raman spectra of CoPS3 nanoflakes with
different thicknesses. (g) Raman spectra of a 12 nm thick CoPS3 nanoflake under air exposure with various durations. (h) Dependence of the
position and FWHM of the Raman peak at 382 cm−1 on air exposure duration. (i) Representative I−V curves of CoPS3 memristors with
different CoPS3 thicknesses. (j,k) Distribution of Vset (j) and switching ratio (k) as functions of CoPS3 thickness.

often exhibit poor resistive switching characteristics due to the their fabrication process and increasing costs. Moreover, these
lack of channels for conductive filament formation. Con- treatments often result in nonuniform material composition
sequently, special treatments such as oxidation, e-beam and structural defects, leading to unsatisfactory device-to-
irradiation, and ion doping are required to introduce sufficient device variations. Most large-scale 2D memristors rely on the
defects for effective resistive switching,10,14−17 complicating formation of conductive filament along defects at grain
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boundaries,3,18 which poses a challenge as device dimensions This property facilitates easy acquisition of CoPS3 layers with
shrink below the grain size, potentially degrading or even desired thicknesses through the top-down exfoliation techni-
preventing resistive switching. Therefore, exploring 2D que.28,29 Here, we directly utilized multilayer CoPS3 single-
materials that exhibit robust resistive switching in their pristine crystal nanoflakes obtained by mechanically exfoliating from
single-crystal form is crucial not only for simplifying the commercial bulk CoPS3 single crystals, without any additional
fabrication process and reducing costs but also for achieving treatments. Detailed experimental procedures for device
high-integration memristor arrays with uniform performance. fabrication are provided in the Methods section. Ti was
2D metal phosphorus trichalcogenides (MPX3, where M = chosen as the active electrode material due to its moderate
Mn, Ni, Fe, Cd, and Co, and X = S and Se) have emerged as migration rate. Although memristive devices with Ti electrodes
promising candidates for resistive switching in memris- typically require higher driving voltages compared to those
tors.20−23 Unlike commonly studied 2D materials like MoS2, with highly active Ag and Cu electrodes, 3 the high
PdSe2, and ReS2, MPX3 can achieve remarkable resistive controllability of Ti migration enables more reliable synaptic
switching characteristics in their pristine single-crystal form, plasticity. This characteristic is crucial for efficient and precise
which simplifies the fabrication process, reduces costs, and neuromorphic computing. Each CoPS3 memristor has a
ensures uniform performance.24 Among these, cobalt phos- dimension of 1 × 1 μm2, as illustrated in the top-view
phorus trisulfide (CoPS3) is particularly notable due to its scanning electron microscopy (SEM) and optical images
unique structure and electronic properties. The weak van der (Figures 1c and S1). The cross-sectional transmission electron
Waals interactions between adjacent layers allow bulk CoPS3 microscopy (TEM) image of a Ti/CoPS3/Au memristor,
to be efficiently exfoliated into large, thin nanoflakes suitable optimized for switching voltage and resistive switching ratio,
for electronics integration.22 These exfoliated nanoflakes can reveals that the CoPS3 layer is approximately 12 nm thick
be further assembled into thin films, facilitating the scalable (Figure 1d,e). The energy-dispersive X-ray (EDX) mapping
fabrication of electronic devices. Additionally, previous image indicates that the pristine CoPS3 single-crystal layer has
investigations have demonstrated that sulfur (S) vacancies a highly homogeneous composition (Figure S2).
can be easily created in CoPS3,25 serving as potential pathways The Raman spectra of freshly exfoliated CoPS3 layers, with
for the formation of conductive filaments and contributing to thickness ranging from 4 to 34 nm, exhibit five distinct peaks,
high-speed, low-energy-consumption resistive switching. Fur- consistent with the characteristics of intrinsic CoPS3 single
thermore, CoPS3’s relatively wide band gap and high inherent crystals, as depicted in Figure 1f.25,28 The positions of all of the
resistivity suggest a high potential for achieving low energy Raman peaks remain unchanged regardless of the thickness,
consumption, substantial resistive switching ratios, and low confirming the weak coupling between adjacent CoPS3 layers.
leakage currents.26,27 Despite these promising characteristics, The air stability of electronic materials is a crucial factor as it
comprehensive investigations into the working mechanism and determines the reliability and lifespan of electronic compo-
performance of CoPS3 memristors are still lacking. nents. Figure 1g presents the Raman spectra of a multilayer
In this work, we demonstrate CoPS3 single-crystal materials CoPS3 nanoflake (∼12 nm thick) exposed to various durations
as promising candidates for rapid, energy-efficient neuro- of air exposure, revealing no noticeable broadening of the
morphic computing tasks. The resistive switching behavior of Raman peaks over time. The calibrated peak position and full
CoPS3 materials can be effectively modulated by tuning its width at half-maximum (FWHM) of the primary Raman peak
thickness, electric field, and electrode materials. Memristors associated with the A1g mode (∼382 cm−1) maintain their
with a Ti/CoPS3/Au configuration exhibit fast switching (20 values for a period of 12 days (Figure 1h), indicating the
ns), low switching energy (1.15 pJ), large switching ratio excellent air stability of the multilayer CoPS3. This remarkable
(>400), and low switching voltages (1.05 V for set and −0.89 environmental stability of CoPS3 materials makes them
V for reset). This high-performance switching is attributed to suitable for the fabrication of electronics under ambient
the highly controllable formation and rupture of Ti conductive conditions, facilitating cost-effective and streamlined produc-
filaments driven by electric field. Moreover, the CoPS3 tion processes. To conduct a comprehensive investigation of
memristors demonstrate highly linear conductance modulation CoPS3-based memristors, we initially tested devices with
and long-term memory retention, enabling accurate modeling different CoPS3 thicknesses (4, 9, and 12 nm) using DC
of artificial neural networks (ANNs) for handwritten digit sweeps. During the measurements, the Ti top electrodes were
recognition and convolutional neural networks (CNNs) for biased while the Au bottom electrodes were grounded.
image processing. Additionally, effective memristive switching The CoPS3 memristor started in a high-resistance state
is achieved in solution-processed large-scale CoPS3 films, (HRS). An electroforming process (Figure S3) triggered a
underscoring their potential for wafer-scale, low-temperature sudden increase in current, transitioning them into a low-
integration. CoPS3 memristors exhibit fast switching speed, low resistance state (LRS) and inducing reproducible resistive
energy consumption, low operating voltages with minimal switching behaviors (Figure S4). The representative logarith-
cycle-to-cycle variations, high on/off ratio, and scalability, mic current−voltage (I−V) characteristics of the devices with
demonstrating promising potential for practical, energy- different CoPS3 thicknesses after the electroforming process
efficient neuromorphic computing applications. are presented in Figure 1i, demonstrating bipolar nonvolatile
resistive switching behaviors. Switching from HRS to LRS (set
RESULTS AND DISCUSSION process) and from LRS to HRS (reset process) could be
Figure 1a depicts a schematic diagram of CoPS3 memristors, achieved only by applying positive and negative biases,
positioned at the intersections of active Ti top electrodes and respectively. We carefully analyzed and compared the statistics
inert Au bottom electrodes. CoPS3 has a monoclinic structure of the switching parameters extracted from consecutive DC
with space group C2/m, featuring adjacent layers arranged in a sweeps (Figure S4), including the set voltage (Vset) and
honeycomb-like lattice that weakly interact with each other switching ratio (determined based on Ohm’s law at a read
along the c-axis through van der Waals forces (Figure 1b).22 voltage of 0.1 V). The results revealed a trade-off between Vset
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Figure 2. Key parameters of Ti/CoPS3/Ag memristors. (a) I−V curves of a CoPS3 memristor with CoPS3 thickness of 12 nm for 100
consecutive sweeps. (b,c) Statistical analysis of Vset and Vreset (b) and resistance cumulative probability (c) extracted from (a). (d,e)
Benchmarking related to Vset (d) and Vreset (e). (f,g) I−V curves of the CoPS3 memristor operated under various compliance currents (f) and
Vreset (g). (h) Retention property (read voltage 0.1 V) of the memristor at 32 different resistance states for 1800 s. (i) A single synaptic event
of the CoPS3 memristor. The enlarged output current in the inset clearly shows the effective resistive switching. (j) Benchmarking related to
the speed and energy consumption of various memristors. (k) Radar graph comparing the device metrics of the CoPS3 memristor with
reported memristors utilizing various materials.

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Figure 3. Working mechanism of the Ti/CoPS3/Au memristor. (a) Current maps comparing HRS and LRS states of a CoPS3 layer. (b) I−V
curve of an Ag/CoPS3/Au device. (c) Composition distribution of a Ti/CoPS3/Au memristor in its LRS. (d,e) Cross-sectional high-
resolution TEM image (d) and the corresponding Z-contrast intensity (e) of the Ti/CoPS3/Au memristor after an electroforming process.
(f) Schematic illustrations of the resistive switching mechanism of the Ti/CoPS3/Au memristor.

and the switching ratio with CoPS3 thickness. Specifically, an over a wider range, advantageous for larger-scale neural
increase in the CoPS3 layer thickness resulted in a higher networks and higher computing accuracy.
switching ratio at the expense of a higher Vset, as shown in Given our focus on the potential of CoPS3 materials for
Figure 1j,k. The variations in Vset and switching ratio with neuromorphic computing applications, we selected CoPS3
memristors with a thickness of approximately 12 nm for
CoPS3 thickness can be attributed to the thickness-dependent
further demonstration. This specific thickness was chosen due
initial HRS resistance of the CoPS3 materials. Thinner CoPS3
to its high switching ratio, which is advantageous for achieving
layers required lower driving voltages due to their lower initial a greater number of conductance states. Figure 2a displays
HRS resistance, making them suitable for ultralow-energy- consecutive set/reset cycles of a CoPS3 memristor recorded
consumption circuits. Conversely, thicker CoPS3 layers with a under DC sweeps in the ambient environment, which
higher initial HRS resistance facilitated a higher switching demonstrates reproducible bipolar nonvolatile resistive switch-
ratio, enabling more precise modulation of the resistance state ing behavior with low switching voltages (Vset = 1.05 ± 0.08 V
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and reset voltage Vreset = −0.89 ± 0.05 V) and a high switching increase in current (Figure 2a), indicating the formation of
ratio of about 449, as shown in Figure 2b,c. The cycle-to-cycle conductive filaments across the CoPS3 layer.3,48,49 Figure 3a
variability of Vset and Vreset was evaluated by analyzing the shows a comparison of the current maps of a CoPS3 nanoflake
coefficient of variation (σ/μ), where σ represents the standard in its HRS and LRS. The presence of clear current exclusively
deviation of Vset (Vreset) and μ represents the mean value of Vset in its LRS confirms the formation of conductive filaments. To
(Vreset). The cycle-to-cycle variations in Vset and Vreset were only further understand the nature of these conductive filaments, we
7.6% and 5.6% (Figure 2b), respectively. The low switching compared the electrical characteristics of CoPS3 memristors
voltages combined with their low variability demonstrate with different top electrodes. Figures 3b and S8 show the I−V
superior performance compared to various reported materials, curves of CoPS3 devices with Ag and Au top electrodes,
as illustrated in Figure 2d,e.5,30−39 respectively, which exhibit distinct differences compared to
To demonstrate the important parameter of storage density those of the Ti/CoPS3/Au device. The device with a highly
in a memristive device, we showcased the multilevel storage active Ag top electrode shows bipolar resistive switching
capability of the CoPS3 memristor. Figure 2f,g depicts the I−V characteristics similar to the Ti/CoPS3/Au device, but with
curves of the device operating at different compliance currents significantly reduced Vset and Vreset values of 0.13 V and −0.13
and Vreset, respectively. The resistance as a function of V (Figure 3b), respectively. Additionally, the Ag/CoPS3/Au
compliance current and V reset is summarized in the device exhibits higher cycle-to-cycle variations in Vset and Vreset
accompanying insets. It is evident that increasing the (Figure S9). The device with the inert Au top electrode does
compliance current decreases the device resistance, while not exhibit any form of cyclic resistive switching, and the
raising the absolute value of Vreset increases the resistance. This abrupt increase in current observed as the applied electric field
indicates that the conductance states of the device can be reaches 2.95 V is likely induced by dielectric breakdown
precisely adjusted to desired values through cooperative accompanied by irreversible physical damage (Figure S8).2
modulation of the compliance current and Vreset. By synergisti- The significant influence of electrode materials on resistive
cally controlling the compliance current and Vreset, we achieved switching characteristics strongly suggests that the conductive
32 conductance states corresponding to 5 bits, as shown in filaments in the Ti/CoPS3/Ag memristors are formed by the
Figure 2h. The devices exhibited remarkable room-temper- penetration of Ti into the CoPS3 layer under the influence of
ature retention of over 1800 s without any noticeable decline an electric field, which can be further confirmed by the atomic
over time. Other Ti/CoPS3/Au memristors in the crossbar percentage line profiles from EDX measurements (Figure 3c).
array can also achieve the same 32 conductance levels with the We further analyzed the changes of Co, P, and S in the
maximum difference of only 7% (Figure S5). Additionally, CoPS3 layer induced by the electric field. Homogeneous
even when the time was extended to 1 × 104 s, the device still distribution of Co, P, and S can be observed in a CoPS3
maintained a good retention for both LRS and HRS states nanoflake at its initial state (Figure S10). However, the
(Figure S6). distribution of S significantly changes after applying an external
The Ti/CoPS3/Au memristor exhibits a fast switching speed electric field, with more S vacancies near the top electrode
of approximately 20 ns, as shown in Figure 2i. The energy (Figure 3c). Previous studies have confirmed that electric field
consumption E for a single effective synaptic event can be can create S vacancies in 2D materials through the Joule
calculated using the equation heating-induced thermophoresis effect,10 where the temper-
ature gradient resulting from increased current displaces lighter
E = V ·I · t
atoms from their original positions. S vacancies can serve as
where I stands for the generated current by a single pulse with preferential diffusion paths for active metal ions, guiding and
amplitude V and width t.40 By applying a short pulse with an facilitating the formation of conductive filaments.50 High-
amplitude of 1.6 V and a width of 10 ns (Figure 2i), we resolution TEM images and the corresponding line profile of
calculated the energy consumption E of the memristor to be Z-contrast intensity reveal a distinct defective region within the
1.15 pJ. This energy consumption level is comparable to those CoPS3 layer after electroforming, as shown in Figure 3d,e.
observed in biological synapses. Furthermore, both the Some of the defective regions even traverse the entire
switching speed and energy consumption are superior levels multilayer CoPS3 along its out-of-plane direction, providing
among the reported memristors (Figure 2j).5,6,33,41−45 effective pathways for the formation of Ti filaments.50−53 The
Performance benchmarkings (Figure 2k and Table S1) show cyclic switching associated with the migration of Ti can lead to
that the CoPS3 memristors possess advantages of low switching apparent defects and lattice disorders, which provide more
voltage with small variation, fast speed, low energy stable pathways for the formation of conductive filaments.
consumption, and high on/off ratio, which is notable among Based on the aforementioned findings, we propose a
the state-of-the-art nonvolatile memristors based on diverse possible physical model for the evolution of conductive
materials.5−7,30−47 In addition, good endurance is also filaments in the Ti/CoPS3/Au memristor, as depicted in the
achieved with 104 set/reset switching cycles, as exhibited in schematic illustrations presented in Figure 3f. In the initial
Figure S7. state, the single-crystal CoPS3 layer possesses a pristine
Mechanically exfoliated multilayer 2D materials typically crystalline structure with S atoms evenly distributed in
show insignificant resistive switching behavior, even when stoichiometric proportions, and the device is in its HRS.
using active Ti metal as the electrode material. This is primarily During the electroforming process, the application of an
due to the absence of native defects necessary for conductive electric field leads to the creation of S vacancies as some S
filament formation or their extremely low initial resistiv- atoms are displaced from their original positions due to the
ity.3,15,16 However, it is intriguing that mechanically exfoliated thermophoresis effect. Simultaneously, Ti atoms in the top
pristine CoPS3 materials exhibit high switching ratios, making electrode undergo oxidation and transform into Ti cations,
it worthwhile to investigate their underlying mechanism. The which then migrate along the S vacancies driven by the electric
I−V curves of the CoPS3 memristors demonstrate a sharp field. Upon reaching the Au bottom electrode, the Ti cations
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Figure 4. Modeling of ANN for image recognition. (a) Comparison between a biological synapse and the Ti/CoPS3/Au memristor. (b) I−V
curves of the memristor at different conductance states. (c) Pulse scheme for the measurement of long-term plasticity. (d) Long-term
plasticity of LTP and LTD stimulated by pulse train with varying pulse amplitude (from 0.98 to 1.375 V with the step of 5 mV for the LTP,
and from −1.22 to −1.591 V with the step of −4.7 mV for the LTD). (e) Enlarged long-term plasticity of LTP and LTD. (f) Schematic
illustration of the fully connected ANN for digit recognition. (g) Recognition accuracy based on the analog transited conductance states of
the memristor as a function of training epoch. (h) Comparisons of recognition accuracy and applied pulse width between the existing
artificial synaptic devices and the CoPS3 memristor.

undergo reduction and transform into Ti atoms. As a result of and are driven back to the top electrode, resulting in the
the oxidation, migration, and reduction of Ti metal, the rupture of the conductive filament and restoring the device to
conductive filament gradually extends and eventually forms a its HRS.
bridge between the top and bottom electrodes, resulting in the A biological synapse is a junction between a preneuron and a
LRS of the device. Upon switching the polarity of the electric postneuron that facilitates signal transmission through the
field, the Ti atoms at the bottom electrode undergo oxidation release of neurotransmitters, as depicted in the left panel of
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Figure 4a. The strength of synaptic connections can be National Institute of Standards and Technology (MNIST)
adjusted by factors such as stimulus amplitude, timing, and digit database is used to perform the simulation. The
frequency. In our Ti/CoPS3/Au memristor, the resistive NeuroSim+ platform is a hierarchically organized simulator,
switching mechanism relies on the migration of Ti metal, which starts from experimental device data (device level) and
where the conductance of the device increases as Ti atoms extends to synaptic array architectures with neuron periphery
move toward the Au electrode and decreases when the Ti (circuit level) and neural network models (algorithm level).54
atoms return. This behavior closely mimics the information As an integrated simulation framework for benchmarking
transmission seen between biological neurons, thereby synaptic devices and array architectures with respect to the
demonstrating the device’s potential to function as an artificial system-level learning accuracy and hardware performance
synapse. Specifically, the top Ti electrode and the bottom Au metrics, the NeuroSim+ platform has been widely employed
electrode of the device can serve as the presynaptic input and for similar demonstrations in terms of a variety of artificial
postsynaptic output terminals, respectively, while the con- synaptic devices.16,55 The ANN configuration in the NeuroSim
ductance of the CoPS3 channel can represent the synaptic + platform, as illustrated in Figure 4f, utilized a pseudocrossbar
weight (the right panel of Figure 4a). array hardware setup consisting of 400 input neurons
Figure 4b illustrates the I−V characteristics of the Ti/ representing the 20 × 20 pixels of the input MNIST
CoPS3/Au memristor at various conductance states, showing handwritten image, 100 hidden neurons, and 10 output
excellent linearity for accurate linear dot product operations. neurons corresponding to the 10 classes of digits (0 to 9).
The Ti/CoPS3/Au memristor can perform different kinds of The numerical weights in the ANN layer were directly mapped
synaptic functions, including short-term plasticity (Figures S11 onto the measured conductance states of the Ti/CoPS3/Au
and S12), spike-timing-dependent plasticity (Figures S13 and memristor. Figure S17a illustrates the circuit block diagram for
S14), and long-term plasticity. Since long-term plasticity is the implementation of ANN hardware. The weighted sum
essential for the development of ANNs in neuromorphic operation is conducted utilizing the synaptic cores, which is a
computing, we focus on evaluating the device’s long-term computation unit specifically designed for weighted sum and
plasticity, including long-term potentiation (LTP) and long- update. It consists of the synaptic array and array periphery, as
term depression (LTD). Achieving fine modulation of the shown in Figure S17b. The weight update in the simulation is
conductance states is crucial for highly accurate neuromorphic based on our Ti/CoPS3/Au memristor’s properties, including
computing. Here, we demonstrate the ability of the CoPS3 on/off ratio, number of conductance states, cycle-to-cycle
memristor to achieve analog transitions in conductance states variation, and weight update nonlinearity. Using the genetic
by applying different pulse schemes. When applying pulses device simulator, a fair comparison can be conducted between
with amplitudes of 1.10 V for LTP and −1.25 V for LTD, the the simulation results of our CoPS3-based ANN and those
conductance of the memristor exhibits analog tunability based on other materials. The simulation results show that the
(Figure S15a), which is attributed to the gradual formation ANN established on the measured characteristics of the CoPS3
and rupture of the Ti conductive filament under pulse stimuli memristors can achieve a competitive recognition accuracy of
(Figure S16). The increase in conductance with successive 94% (Figure 4g), while using the shortest pulse width for
positive pulses and the decrease with successive negative pulses conductance modulation, as illustrated in Figure
mimic LTP and LTD, respectively, reflecting the strengthening 4h.16,21,46,55−59
and weakening of synaptic connections. Moreover, pulse width CNN is a powerful type of neural network widely applied in
plays a critical role in determining the conductance tunability. tasks, such as image classification, image segmentation, and
Optimized pulse width improves the symmetry, linearity, and object detection. In CNNs, convolution kernels, which consist
number of distinct levels of conductance states, as shown in of small weight matrices, are employed to extract features from
Figure S15b. We further designed a pulse train consisting of 80 the images. These kernels serve various purposes, such as the
consecutive positive pulses, followed by 80 consecutive Prewitt kernel for extracting boundary information, the
negative pulses with varying amplitudes, as depicted in Figure Gaussian kernel for image denoising, and the Gaussian blur
4c. The Ti/CoPS3/Au memristor demonstrates highly stable kernel for simulating motion blur effects. The key computa-
and reproducible conductance changes over 5 consecutive tional task in CNNs is the vector-matrix multiplication
cycles of pulse stimuli (900 pulses), highlighting its reliability (VMM) operation. In recent years, the utilization of
(Figure 4d). More than 64 (equivalent to 6 bits) distinguish- memristive crossbar arrays to operate CNNs has been
able levels of conductance can be realized, providing sufficient demonstrated, offering higher energy efficiency compared
capability for various tasks in machine learning algorithms with graphics processing units. With its capability to achieve
(Figure 4e). The analog modulation of multilevel conductance continuously adjustable nonvolatile conductance states, our
with minimal variation in the device can be attributed to the Ti/CoPS3/Au memristive crossbar array shows significant
precise control of Ti migration within the CoPS3 layer. The potential for implementing various convolutional kernels by
capabilities of the CoPS3-based memristor to emulate various tuning the conductance of individual memristors to desired
functions of biological synapses make it a promising building values. Convolutional kernels used for extracting boundary
block for the development of neuromorphic computing information in images are typically employed in the initial
circuits. Furthermore, the ability to modulate conductance convolutional layer of CNN-based image processing, playing a
using relatively short pulse widths (100 ns) is advantageous for vital role in image comprehension and analysis. Thus, we
fast learning and reasoning tasks. selected the widely used Prewitt kernel, an image edge
To evaluate the performance of the Ti/CoPS 3 /Au detector, to demonstrate the computational capabilities of our
memristor for neuromorphic computing, we conducted Ti/CoPS3/Au memristive crossbar array for image processing
device-level simulations of an ANN for the pattern recognition applications. The Prewitt kernel consists of a 3 × 3 matrix with
task using the measured LTP/LTD characteristics of the two templates: one for horizontal edge detection (Figure S18a)
device. Here, the NeuroSim+ platform with the Modified and another for vertical edge detection (Figure S18b). To
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Figure 5. Image processing performance of the Ti/CoPS3/Au memristive crossbar array. (a) Schematic diagram of VMM operation by a 3 ×
3 submatrix of the memristive crossbar array. (b,c) Pseudo-color maps of the measured current from the same column of the submatrix at its
HRS (b) and LRS (c), respectively, where V1 and V2 increase from 0 to 0.255 V, with V3 maintained at 0.1275 V. (d) Original grayscale input
image. (e,f) Comparisons of horizontal edge detection results (e) and vertical edge detection results (f) based on hardware convolution
kernels and software convolution kernels. (g) Edge detection results in both directions based on the hardware convolution kernels.

create the Prewitt kernel, we utilized a 3 × 3 submatrix of the assistance of software. The pixel values of the input image were
CoPS3 memristive crossbar array. By leveraging the con- uniformly quantized into 21 levels, which were further mapped
ductance difference between the HRS and LRS of each to 21 voltage levels with a voltage resolution of 0.0125 V. To
memristor within the submatrix, we achieved positive and cover all the currents related to the input image, all the
negative weights for the kernel (Figure S18c,d). During the combinations (213) of the input voltages (V1, V2, and V3) are
edge detection process, the intensity of the input image was considered and fed to the memristor kernels twice (once for
initially converted to voltage and simultaneously fed to the the LRS condition and once for the HRS condition). The
rows of the memristor kernel in parallel (Figure 5a). Each pixel output currents were tested column-wise. In this way, a
in the resulting image is generated by the dot product of a 3 × memristor-based current data set including all possible current
3 input subimage and the corresponding 3 × 3 submatrix of the values corresponding to the input image was obtained. After
memristive crossbar array, obtained by summing the currents the samples are arithmetically compared, the final convolution
from each column together. A detailed workflow is provided in current output is obtained and utilized to plot the filtered
Figure S19. images using software. Schematic of hardware calculation and
The converted voltages (V1, V2, and V3) for pixels in each postprocessing based on software for the convolution
row of the 3 × 3 input subimage range from 0 to 0.255 V, operation is provided in Figure S20.
which falls within a safe voltage range for maintaining the Figure 5b,c presents the pseudo-color maps of the measured
current conductance values of the memristor-based kernels. current from the same column in the memristive crossbar
We built a current data set containing all the currents related to array-based kernel when all three devices in the column are at
the input image and showed the filtered images with the HRS (Figure 5b) and LRS (Figure 5c). During the
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Figure 6. Large-scale solution-processed CoPS3 memristors. (a) Photograph of exfoliated CoPS3 nanoflakes dispersed in isopropanol (ink
solution). (b) AFM image of exfoliated CoPS3 nanoflakes dispersed on the Si/SiO2 substrate. (c) Height profile of an individual CoPS3
nanoflake. (d) Raman spectra of the exfoliated CoPS3 nanoflake and bulk crystal for comparison. (e) Photograph of a bare Si/SiO2 substrate
and the deposited CoPS3 film on a Si/SiO2 substrate with Ti/Au bottom electrodes. (f) Cyclic I−V characteristics of the solution-processed
CoPS3 memristor. (g) Statistical distribution of Vset and Vreset in (f). (h,i) Statistical distribution of Vset and Vreset (h) and resistance
cumulative probability (i) extracted from 76 CoPS3 memristors.

measurement, V1 and V2 increase from 0 to 0.255 V, with V3 energy efficiency of the CoPS3 memristor crossbar array is
maintained at 0.1275 V. A clear monotonic increase in current estimated to be around 69 TOPS W−1 (tera operations per
can be observed with respect to the input voltages (V1 and V2). second per watt), indicating its promise for energy-efficient
This indicates that the VMM can be successfully performed neuromorphic computing hardware (Table S2).
using our memristive crossbar array. Figure 5d shows the The solution process offers advantages such as reduced
original grayscale input image. Figure 5e,f compares the results production costs and lower fabrication temperatures of
of horizontal and vertical edge detection, respectively, using memristors, enabling their integration on arbitrary, flexible,
both hardware-based and software-constructed Prewitt kernels. and transparent substrates. Typically, solution-processed 2D
It is evident that the hardware-constructed Prewitt kernels memristor fabrication begins with liquid-phase exfoliation to
successfully extract fine edge features, yielding results produce a 2D nanoflake ink solution. This method produces
comparable to those obtained using software-constructed large-area 2D thin films with extensive plane-to-plane contacts
kernels. By combining the horizontal and vertical edges between 2D nanoflakes, closely resembling natural van der
obtained from the hardware-constructed Prewitt kernels Waals interfaces between atomic layers. Thus, 2D CoPS3
(Figure S21), accurate extraction of edges in both directions single-crystal nanoflakes with exceptional resistive switching
can be achieved, as shown in Figure 5g. This successful edge properties are ideal for constructing solution-processable
detection using the Ti/CoPS3/Au memristive crossbar array memristors. Here, we used liquid-phase exfoliation, followed
demonstrated its potential for image processing tasks. The by a spin-coating process to fabricate large-scale CoPS3
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memristors. Detailed fabrication processes are provided in the METHODS

Methods section. Figure 6a shows a photograph of the CoPS3 Device Fabrication Utilizing Mechanically Exfoliated CoPS3
ink solution. The atomic force microscopy (AFM) image Nanoflake. The CoPS3 single-crystal nanoflakes were obtained by
indicates that the exfoliated CoPS3 nanoflakes have a thickness mechanically exfoliating commercial bulk crystals (HQ graphene).
of approximately 2.15 nm and lateral dimensions exceeding 10 Nanoflakes with appropriate thickness were carefully selected for
μm (Figure 6b,c). The Raman spectra of the exfoliated memristors based on optical contrast observed under an optical
microscope. The CoPS3 memristor crossbar array was fabricated on a
nanoflakes exhibit peaks identical to those of bulk crystals,
Si wafer capped with a 285 nm-thick SiO2 layer. E-beam lithography
confirming the successful exfoliation of high-quality CoPS3, as (EBL, Raith EBPG5200) was utilized to pattern the CoPS 3
illustrated in Figure 6d. Using the obtained CoPS3 ink, large- memristive crossbar array with poly(methyl methacrylate) as the
area thin films on various substrates at low temperatures can be resist. Electrodes were deposited using an electron-beam metal
achieved. For instance, we deposited a continuous CoPS3 film evaporator (AJA system). First, the Si/SiO2 substrates were
on a 2 cm × 2 cm SiO2/Si substrate with Au bottom electrodes ultrasonically cleaned in acetone, 2-propanol, and deionized water
(Figure 6e). AFM exhibits the well-controlled assembly of sequentially. Then, a 5 nm-thick Ti adhesion layer and a 20 nm-thick
CoPS3 nanoflakes on the surface of the substrate (Figure S22). Au bottom electrode were deposited on the Si/SiO2 substrates.
Figure S23 shows the optical and AFM topography images of Following this, the CoPS3 nanoflakes were transferred onto the
bottom electrodes using an accurate transfer platform. Finally, a 20
the solution-processed CoPS3 memristive crossbar array. It is nm-thick Ti top electrode was deposited on the CoPS3 flakes followed
worth noting that both the mechanical- and liquid-phase by depositing a 30 nm Au protection layer.
exfoliated CoPS3 nanoflakes were produced from the same Preparation of CoPS3 Ink Solution and Devices. The CoPS3
bulk crystal. Due to the limited size of the bulk crystal, the single crystal was first intercalated with a tetraethylammonium
concentration of the CoPS3 ink and the spin-coating process bromide (Sigma-Aldrich) solution in acetonitrile. The expanded
were not yet optimized to achieve a highly uniform film. Future CoPS3 crystal was then ultrasonicated in a polyvinylpyrrolidone/
optimization of the CoPS3 ink and spin-coating parameters is dimethylformamide solution to produce a greenish dispersion.
expected to produce perfectly uniform films. Subsequently, the dispersion was centrifuged and washed with
isopropanol. To remove large chunks, the CoPS3 dispersion was
Figure 6f shows the I−V characteristics of the solution- finally centrifuged at 1000 rpm for 5 min, and the supernatant was
processed CoPS3 memristor, which exhibits reliable nonvolatile collected as the ink solution. The CoPS3 ink solution was spin-coated
bipolar behavior comparable to that of the mechanically onto a Si/SiO2 substrate with Ti/Au (5 nm/20 nm) bottom
exfoliated CoPS3 memristor. The working mechanisms of the electrodes. Then, Ti/Au top electrodes (20 nm/30 nm) were
device are illustrated in Figures S24 and S25. The switching patterned and deposited to obtain the CoPS3 memristors. Finally, the
voltages are low, with Vset and Vreset of 1.06 V and −0.82 V CoPS3 film without electrodes was etched away by an SF6-based
(Figure 6g), respectively. The I−V characteristics (Figure S26) reactive ion etching technique.
from 76 individual memristors in a 10 × 10 array demonstrate Characterizations and Measurements. The morphology was
observed by SEM (Hitachi Regulus 8100). The microstructure was
consistent low switching voltages (1.07 V for Vset and −0.91 V analyzed by using TEM (Talos F200X), and the TEM samples were
for Vreset) and high switching ratios, exceeding 508 for the prepared utilizing a focused ion beam (FIB, FEI Helios NanoLab).
majority of devices, as shown in Figure 6h,i. These results The chemical structure was investigated by using a confocal Raman
underscore the potential of the CoPS3 memristor for large- microscope with a 532 nm excitation laser (Renishaw, inVia). The
scale integration. thickness profile and current maps were recorded by AFM (Park
NX20). The current−voltage characteristics and the retention
measurements were conducted on a Keysight B1500A parameter
CONCLUSIONS analyzer at room temperature in ambient conditions, and a Waveform
In conclusion, Ti/CoPS3/Au memristors exhibit reliable Generator Fast Measurement Unit (WGFMU) was utilized to
bipolar resistive switching, characterized by fast speed, low perform pulse measurements.
energy consumption, minimal switching voltage variation, a
high switching ratio, and good endurance. This resistive ASSOCIATED CONTENT
switching behavior is attributed to the formation and rupture *
sı Supporting Information

of metal conductive filaments facilitated by S vacancies created The Supporting Information is available free of charge at
under an electric field. Utilizing the analog conductance https://pubs.acs.org/doi/10.1021/acsnano.4c11890.
modulation and long-term retention capabilities of the CoPS3 Optical image of a memristive crossbar array based on a
memristor, high-accuracy handwritten digit recognition within mechanically exfoliated CoPS3 nanoflake; cross-sectional
an ANN is achieved. Additionally, the exceptional performance EDX mapping of a CoPS3 nanoflake, exhibiting its highly
of the Ti/CoPS3/Au memristor crossbar array in VMM homogeneous composition; electroforming of a Ti/
operations renders it an effective CNN kernel for image CoPS3/Au memristor with a CoPS3 layer thickness of 12
processing. The layered CoPS3 single-crystal materials enable nm; I−V characteristics of Ti/CoPS3/Au memristors
resistive switching without the need for complex fabrication or with different CoPS3 thicknesses; another 4 memristors
defect engineering treatments required by other 2D materials, from the Ti/CoPS3/Au memristive crossbar array
which greatly simplifies the memristor fabrication process and exhibit multilevel conductance; retention property
reduces costs. Furthermore, scalable CoPS3 memristors (read voltage: 0.1 V) of the Ti/CoPS3/Au memristor
produced using a solution process demonstrate robust bipolar at its HRS and LRS for 104 s; endurance of 5 CoPS3
resistive behavior with superior metrics compared with various memristors in the AC mode showing over 10 4
other memristors. With a low processing temperature, thin-film programming cycles; I−V curve of an Au/CoPS3/Au
CoPS3 can be prepared on flexible substrates, making it device; performance of an Ag/CoPS3/Au memristor;
suitable for flexible and wearable electronics. This work composition distribution of a CoPS3 nanoflake in its
manifests the potential of CoPS3 for the development of initial state; postsynaptic currents generated by paired
energy-efficient neural network hardware. presynaptic pulses; dependence of PPF and PPD indexes
732 https://doi.org/10.1021/acsnano.4c11890
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ACS Nano www.acsnano.org Article

Author Contributions
on pulse interval Δt; STDP realization schemes by K.-W.A. supervised the project. Y.J. and K.-W.A. conceived the
overlapping pulse sequences; STDP index as a function idea and designed the experiments. Y.J. fabricated the devices,
of pulse interval Δt; long-term plasticity of LTP and performed the electrical measurements, and wrote the
LTD stimulated by pulse trains consisting of identical manuscript. B.T. prepared the solution-processed CoPS3
pulses; physical model for the analog tunability of films. J.W., H.Z., Z.W., Y.W., S.L., and A.V.-Y.T. contributed
conductance; circuit block diagrams for neuromorphic to manuscript editing, review, and discussions. All authors
computing; kernel design based on the Ti/CoPS3/Au reviewed and approved the final version of the manuscript.
memristive crossbar array for image edge detection; data
flow in the CNN which combined with the Ti/CoPS3/ Notes
Au memristive crossbar array hardware and software for The authors declare no competing financial interest.
image processing; schematic of hardware calculation and
postprocessing based on software for the convolution ACKNOWLEDGMENTS
operation; schematic illustration for edge combination; This work was supported by the National Research
AFM of solution-processed CoPS3 film; optical and Foundation, Singapore (NRF-CRP24-2020-0002).
AFM topography images of the solution-processed
CoPS3 memristive crossbar array; working mechanisms
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