model DFCA ques
model DFCA ques
1. An ———————— gate has two or more input signals but (c) Program Status Word
only output signal.
(d) Vector Address
(a) NAND (b) AND
(c) OR (d) NOR 8. When the IOP terminates the execution of its program, it sends an
2. A full-adder is a combinational circuit that forms the arithmetic ———————— request to the CPU.
sum of ————————input bits.
a. Information (b) Active
(a) Three (b) Six
(c) Two (d) Four (c) Interval (d) Interrupt
3. A ———————— map is a visual display of the fundamental 9. Devices that provide backup storage are called
products needed for a sum-of- products solution. ——————— memory.
(a) Associative (b) Direct
a. Main (b) Auxiliary
(c) Karnaugh (d) None of the above
(c) Cache (d) Virtual
4. A flip-flop is a binary cell capable of storing ——— bit of
information.
10. The part of the computer system that supervises the flow of
(a) One (b) Two
information between auxiliary memory and main memory is called
(c) Four (d) Eight the ———————— system.
Or 18. (a) Explain about I/O bus and Interface modules with suitable
(b) Write a note on Half Adder with suitable diagram. illustration.
14. (a) Summarize about Priority Interrupt. 20. (a) Give a detailed note on Memory Hierarchy.
Or Or
(b) Make a note on Direct Memory Access (DMA) (b) Compare and contrast, Associative Mapping with Direct
Mapping.
15. (a) Briefly discuss about the importance of Main Memory.
——–––––––––
Or
(b) What do you mean by cache memory? Explain.
SECTION C — (5 x 8 = 40 marks)
16. (a) Convert the hexadecimal number F3A7C2 to binary and octal.
Or
(b) Discuss about NAND and XOR gates with its truth table.