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Physics Lab 11 - Logic Gates - Half Adder and Full Adder

The document outlines a lab experiment conducted by Moses Peters to verify the functionality of Half Adder and Full Adder gates using a logic gate simulation program. It includes definitions, truth tables, and discussions on the conditions for outputs, as well as the applications of these adders in digital electronics. The experiment successfully verified the truth tables for both types of adders.

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2 views

Physics Lab 11 - Logic Gates - Half Adder and Full Adder

The document outlines a lab experiment conducted by Moses Peters to verify the functionality of Half Adder and Full Adder gates using a logic gate simulation program. It includes definitions, truth tables, and discussions on the conditions for outputs, as well as the applications of these adders in digital electronics. The experiment successfully verified the truth tables for both types of adders.

Uploaded by

archive108rm
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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Name: Moses Peters

Class: 6.2 Science


Lab No.: 11
Date: Friday, March 14, 2025
Title:
Logic Gates 2- Half Adder and Full Adder

Aim:
To verify the Half Adder and Full Adder gates using the logic gate simulation
program

Theory:
Questions to be Answered:
Define Half Adder and Full Adder (1 line each)

Actual Theory:
A half adder is a circuit that adds two single-bit binary numbers and outputs
the sum and carry. A full adder is a circuit that adds three single-bit binary
numbers (including a carry from a previous addition) and outputs the sum
and carry.

Variables:
Manipulating:
input

Responding:
Output

Controlled
Values of High and Low

Diagram:
Drawing of screenshot of the verified truth gates

Half Adder
Full Adder

Method:
1. Using the program ‘multisim.com’, the inputs for the AND gate were
varied to verify its truth table using OFF as 0 and ON as 1.

2. The output for each variation of the truth table was recorded and
tabulated.

3. The truth table for the full adder was also verified.

Results:

1. HALF ADDER

Screenshot of simulation

Table 1- showing truth table for Half Adder


Input Output

A B Sum Carry
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1

2. FULL ADDER

Table 2 – showing truth table for Full Adder

Input Output
A B Cin Sum (S) Cout
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1

Discussion:
Questions To Be Answered:
Digital electronics operate using logic

Logic gates- building blocks

What can half adder and full adder be used for

3 sentences each on Half Adder and Full Adder truth table

Speak about adding Binary including Sum and Carry

Half Adder- Talk about conditions for output to be 1

Full Adder- Talk about conditions for output to be 1


Actual Discussion:
Digital electronics operate using logic gates, which are the building blocks for
all digital circuits.

**Uses of Half Adder and Full Adder:**

- Half adders are used in simple addition operations where only two binary
digits are involved.

- Full adders are used in more complex operations, such as adding multi-bit
binary numbers in arithmetic circuits.

- Both half adders and full adders are integral components in digital
electronics, forming the basis for arithmetic logic units (ALUs).

**Half Adder Truth Table:**

- The truth table for a half adder shows the outputs for sum and carry for all
possible input combinations.

- When both inputs are 0, the sum is 0 and the carry is 0; when one input is
1, the sum is 1 and the carry is 0; when both inputs are 1, the sum is 0 and
the carry is 1.

**Full Adder Truth Table:**

- The truth table for a full adder shows the outputs for sum and carry for all
possible combinations of three inputs, including a carry-in from a previous
addition.

- The full adder truth table is more complex than the half adder, as it must
account for all combinations of three binary inputs.

**Adding Binary Including Sum and Carry:**

- Adding binary numbers involves summing two binary digits and calculating
the carry if the sum exceeds the binary value of 1.

- The carry is then added to the next higher bit position in multi-bit binary
addition.
**Half Adder Conditions for Output to Be 1:**

- The sum output of a half adder is 1 when either, but not both, of the inputs
is 1.

- The carry output of a half adder is 1 only when both inputs are 1.

**Full Adder Conditions for Output to Be 1:**

- The sum output of a full adder is 1 when an odd number of inputs are 1
(i.e., one or all three inputs are 1).

- The carry output of a full adder is 1 when at least two of the three inputs
are 1.

Conclusion:
The truth tables for the Full Adder and Half Adder were verified.

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