1068 IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. 48, NO.

6, DECEMBER 1999

Substrate Noise Measurement by Using

Noise-Selective Voltage Comparators in Analog
and Digital Mixed-Signal Integrated Circuits
Keiko Makie-Fukuda, Takanobu Anbo, and Toshiro Tsukada, Member, IEEE

Abstract—In mixed-signal integrated circuits (IC’s), substrate It also has a simple circuit configuration, so we previously
noise produced by high-speed digital circuits passes to the on- applied it for measuring the substrate noise [3].
chip analog circuits through the substrate and seriously degrades In this work, we have developed modified chopper-type
their performance. We have developed a method for measuring
the substrate noise by using noise-selective chopper-type voltage voltage comparators to selectively detect the substrate noise.
comparators as noise detectors. This method can detect the wide- The circuit configuration of noise-selective chopper-type volt-
band substrate noise so we can analyze and further reduce age comparators is described in Section II. The noise-selective
its effect. A switched capacitance is selectively loaded on the circuits composed of the arrayed noise-selective comparators
output of the inverter amplifier of the comparator during the and the measurement system are introduced in Section III. The
comparison period in order to reduce the noise detected at the
transition from compare to auto-zero. In contrast, the noise at the experimental results are described in Section IV.
transition from auto-zero to compare can be selectively detected.
Waveforms of high-frequency substrate noise were reconstructed
by using this on-chip noise detector incorporating the noise-
selective comparators implemented using a 0.5-m CMOS bulk II. NOISE-SELECTIVE COMPARATOR
process.
A typical single-ended chopper-type voltage comparator is
Index Terms—Analog circuits, CMOS integrated circuits, com- shown in Fig. 1(a). V1 and V2 are the input voltages during
parators, digital switching, mixed-signal integrated circuits, sub- the auto-zero ( 1 ON) and compared modes, respectively. The
strate coupling noise.
difference between V1 and V2 is amplified by a three-stage
inverter amplifier and held by a latch circuit. When there is
I. INTRODUCTION no substrate noise, the output level changes around V1( V2).
The boundary of the output level changes with substrate noise.
S ENSITIVE analog circuits are often designed to share
a chip with large-scale digital circuits for multimedia
applications. In these mixed-signal integrated circuits (IC’s),
The substrate noise can thus be measured by detecting the
change of the boundary. In the comparator, the substrate noise
substrate noise produced by high-speed digital circuits passes is detected at the transition from the auto-zero to compare
through a low-resistive substrate to the on-chip analog circuits mode T1 and at the transition from the compare to auto-zero
and seriously affects the analog circuits’ performance [1]. mode T2 [3], [5] [Fig. 1(c)]. The substrate noise detected at
Various ways of measuring, reducing, and estimating substrate T1 and that detected at T2 are mixed and detected during one
noise have been proposed [1]–[3]. Of particular concern is the cycle of the comparator operation. In our previous work, the
switching noise produced by digital circuits. This noise has substrate noise could be detected at only one transition (T1
high-frequency components of over 100 MHz that degrade or T2) by controlling the clock duty ratio for the comparator
the performance of high-speed switching circuits such as and the substrate noise waveforms were reconstructed by using
analog-to-digital converters (ADC’s). Improved detection of statistical measurement [3]. However, in actual mixed-signal
the wide-band substrate noise is therefore needed so as to IC’s, the noise produced by various digital circuits that use
analyze and further reduce its effect. different timing is coupled to the substrate. So a method to
A single NMOS transistor amplifier [2] has a simple config- detect the substrate noise without controlling the clock duty is
uration and that detects the substrate noise from the back gate. needed. We have developed such a method by using modified
However, the measured noise value included the effect of the chopper-type comparators.
external parasitic impedance of the experimental set up and A noise-selective chopper-type voltage comparator is shown
the bandwidth is not enough for detecting wide-band substrate in Fig. 1(b). A switched capacitance is selectively loaded
noise. A chopper-type voltage comparator [4], which is widely on the output of the first-stage inverter amplifier ( ) of
used for ADC’s, has a wide bandwidth and high sensitivity. the comparator. The gain of the first-stage inverter amplifier
is large, so the substrate noise is mainly detected from
Manuscript received February 17, 1998; revised August 17, 1999. the back gate of its NMOS transistor (Tr1) [5]. When is
The authors are with the System LSI Business Division, Semiconductor and loaded during the comparison period (the auto-zero period), the
Integrated Circuits, Hitachi, Ltd., Kokubunji, Tokyo 185-8601, Japan (e-mail:
[email protected]). noise at T2 is reduced and the noise at T1 can be selectively
Publisher Item Identifier S 0018-9456(99)09176-7. detected (or vice versa).
0018–9456/99$10.00  1999 IEEE

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MAKIE-FUKUDA et al.: SUBSTRATE NOISE MEASUREMENT 1069

(a)

Fig. 2. Equivalent circuit of the front part of the noise-selective voltage

(b)
comparator.

at T1 ( ) to that at T2 ( ) is expressed as

(3)

The noise during the comparison period is further reduced and

(c) the ratio of to becomes much larger. The noise at
Fig. 1. Substrate-noise detection with a chopper-type voltage comparator: T1 can thus be selectively detected.
circuit configuration of (a) typical comparator and (b) proposed noise-selective The substrate noise transfer function also depends on the
comparator, and (c) timing chart.
resistance value of the switch . By adding , the
noise transfer function in (2) is approximately expressed as
We analyzed the effect of selective noise detection by using
the equivalent circuit model of the first-stage inverter amplifier (4)
as shown in Fig. 2. The detected voltage at T1 ( (T1)) and T2
that at T2 ( (T2)) are transferred to . The transfer With the increase of and the decrease of , the bandwidth
function, defined as the ratio of to , is expressed as of T2 detection is narrowed.
We used a SPICE circuit simulation to examine the oper-
ation of the noise-selective comparator. The simulated trans-
T1 ferred substrate noise dependence on the frequency is shown
in Fig. 3. The substrate noise was input into the substrate bias
node of Tr1 and the transferred substrate noise was observed
at . The noise detected at T2 with capacitive load was
30 dB lower than that detected at T1 over 200 MHz. Thus
the noise at T2 is sufficiently suppressed to detect the noise
at T1 selectively.
(1)

III. MEASUREMENT SYSTEM

We measured the substrate noise with a noise-detection
T2 circuit as shown in Fig. 4. It is composed of eight noise-
selective comparators described in Section II. This circuit was
implemented using a 0.5- m CMOS bulk-process. Substrate
(2) noise was input into the substrate through a heavily doped
p-type diffusion guard band on a p-type substrate. The guard
where is the dc gain of the inverter amplifier and bands were connected to the comparators thorough substrate
is the dc gain of the body effect. Usually, is resistance.
much larger than , so the bandwidth of the auto-zero A block diagram of the measuring system is shown in Fig. 5.
period is much wider than that of the comparison period. Thus, The comparator clocks, substrate noise, and logic analyzer
T1 is preferable for noise detection. Furthermore, when is reference signal were controlled by the 10-MHz reference
selectively loaded during the comparison period and unloaded signal of the synthesized signal generator. Clocks and
during the auto-zero period, the ratio of the cutoff frequency for controlling the comparators and the loading for

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1070 IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. 48, NO. 6, DECEMBER 1999

Fig. 5. Block diagram of the measuring system.

the equivalent input noise voltage of the comparator at the

transition of the comparator’s output. By shifting the phase of
Fig. 3. Transferred substrate noise dependence on frequency.
the comparator or by changing its pulse width by a very small
amount (0.1–1 ns), the substrate noise waveforms could be
equivalently reconstructed. We measured the substrate noise
with either all eight channel comparators or with just one of
them. When using the one-channel comparator, we applied
statistical measurement [3] to detect the transition point of
the comparator output for achieving high accuracy. Further
measurement conditions on each measurement are described
in the following section.

IV. RESULTS
First, the effectiveness of the noise-selective comparator
was evaluated by using a rectangular substrate-noise input
[Fig. 6(a)]. A 900-mV rectangular wave with a rising and
falling edge of 3 ns and a pulse width 10 ns was input into
the substrate. The comparator’s clock was delayed by in
order to equivalently sample the substrate noise waveforms.
The pulse width of the input noise is controlled 1/10 of the
comparator’s pulse width, so the substrate noise detected at
T1 and that at T2 were separately measured as illustrated
in the estimated detected noise. The statistical measurement
method based on the one-channel comparator [3] was used
for high resolution. The measured substrate noise is shown in
Fig. 6(b). Without applying , substrate noise was detected at
both T1 and at T2. When was loaded during the comparison
period, the noise detected at T2 was suppressed and the noise
Fig. 4. Configuration of noise detecting circuits. was only detected at T1. The measured substrate noise showed
high-frequency resonance. Resonance is produced by substrate
impedance or parasitic impedance coupled with input noise,
noise-selective detection were supplied by the programmable with a steep transition and high-frequency components.
pulse generator. A reference voltage V2 of 1 V and input Next, the effectiveness of the noise-selective comparator
voltages V11–V18 of 0.97–1.04 V with 10-mV steps were was evaluated by controlling the comparator pulse width
supplied to the comparators from the voltage source. The [Fig. 7(a)]. A 180-MHz 700-mV sinusoidal wave was input
comparator outputs were detected by the logic analyzer. The into the substrate. When the frequency of the substrate noise
comparators output digital high-level signals when the input was an even multiple of the comparator clock frequency, the
voltage V1 was higher than the reference voltage V2 (V1 comparator detected the same phases of the substrate noise
> V2). When the noise was applied to the substrate, the at T1 and at T2. When the pulse width of the comparison
input voltage needed to change the output from low to high period was changed by a very small , the sampling point
was shifted. The substrate noise can thus be determined as of T2 varied with , while the sampling point of T1 was

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MAKIE-FUKUDA et al.: SUBSTRATE NOISE MEASUREMENT 1071

(a)
(a)

(b)
Fig. 6. Evaluation of the noise-selective voltage comparator with pulse-delay
control: (a) measurement conditions and (b) results.
(b)
not changed. The noise waveform can thus be reconstructed
Fig. 7. Evaluation of the noise-selective voltage comparator with
through T2 detection while the noise detected at T1 is used pulse-width control: (a) measurement conditions and (b) results.
as an offset value. Similarly, when the pulse width of the
auto-zero period is changed, the noise waveform can be
reconstructed by detecting noise at T1. The measured substrate
noise is shown in Fig. 7(b). When was not applied,
substrate noise of 70 mV was detected through T1 and 20
mV was detected through T2. The bandwidth during the auto-
zero period was wider than that during the comparison period,
(a)
so the amplitude of the noise detected at T1 was greater than
that at T2. When is loaded during the comparison period,
the noise detected at T2 was further suppressed.
These results demonstrate the effectiveness of loading
during the comparison period to suppress the noise detected
at T2 and to selectively detect the noise at T1.
We measured the sinusoidal substrate noise by using the
eight arrayed noise-selective comparators. The pulse width
of the comparator clock was delayed by to equivalently
sample the substrate noise waveforms. The measured results
are shown in Fig. 8(b). When was not applied, the substrate (b)
noise detected at T1 [black circles in Fig. 8(a)] and that at T2
Fig. 8. Measured substrate noise: (a) measurement conditions and (b) results.
[hatched circles in Fig. 8(a)] were added, so the amplitude Squares indicate that Cc was applied during the comparison mode (T1
was degraded. On the other hand, when we applied during selective), and circles indicate that Cc was not applied.
the comparison period, the substrate noise detected at T2 was
suppressed and larger amplitude substrate noise waveforms
were reconstructed. And this comparator is effective for measuring noise with high-
These measured results show that the noise-selective com- time resolution. Using more channels for the noise-selective
parator is useful for detecting the high-frequency substrate comparators, though, would allow the substrate noise to be
noise caused by digital circuits activated with various timings. measured more accurately.

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1072 IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. 48, NO. 6, DECEMBER 1999

V. CONCLUSIONS Keiko Makie-Fukuda received the B.E., M.E., and

D.Eng. degrees in electrical and electronic engineer-
We have developed noise-selective chopper-type voltage ing from Sophia University, Tokyo, Japan in 1986,
comparators to measure high-speed digital noise coupling 1988, and 1998, respectively.
through a substrate. A switched capacitance is loaded on She joined Hitachi Ltd., Tokyo, in 1988 and has
been involved in research in biomagnetic fields and
the output of the first-stage inverter of the comparator. This substrate coupling noise in analog and digital mixed-
loading suppresses the noise detected during the compari- signal IC’s.
son period and selectively detects the substrate noise at the Dr. Makie-Fukuda is a member of the Institute
of Electronics, Information, and Communication
transition from the auto-zero to the compare mode. Substrate Engineers of Japan and the Japan Society of Medical
noise waveforms were reconstructed by a 3-bit noise-detection Electronics and Biological Engineering.
circuit composed of the eight noise-selective comparators. This
method can detect the high-speed substrate noise produced
by digital circuits switching with various timings. It is also Takanobu Anbo received the B.E. degree in elec-
effective for use in digital signal processing, for example, for tronic engineering from Chubu University, Aichi,
substrate noise correction. Japan, in 1990.
In 1990, he joined Hitachi ULSI Engineering
Corporation (now Hitachi ULSI Systems Co., Ltd.),
REFERENCES Tokyo, Japan, where he has been engaged in the
design and development of analog-to-digital con-
[1] J. A. Olmstead and S. Vulih, “Noise problems in mixed analog-digital verters.
integrated circuits,” in Proc. IEEE CICC, 1987, pp. 659–662.
[2] D. K. Su, M. J. Loinaz, S. Masui, and B. A. Wooley, “Experimental
results and modeling techniques for substrate noise in mixed-signal
integrated circuits,” IEEE J. Solid-State Circuits, vol. 28, pp. 420–430,
Toshiro Tsukada (M’86) received the B.E., M.E.,
Apr. 1993.
and D.Eng. degrees in electrical engineering from
[3] K. Makie-Fukuda, T. Anbo, T. Tsukada, T. Matsuura, and M. Hotta, the University of Tokyo, Japan, in 1971, 1973, and
“Voltage-comparator-based measurement of equivalently sampled sub- 1995, respectively.
strate noise waveform in mixed-signal integrated circuits,” IEEE J. He joined the Central Research Laboratory, Hi-
Solid-State Circuits, vol. 31, pp. 726–731, May 1996. tachi Ltd., Tokyo, in 1973. Since then, he has
[4] A. G. F. Dingwall, “Monolithic expandable 6 bit 20 MHz CMOS/SOS been engaged in the research and development of
A/D converter,” IEEE J. Solid-State Circuits, vol. 14, pp. 926–932, Dec. integrated circuits. From 1980 to 1981, he was
1979. a Research Associate at the Electronics Research
[5] K. Makie-Fukuda, T. Anbo, and T. Tsukada, “Measurement of substrate Laboratory, University of California, Berkeley. He
noise in CMOS integrated circuits by using chopper-type voltage was involved in designing communication circuits at
comparators,” Electron. Commun. Jpn., vol. 81, pt. 2, pp. 59–66, May the Telecommunications Division of Hitachi, Yokohama, from 1988 to 1993.
1998. He is currently working on analog and mixed-signal integrated circuits design
at CMOS Analog Development Department, System LSI Business Division,
Hitachi, Ltd.
Dr. Tsukada is a member of the Institute of Electronics, Information, and
Communication Engineers of Japan.

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