UNIVERSITY OF COMPUTER STUDIES(MAGWAY)

CST-3131 (Computer Architecture & Organization)

Presentation on

Machine Instruction Characteristics

Supervised By

Daw Nu Nu Hlaing
 GROUP MEMBERS

Mg Naw Too Aung UCSMG-22206

Mg Kyaw San Hlaing UCSMG-18203
Ma La Yaung Shoon Lai UCSMG-19179
Ma Aye Aye Thant UCSMG-22207
Mg Kyaw Min Naing UCSMG-19054
Mg Thar Nyi UCSMG-22201
Machine Instruction Characteristics(cont’d)

Machine instructions are the fundamental commands that a computer's processor can understand and
execute. These instructions are written in binary code, which is directly interpreted by the hardware.
Machine instructions serve as the lowest-level language that bridges the gap between high-level
programming languages and the physical hardware. Understanding the characteristics of machine
instructions is crucial in computer architecture and systems programming, as it provides insight into how
processors execute tasks efficiently.
Machine Instruction Characteristics
▪ Performance – Measured by speed (clock cycles, FLOPS, MIPS).

❖ Instruction Set Architecture (ISA) – Defines instructions and data formats.

❖ Memory Organization – Hierarchical structure (Registers, Cache, RAM, ROM, Secondary Storage).

❖ Processing Mode – Sequential, pipelined, parallel, and multi-core processing.

❖ Bus Architecture – Communication system (Data, Address, Control Bus).

❖ I/O System – Manages CPU-peripheral communication.

❖ Power Efficiency – Optimizes power usage, especially for mobile/embedded systems.

❖ Scalability – Ability to handle increased workloads with added resources.

❖ Reliability & Fault Tolerance – Ensures stable, error-free operation.

❖ Security Features – Includes encryption, access control, and secure boot.

Elements of a Machine Instrucrion(cont’d)

▪ Processor (CPU) – Executes instructions.

❖ Control Unit (CU) – Directs operations.

❖ ALU – Performs calculations and logic.

❖ Registers – Fast data storage.

▪ Memory Unit – Stores data and instructions.

❖ Primary Memory – Temporary (RAM) and permanent (ROM) storage.

❖ Cache Memory – High-speed storage for frequent data.

▪ Input Devices – Provide data input (e.g., keyboard, mouse).

▪ Output Devices – Display results (e.g., monitor, printer).

Elements of a Machine Instruction(cont’d)
▪ Bus System – Pathway for communication.

❖ Data Bus – Transfers data.

❖ Address Bus – Transfers memory addresses.

❖ Control Bus – Sends control signals.

▪ I/O Unit – Manages communication with peripherals.

▪ Secondary Storage – Long-term storage (e.g., HDD, SSD).

▪ System Clock – Synchronizes operations.

Elements Of A Machine Instruction (Cont’d)

Fig: Instruction Cycle State Diagram

Instruction Representation
An instruction consists of opcode and operand references.

Example format (16 bits total):

• 4 bits: Opcode
• 6 bits: Operand reference 1
• 6 bits: Operand reference 2

Machine instructions are often represented symbolically for easier understanding.

Opcodes (mnemonics):
• ADD — Add
• SUB — Subtract
• MUL — Multiply
• DIV — Divide
• LOAD — Load data from memory
• STOR — Store data to memory

Operands can also be represented symbolically.

Instruction Types

Instruction types typically refer to categories or classifications of instructions that a

processor or a computing system can understand and execute. In computer architecture and
programming, instruction types are often divided into the following categories:

❖ Arithmetic Instructions: These perform mathematical operations on data. Examples

include addition, subtraction, multiplication, and division (e.g., ADD, SUB, MUL).

❖ Logical Instructions: These perform logical operations, such as AND, OR, XOR, and
NOT. Examples include AND, OR, XOR.

❖ Data Transfer Instructions: These move data between registers, memory, and I/O devices.
Examples include MOV, PUSH, POP, LOAD, STORE. 4. Control Flow Instructions:
These alter the flow of execution based on conditions or unconditionally. Examples
include JUMP, CALL, RET, BRANCH, and conditional jumps like JZ (jump if zero).
Instruction Types (cont’d)

❖ Comparison Instructions: These compare two values and set flags based on the result (e.g., CMP, TEST).

❖ Input/Output Instructions: These are used to interact with external devices (e.g., IN, OUT, READ,
WRITE).

❖ Shift and Rotate Instructions:These manipulate data by shifting or rotating bits in a register. Examples
include SHL (shift left), SHR (shift right), ROL (rotate left), and ROR (rotate right).

❖ System Control Instructions: These manage the system's operation, such as halting execution, switching
modes, or handling exceptions. Examples include HALT, NOP (no operation), and INT (interrupt).

❖ Floating Point Instructions: These perform operations on floating-point numbers.Examples include

FADD,FSUB, FMUL,FDIV. These types vary depending on the processor architecture (e.g.,x86, ARM,
MIPS), and specific instructions within each type will differ between systems.
Number of addresses
One way to classify processor architecture is by the number of addresses an instruction contains.
While modern processor designs are complex, this classification helps understand basic instruction
structures.
Maximum Number of Addresses in an Instruction
In arithmetic and logic operations, instructions generally require operands. Most operations are:

Unary (1 operand)
Binary (2 operands)
For an instruction to execute properly, it may need:

 Two addresses for source operands

 One address for the destination operand (where the result is stored)
 One address for the next instruction (implicitly handled by the program counter)
Thus, a maximum of four addresses might be required in theory. However, most architectures use one,
two, or three addresses because the next instruction's address is automatically managed by the program
counter.
Types of Addressing in Instructions

1.Three-Address Instructions
 Two source operands
 One destination operand
Example: ADD R1, R2, R3,this means R1 = R2 + R3
Requires more memory per instruction but reduces the number of instructions needed.

2.Two-Address Instructions
 One operand acts as both a source and destination.
Example: ADD R1, R2,this means R1 = R1 + R2
Saves space but requires additional instructions for some operations.

3.One-Address Instructions
Uses an implicit accumulator register.
Example: LOAD A : AC = A
ADD : AC = AC + B
STORE C : C = AC , Simple but leads to more instructions in complex calculations.
4. Zero-Address Instructions
Used in stack-based architectures where all operations are performed on the stack. Operands are retrieved from
the stack and processed without relying on memory or registers.
Register Addressing Vs Memory Addressing

Register Addressing

Data is stored directly in registers, allowing the fastest execution.

Requires fewer bits, reducing execution time.

Memory Addressing

References a direct memory location.

Slower than register addressing because accessing memory takes more time.
using registers is faster than using memory.
Instruction Set Design(cont’d)
Instruction Set Design in Computer Architecture and Organization (CAO) refers to defining the set of
operations a processor can execute, impacting performance and efficiency.

▪ Key Design Factors

❖ Operation Repertoire Determines available instructions and their complexity.

❖ Data Types Specifies supported data formats (integer, floating-point, etc.).

❖ Instruction Format Defines instruction length, address count, and field structure.

❖ Registers Number and roles of registers in instruction execution.

❖ Addressing Modes Methods for specifying operand locations.

Instruction Set Design

▪ Types of Instruction Set Architectures:

❖ CISC (Complex Instruction Set Computing) More instructions, complex operations.

❖ RISC (Reduced Instruction Set Computing) Fewer, simpler instructions for efficiency.

❖ Significance: Proper instruction set design ensures optimized performance, power efficiency, and compatibility
in modern processors.