Lecture 2
Lecture 2
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By the 1960s, Metal Oxide Semiconductor Field Effect Transistors (MOSFETs) began to enter
production.
MOSFETs offer the compelling advantage that they draw almost zero control current while
idle.
They come in two flavors: nMOS and pMOS, using n-type and p-type silicon, respectively.
The original idea of field effect transistors dated back to the German scientist Julius Lilienfield
in 1925 and a structure closely resembling the MOSFET was proposed in 1935 by Oskar Heil.
In 1963, Frank Wanlass at Fairchild described the first logic gates using MOSFETs.
Fairchild’s gates used both nMOS and pMOS transistors, earning the name Complementary
Metal Oxide Semiconductor, or CMOS
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Moore’s Law
• “The number of transistors in a dense integrated circuit doubles
approximately every 18 months” Gordon E. Moore, 1965
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Integration Types
• SSI: Small Scale Integration [10 -100]
• MSI: Medium Scale Integration [100-
1000]
Based on • LSI: Large Scale Integration [tens of
number of thousand]
• VLSI: Very Large Scale Integration [more
transistors than hundreds of thousand]
• ULSI: Ultra Large Scale Integration [> 1
million]
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Feature Size
• The feature size of a CMOS manufacturing process refers to the
minimum dimension of a transistor that can be reliably built.
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Why Integration?
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Selection of design style
• The choice of particular design style for a VLSI product depends on the performance
requirements, the expected lifetime of the product and the cost of the project.
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Technology node /Manufacturing process
generation/ Manufacturing process technology
• As transistors shrink - Operate faster, consume less power,
cheaper to manufacture.
• Manufacturers introduce a new process generation (Also
called a technology node) every2-3 years with a 30%
smaller feature size to pack twice as many transistors in
the same area.
• Example: 22nm tech node.
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VLSI Design Flow
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Simplified VLSI Design
Flow
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