Computer Engineering Dep.

Course Outline

ELC 2423 Computer

Organization and Architecture (1)
2023/2024

Course Coordinator
Lecture 5
Assis. Prof. Dr. Elmahdy Maree
Lecture 3: Computer Organization and Architecture

Learning Objectives

Upon completion of this lecture, you will be able to:

◆ Identify and Describe the basic computer organization

Assis. Prof. Dr. Elmahdy Maree

Lecture LOs.
MET Computer Organization and Architecture

Revision

2024 3rd Year Computer Engineering

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Sequential circuits

Registers
Registers are a type of computer memory built directly into the processor or CPU (Central Processing Unit) that is used to store and
manipulate data during the execution of instructions. A register may hold an instruction, a storage address, or any kind of data

Buffer register.
Shift-right register.

Shift-left register.
Controlled buffer register with parallel load.

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Sequential circuits

Shift registers (serial to parallel converter)

• A shift register has a clock, a serial input Sin, a serial output Sout, and N parallel outputs QN−1:0
• On each rising edge of the clock, a new bit is shifted in from Sin and all the subsequent contents
are shifted forward
• The last bit in the shift register is available at Sout.
• Shift registers can be viewed as serial-to-parallel converters.
• The input is provided serially (one bit at a time) at Sin. After N cycles, the past N inputs are
available in parallel at Q

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Sequential circuits cont’d

Shift Rregisters (parallel to serial converter)

• A related circuit is a parallel-to-serial converter that loads N bits in parallel, then shifts them
out one at a time.
• A shift register can be modified to perform both serial-to-parallel and parallel-to-serial
operations by adding a parallel input DN−1:0, and a control signal Load.
• When Load is asserted, the flip-flops are loaded in parallel from the D inputs. Otherwise, the
shift register shifts normally.

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Sequential circuits

Hardware Implementation for Controlled Register

Controlled buffer register.

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SAM-1 Instruction Register

The instruction register (C8 and C9) of the SAM-1 computer.

What does this 8-bit register do?

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Sequential circuits
Counter
N-bit Counter:
• An N-bit binary counter is a sequential arithmetic circuit with clock and reset inputs and an N-bit output Q.
• Reset initializes the output to 0. (synchronous or asynchronous)
• The counter then advances through all 2N possible outputs in binary order, incrementing on
the rising edge of the clock.
A. Controlled Asynchronous Counter
Controlled ripple counter(up counter –ve edge)

SAP-1 program counter (PC)

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Sequential circuits
B. Controlled Synchronous Counter Waveform for Ring counter

Ring Counter

Note: Many digital circuits participate during a computer run to fetch and execute instructions

SAM-1 ring counter

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Sequential circuits

N-bit Counter using Adders

• The N-bit counter consists of an adder and a resettable register. On each cycle, the counter
adds 1 to the value stored in the register.

X=X+1 Step 1

X=X+4 Step 4
4

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Lecture Outline
• Arithmetic circuits
• Adders
• Arithmetic Logic Unit (ALU)
• Multipliers
• Dividers
• Number Systems
• Fixed point
• Floating point
• Floating point adder
• Sequential circuits
• Memories
• Bus system

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Sequential circuits

Memories

Digital systems also require memories to store the data used and generated by such circuits

• Registers built from flip-flops are a kind of memory that stores small amounts of data.

• Memory arrays can effiMETntly store large amounts of data:

• Dynamic Random Access Memory (DRAM)
• Static Random Access Memory (SRAM)
• Read Only Memory (ROM)

• The general symbol for memory array:

• 2N memory locations
• Each location stores M-bit

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Sequential circuits

Memories

• RAM (Random Access Memory)

Memory arrays
• Memory arrays are built using bit cells.
• Each bit cell stores 1 bit.
• The following figure shows a 4x3 memory array:

During a memory read:

A wordline is asserted, and the corresponding row of bit
cells drives the bitlines HIGH or LOW.

During a memory write:

The bitlines are driven HIGH or LOW first and then a
wordline is asserted, allowing the bitline values to be
stored in that row of bit cells

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Sequential circuits

Memories (Cont’d)
• RAM:
• RAM is volatile, meaning that it loses its data when the power is turned off

• Dynamic RAM (DRAM):

• Dynamic RAM stores data as a charge on a capacitor.
• Reading destroys the bit value stored on the capacitor
• The data word must be restored (rewritten) after each read
• Even when DRAM is not read, the contents must be refreshed (read and rewritten)
every few milliseconds, because the charge on the capacitor gradually leaks away

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Sequential circuits

Memories (Cont’d)
• Static RAM (SRAM)
• Static RAM stores data using a pair of cross-coupled inverters.
• Static because stored bits do not need to be refreshed
• The register file of the processor is built using SRAM

• Comparison between SRAM and DRAM

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Sequential circuits

Memories
• SAP 1 Memory
Static RAM with inverted control inputs

Pinout for 74189

The pin configuration of a 74189, a TTL static

RAM with three-state outputs. This 64-bit RAM
is organized as 16 words of 4 bits each. It has
an access time of 35 ns.

Important: the stored data bits are the

complements of the input data bits.

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Sequential circuits
Memories
SAM 1 Memory (Hardware Implementation)
The SAM-1 memory. Two 74189s are used to get a 16 x 8 memory. This means that we can store 16
words of 8 bits each.
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Sequential circuits

Memories
• ROM
• ROM is nonvolatile, meaning that it retains its data indefinitely, even without a power
source.
• modern ROMs are not really read only; they can be programmed (written) as well. The
difference between RAM and ROM is that ROMs take a longer time to write but are
nonvolatile.
• It can be built using logic gates as shown in the following figure:

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Memories

ROM

Ex: 4 x 3 ROM

Address Content
00 011
01 110
10 100
11 010

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Computer Components: Top-Level View

Basic Instruction Cycle

Basic Instruction Cycle

 CH 1: Digital Building Blocks

Hypothetical Machine

Note that:
1. All data manipulations with RAM will
be through AC, IR directly

If PC=300 and the memory contents is as shown in the figure, show the contents of the
registers and memory during the execution of three consecutive instructions.

Basic Instruction Cycle

CH 1: Digital Building Blocks

Basic Instruction Cycle

THANK YOU