SECTION - A

1. Mention the relations between the Gate-to-Source Voltage and Drain-to-Source Voltage for
a MOSFET device to function in the Linear-region and Saturation-region. Also, state the
Drain current equations for the MOSFET device in Linear Region and Saturation Region,
mentioning the names of every parameter present in these equations.
2. State the Barkhausen-conditions that set the criteria for developing sustained oscillations in
a positive feedback network.
3. Briefly describe the concept of “pinch-off” in a MOSFET device. Draw the output
characteristics of MOSFET device, and locate the pinch-off point in this characteristics.
4. Assume that you are performing an analog voltage amplifier experiment in your university
laboratory in Varanasi on a winter late-night, when the ambient room temperature has
dropped to a value of 80 C. You are building a common-emitter amplifier on a bread-board
with associated bias circuits using a silicon Bipolar junction transistor device having a βDC
value of 348. The ammeter connected to the input base-terminal of the device displays a DC
bias base-current value of 2.78 µA. For the BJT-device, assume that the ideality factor for
the Base-emitter junction diode is given by η = 1. The Boltzmann-constant is taken to be
1.38 x 10-23 JK-1, and the charge of the electron is given as 1.6 x 10-19 C. What is the value
of the small-signal emitter resistance, re, exhibited by the bipolar junction transistor device
in this amplifier circuit ?
5. With regards to analog differential amplifiers, define the term Common Mode Rejection
Ratio (CMRR).
6. What is meant by “DC-biasing” of a transistor device ? Explain the impact of DC bias
networks on the proper functioning of analog voltage amplifiers, based on the intuitive
understanding that you have developed from this course.
7. With the help of a circuit diagram, define the concept of “Virtual-Ground” with reference
to OP-AMP feedback circuits. How does the virtual-ground terminal differ from a
conventional ground terminal in an analog circuit ?
8. What are the key advantages of differential-amplifiers, in comparison to amplifiers with
single-ended inputs ?
9. Sketch the input and output characteristic curves of a Bipolar Junction Transistor biased in
Common-Emitter mode. Mark the Active, Saturation and Cut-off regions in the transistor
characteristics.
10. With regards to a MOSFET device, define and explain the following two parameters:
i. Threshold Voltage, VT ii. Trans-conductance, gm
11. Consider a BJT device-1 with a parasitic base-emitter junction device-capacitance value of
Cbe,1 = 20 pF. Consider another BJT (device-2) with a parasitic base-emitter junction
device-capacitance value of Cbe,2 = 8.4 pF. In an analog circuit operating at a frequency
of 80 MHz, what would be the approximate value of the ratio of reactances offered by both
these parasitic capacitances, i.e. XCbe,1 / XCbe,2 ? Also, what would be the value of reactance
offered by the parasitic capacitance of device-2 at an operating frequency of 44 MHz ?
12. List and explain the classifications of analog-amplifiers based on the following parameters:
i. Number of Stages ii. Frequency of Operation
13. Briefly explain the main differences between the biasing techniques for amplifiers involving
discrete-components and that for amplifiers built on silicon integrated circuit chips. Mention
a technique that can be used to bias amplifiers built on a silicon integrated circuit chip.
SECTION - B
1. Show the circuit architecture of an RC Phase-shift Oscillator designed using OP-AMP IC-
741ip. Describe briefly about how this circuit functions to generate sinusoidal
oscillations.
2. (a) Explain the concept of “feedback”, with regards to analog circuit design. What are the
key advantages of feedback-amplifiers compared to open-loop amplifiers that do not have
a feedback ?
(b) Consider the block diagram of a feedback control system shown below. The system
consists of an amplifier block with an open-loop gain value of A. The system has a
feedback block with transfer function β, which is defined by the ratio of the output
signal of the feedback block to the input signal to the feedback block. For this
feedback control system, derive the relation for vout / vin as a function of the
parameters A and β.

SECTION - C
1. Consider the analog voltage amplifier circuit shown in figure below. vin and vout are AC
input and output voltages respectively. VCC is the DC Bias Supply. CC,in and Cc,out are
coupling capacitors. The common-emitter small-signal current gain of the transistor is β.
The small-signal output-resistance of the transistor device, ro, can be assumed to be a very
 large resistance compared to the other bias resistors present in this amplifier circuit.
For this analog voltage amplifier, through conventional AC small-signal analysis
procedures,
(a) Derive the expression for Voltage Gain
(b) Derive the value of Zin

2. (a) “Approximations play a key role in helping a circuit designer to develop intuitive
insights about the behaviour of analog circuits”. Justify this statement. Also, briefly
mention about the types of approximations generally handled in analog circuit design.
(b) A BJT device is biased in common-emitter mode. Assume that the input voltage at
the base-terminal is given by the summation of a DC component and an AC-small-signal
as follows: vBE = VBE + vbe . Write a mathematical expression for the input base current iB,

as function of vBE. Use taylor’s series expansion and simplify the expression. State and

explain the necessary approximation(s) needed to represent the base current iB, as
summation of a DC-component and a linear AC term.

3. Draw the circuit diagram of a Half-wave Rectifier built using PN junction diode. Explain
the working of the circuit in detail using relevant voltage waveforms.

4. Consider the MOSFET common-source amplifier shown in figure below. In this amplifier
circuit, Q1 is a MOSFET device with transconductance, gm,sat, in saturation region, and a
small-signal output resistance, rds. RD is a bias resistor and VDD is the bias supply. The
input voltage Vin consists of a DC bias component, VBIAS, and an AC small signal
component, vin. The DC bias component ensures that the MOSFET is placed in saturation
region. The small signal output voltage is given by vout. For this MOSFET amplifier,
(a) Draw the AC equivalent circuit
(b) Derive the value of : vout / vin
 (c) Find the value of Input Impedance
(d) Derive the relation for Output Impedance

5. An n-channel Silicon MOSFET device has the following device parameters: Channel
Length = 2 µm, Channel Width = 15 µm. The oxide layer of MOSFET device is made up
of Silicon dioxide, and the unit-area oxide capaictance of the device is 6.9 x 10-8 F/cm2.
The MOSFET device is experimentally characterized by the following values in the Linear-
region of its device characteristics:
- With a Drain-to-Source voltage of 0.1 V in the linear region, the drain current is
found out to be 35 µA, for a Gate-to-Source voltage of 1.5 V
- With a Drain-to-Source voltage of 0.1 V in the linear region, the drain current is
found out to be 75 µA, for a Gate-to-Source voltage of 2.5 V
Calculate the value of mobility of electrons (in cm2/Vs) present in the channel of this
MOSFET device. (Use small-VDS approximation to neglect the square-term in the drain-
current equation).
SECTION - D
1. Consider the conventional Differential amplifier circuit, shown in figure below, built using
matched Bipolar junction transistor devices Q1 and Q2. vin,1 & vin,2 are the small signal
inputs to the amplifier. vo,1 & vo,2 indicate the small signal outputs at the collector
terminals of the matched transistors. RC1, RC2, REE are the biasing-resistors. VCC and
-VEE form the dual power supply for the amplifier circuit.
(a) Draw the AC-equivalent circuit diagrams for this differential amplifier, under
differential-mode and common-mode of operation.
(b) Using the AC-equivalent circuit diagrams obtained in part (a), perform small-signal
analysis and derive the expressions for the Gain of this amplifier, under differential
mode and common-mode of operation.
(c) Design this differential amplifier circuit, shown in the above figure, to meet the
following design constraints:
VCC = 9 V, |VEE| = 9 V,
IEE = 193 µA, IB1 = IB2 = 0.955 µA,
VB1 = VB2 = 0 V, VBE1 = VBE2 = 0.7 V, VCE1 = VCE2 = 5.2 V
Assume any other relevant parameters, if necessary, with suitable justifications.
Give your “final-design” in terms of the calculated values for resistors RC1, RC2, REE
and βDC values for the transistors Q1, Q2.
(d) Using the AC-analysis expressions derived in part (b), calculate the numerical values
of the following parameters for the circuit designed in part (c):
i. Differential Mode Gain
ii. Common Mode Gain
iii. Common Mode Rejection Ratio (CMRR)
iv. CMRR in decibel scale