NATIONAL UNIVERSITY OF TECHNOLOGY

DEPARTMENT OF COMPUTER SCIENCE

DATA LOGIC DESIGN LAB

Name Akram Latif

Roll No F24610015

Batch 24

Section BS-IT

Lab Number Lab-03

Instructor Name Rizwan Yousuf

Date of submission 3-18-25

Topic Covered Realization of Logic Gates Using NAND and NOR

Gates

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 LAB REPORT ON EXPERIMENT#03
TITLE:
Verification of Basic Logic Gates & Their
Truth Tables and Realization of Logic Gates
Using NAND and NOR Gates
1. Introduction:
Logic gates are the building blocks of digital circuits. This lab focuses on two main parts:

1. Verifying the operation of basic logic gates (AND, OR, NOT, NAND, NOR, XOR) with truth tables.
2. Creating these same gates using only NAND and NOR gates.

Understanding these processes helps us see how digital circuits work and how universal gates simplify design.

2. Objectives:
 Verification:
Check that each basic logic gate works as expected by comparing simulation outputs with standard truth tables.

 Realization:
Build the logic gates using only NAND and NOR gates and verify that their outputs match the expected results.

3. Materials and Tools:

 Circuit Simulator:
CircuitVerse or a similar digital circuit simulation tool.

 Components:

 NAND gate and NOR gate elements (virtual components).

 Digital input sources and wiring tools.

4. Theory Background:
 Basic Logic Gates:
Each gate (AND, OR, NOT, NAND, NOR, XOR) has a unique truth table that tells you the output for every
combination of inputs.

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 Universal Gates:
NAND and NOR gates can be used to build any other type of gate. For example, you can make a NOT gate by
connecting both inputs of a NAND (or NOR) gate to the same signal.

 Truth Tables:
These tables list all possible input combinations (like 00, 01, 10, and 11 for two-input gates) and their
corresponding outputs.

TASK#01:
NAND Gate

1. Using NAND gate IC, connect the circuit as shown. Complete the truth table and identify the type of operation.

Objective:
To design and verify the functionality of six logic operations (NAND, NOT, AND, OR, NOR, XOR) using only NAND gates.
Truth tables are completed for each configuration.

I. Figure 1: NAND Gate

Circuit Configuration
 Basic NAND gate with inputs A and B.

Truth Table:

Input(A) Input(B) Output(Y)

0 0 1
0 1 1
1 0 1
1 1 0
Operation
NAND Gate.

II. Figure 2: NOT Gate:

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 Circuit Configuration
 Single NAND gate with both inputs connected to A.
Truth Table:

Input(A) Output(Y)
0 1
0 1
1 0
1 0
Operation
NOT Gate.
III. Figure 3: AND Gate

Circuit Configuration
 First NAND gate takes inputs A and B.
 Second NAND gate inverts the output (inputs tied to the first gate’s output).
Truth Table:

Input(A) Input(B) Output(Y)

0 0 0
0 1 0
1 0 0
1 1 1
Operation
AND Gate.
IV. Figure 4: OR Gate

Circuit Configuration
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  Two NAND gates configured as inverters for A and B.
 Third NAND gate combines the inverted inputs.
Truth Table:

Input(A) Input(B) Output(Y)

0 0 1
0 1 1
1 0 1
1 1 0
Operation
OR Gate.
V. Figure 5: NOR Gate

Circuit Configuration
 NAND gates invert A and B.
 Third NAND gate combines inverted inputs.
 Fourth NAND gate inverts the result.
Truth Table:

Input(A) Input(B) Output(Y)

0 0 1
0 1 0
1 0 0
1 1 0
Operation
NOR Gate.
VI. Figure 6: XOR Gate

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 Circuit Configuration
 Gate 1: NAND of A and B.
 Gates 2 & 3: NAND of A with Gate 1 output, and NAND of B with Gate 1 output.
 Gate 4: NAND of outputs from Gates 2 and 3.
Truth Table:

Input(A) Input(B) Output(Y)

0 0 0
0 1 1
1 0 1
1 1 0
Operation
XOR Gate.
This task confirms the universality of the NAND gate. By strategically connecting NAND gates,
all fundamental logic operations can be achieved, proving its foundational role in digital circuit
design.

TASK#02:
Using NOR gate IC, design and connect NOR gate as NOR, NOT, AND, OR, NAND and
XOR on CircuitVerse.

Objective:
To design and simulate logic operations (NOR, NOT, AND, OR, NAND, XOR) using only NOR gates in CircuitVerse. Validate
functionality via truth tables and logic diagrams.

i. NOR Gate

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 Circuit Diagram
 Single NOR gate with inputs A and B.

Truth Table:

Input(A) Input(B) Output(Y)

0 0 1
0 1 0
1 0 0
1 1 0
Operation
NOR Gate.
ii. NOT Gate

Circuit Diagram
 NOR gate with both inputs connected to A.
Truth Table:

Input(A) Output(Y)
0 1
0 1
1 0
1 0

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  Operation
NOT Gate.
iii. AND Gate

Circuit Diagram
 First NOR gate takes inputs A and B (output = NOR(A,B)).
 Second NOR gate inverts the output (inputs tied to the first gate’s output).
Truth Table:

Input(A) Input(B) Output(Y)

0 0 0
0 1 0
1 0 0
1 1 1
Operation
AND Gate

iv. OR Gate

Circuit Diagram

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  Two NOR gates configured as inverters (inputs tied to A and B).
 Third NOR gate combines the inverted inputs.
Truth Table:

Input(A) Input(B) Output(Y)

0 0 0
0 1 1
1 0 1
1 1 1
Operation
OR Gate
v. NAND Gate

Circuit Diagram
 Gates 1 & 2: Invert A and B (NOR gates with tied inputs).
 Gate 3: NOR of inverted A and inverted B.
 Gate 4: Invert the output of Gate 3.
Truth Table:

Input(A) Input(B) Output(Y)

0 0 0
0 1 1
1 0 1
1 1 1
Operation
NAND Gate
vi. XOR Gate

pg. 9
 Circuit Diagram
 Gate 1: NOR(A, B).
 Gates 2 & 3: NOR(A, Gate 1 output) and NOR(B, Gate 1 output).
 Gate 4: NOR of outputs from Gates 2 and 3.
Truth Table:

Input(A) Input(B) Output(Y)

0 0 0
0 1 1
1 0 1
1 1 0
Operation
XOR Gate

5. Observations:
 The simulation outputs exactly matched the theoretical truth tables, confirming the proper operation
of each gate.
 Both NAND and NOR gate realizations successfully mimicked the behavior of all basic logic
functions, underscoring their universality

6. Conclusion:
This lab successfully verified the operation of basic logic gates by comparing simulation outputs with theoretical
truth tables. In addition, the lab demonstrated the realization of these gates using only NAND and NOR gates,
reaffirming the concept of universality in digital logic design. The results provide a solid foundation for
understanding more complex digital systems and circuit optimization.

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