Analog Design

Op-amp Parameters

Minh Thuy LE
School of Electrical and Electronic Engineering (SEEE),
Hanoi University of Science and Technology (HUST), Vietnam

[email protected]

19-Feb-24 Electronic Design – Le Minh Thuy 1

 Introduction
• The ideal op-amp model can be used to quickly determine the
operating principle of the circuit
• However, when designing a circuit, the engineers need to understand
the specifications of the op-amp which is used to meet the
requirements of the circuit:
▪ For example, to measure the voltage drop across a resistor, we
will use a non-inverting amplifier to convert this voltage to the
appropriate voltage level for the ADC
▪ According to the ideal model, the non-inverting circuit has an
infinite input resistance which guarantees the requirements of
the voltage measurement method
▪ However, an actual op-amp has an input resistance of 106 to 1012
or larger depending on the type of the op-amp

19-Feb-24 Electronic Design – Le Minh Thuy 2

 Introduction
• The parameters encountered in the datasheets of IC manufacturers
often have the same name. However, sometimes some parameters
can have different names.
• The parameters are usually classified into 3 typed in the datasheet:
▪ Absolute maximum rating table: indicates the limits that the
device must not exceed when in use to avoid damage
▪ Recommended operating conditions table: similar to the
parameters in absolute maximum ratings but this table will show
the conditions under which the device works well. If these
conditions are not satisfied, the device will not work "well" (but
not broken)
▪ Electrical characteristics table: the electrical characteristics of the
device tested under recommended operating conditions. It allows
designers to anticipate device behavior

19-Feb-24 Electronic Design – Le Minh Thuy 3

Input Offset Voltage
• Due to the unbalance of the electronic circuits inside the op-
amp, the output voltage is non-zero when there is no input
voltage
• Input offset voltage is the voltage that needs to be applied to
the input to make the output zero.
Symbol: 𝑉𝐼𝑂
• Bipolar-input op-amps have better input offset voltage
specifications than JFET or CMOS-input op-amps.
The test circuit measuring
input offset voltage

VOUT
VIO =
1000
19-Feb-24 Electronic Design – Le Minh Thuy 4
Effects of 𝑉𝐼𝑂
• Considering the inverting amplifier circuit, 𝑉𝐼𝑂 is modeled as a
voltage source applied on the inverting pin.
• It can be seen that the 𝑉𝐼𝑂 is multiplied by a factor ሺ1 +
𝑍2 /𝑍1 ሻ. This is also equal to the gain of the non-inverting
amplifier.
Z1 Z2
I1 = I 2
Vi

Vi − VIO VIO − Vo
I1 I2

=
VIO

-
Vo
Z1 Z2
ideal op-amp

Z2  Z 
+
→ Vo = − Vi + 1 + 2  VIO
Z1  Z1 

19-Feb-24 Electronic Design – Le Minh Thuy 5

 𝑉𝐼𝑂 Calibration
• Some IC op-amps already have 2 pins available for 𝑉𝐼𝑂
calibration
• However, it is also possible to calibrate 𝑉𝐼𝑂 by external circuits
10K

- + offset

10M R3

Vi R2
- Vo

+
R1

IC op-amp has VIO calibration pins External circuit to calibrate VIO

19-Feb-24 Electronic Design – Le Minh Thuy 6
 Input Current
• In an ideal op-amp model, the input currents at the inverting
and non-inverting pins are zero. However, in practice, there are
currents existing at the input pins of the op-amp
• The input bias current is calculated by:
𝐼𝑁 + 𝐼𝑃
𝐼𝐼𝐵 =
2
where 𝐼𝑁 and 𝐼𝑃 are the input bias currents at the inverting and
non-inverting pins.
• The difference between input currents at the non-inverting
and inverting pins are the input offset current:
𝐼𝐼𝑂 = 𝐼𝑃 − 𝐼𝑁

19-Feb-24 Electronic Design – Le Minh Thuy 7

 Input Current
• The test circuit measuring the input currents is shown in the figure.
• The input current has considerable impacts on the circuit when the
source has a high impedance. The input current multiplies by the
impedance of the source, therefore, the voltage applied on the
input of the amplifier is not the voltage of the source but a voltage
with a lower value.
• JFET or CMOS-input op-amps typically have smaller input currents
than bipolar-input op-amps.

19-Feb-24 Electronic Design – Le Minh Thuy 8

Effects of Input Currents
• Considering an inverting amplifier circuit as shown in the
figure, the bias current 𝐼𝑁 leads to an output voltage:
𝑍2
−𝐼𝑁 ሺ𝑍1 | 𝑍2 1 +
𝑍1

𝑉− = 𝑉+ = 0
𝐼2 = 𝐼1 + 𝐼𝑁
𝑉𝑜 𝑉𝑖
− = + 𝐼𝑁
𝑍2 𝑍1
𝑍2
→ 𝑉𝑜 = − 𝑉𝑖 − 𝑍2 𝐼𝑁
𝑍1
𝑍2 𝑍1 𝑍2 𝑍2
= − 𝑉𝑖 − 𝐼𝑁 1+
𝑍1 𝑍1 + 𝑍2 𝑍1
19-Feb-24 Electronic Design – Le Minh Thuy 9
 Input Currents Compensation
• The following circuit can be used to compensate the input current:
• When a resistor 𝑅3 is connected
at the non-inverting input, the
output voltage caused by 𝐼𝑃 is:
𝐼𝑃 𝑅3 ሺ1 + 𝑅2 /𝑅1 ሻ
• If 𝐼𝑃 = 𝐼𝑁 and 𝑅3 = 𝑅1 ||𝑅2 , the
effect of bias current will be
negated.
• Therefore, in non-inverting amplifiers, 𝑅3 are always connected at
the non-inverting pin, although when analyzing the circuit using the
ideal op-amp model, 𝑅3 can be ignored.

19-Feb-24 Electronic Design – Le Minh Thuy 10

 Input Common Mode Voltage Range
• Input Common Mode Voltage Range is defined as the average of
the voltages at the inverting and non-inverting input
Symbol: 𝑉𝐼𝐶𝑅
• If 𝑉𝐼𝐶𝑅 is too large or too small, the inputs of the op-amp may be
cut off and the op-amp may no longer operate properly.
• The 𝑉𝐼𝐶𝑅 determines the voltage region in which the op-amp
operates properly.
-
Vd=0

Vo
VCM

19-Feb-24 Electronic Design – Le Minh Thuy 11

 Maximum Output Voltage

• The maximum output voltage swing (VOM) is defined as the

maximum positive and negative output voltage that can be
achieved without distorting the signal when the output DC
voltage is zero.
• VOM depends on the output
resistance of the amplifier, the
saturation voltage of the
output transistors, and the
voltage of the power supply.
• In data sheets, VOM are
usually symbolized as 𝑉𝑂𝐻 and
𝑉𝑂𝐿 .

19-Feb-24 Electronic Design – Le Minh Thuy 12

 Input Parasitic Components
• Both inputs have parasitic impedances.
• The inputs are modeled by resistors and capacitors (the parasitic
inductance effect can be ignored when the op-amp operates at low
frequencies).
• Parasitic impedances are utilized when
the voltage signal source has a large
resistance, the effect of the input
impedance is then significant.
• 𝐶𝑑 and 𝑅𝑑 : capacitor and differential
resistor between the two inputs.
• 𝐶𝑛 , 𝐶𝑝 , 𝑅𝑛 , 𝑅𝑝 are the capacitors and the
resistors of the inputs (relative to the
ground)
19-Feb-24 Electronic Design – Le Minh Thuy 13
 Input Resistance and Capacitance

• Input capacitance 𝐶𝑖 is measured between two inputs. 𝐶𝑖 is

usually several pF in value.
▪ If the non-inverting pin is not grounded, 𝐶𝑖 = 𝐶𝑑 ||𝐶𝑛

▪ Commom mode input capacitance 𝐶𝑖𝑐 : If 𝑉𝑁 and 𝑉𝑃 are

equal, 𝐶𝑖𝑐 = 𝐶𝑛 ||𝐶𝑝
• Input resistance: is measured between the two inputs of the op-
amp
▪ If the non-inverting pin is not grounded, 𝑟𝑖 = 𝑅𝑑 ||𝑅𝑝 . 𝑟𝑖 can
be from 107 to 1012 Ohm depending on the input type of the
op amp
▪ If 𝑉𝑝 = 𝑉𝑛 , the input resistance is the common mode
resistance 𝑟𝑖𝑐 = 𝑅𝑛 ||𝑅𝑝

19-Feb-24 Electronic Design – Le Minh Thuy 14

 Output Impedance

• The output impedance 𝑍𝑜 is defined as the small signal

impedance between the output and ground.
• The value of 𝑍𝑜 is usually from 50 to 200 Ohm.
• Effect of the output impedance 𝑍𝑜 :

19-Feb-24 Electronic Design – Le Minh Thuy 15

 Effects of Output Impedance

Z1 Z2
Using the loop current method:

I1
I2 Vi = I1 ( Z1 + Z d ) + I 2 Z d
-
K 0Vd = I1Z d + I 2 ( Z o + Z 2 + Z d )
K0Vd Zo
Zd Vo = − I 2 Z 0 + K 0Vd
Vi

Vo

+ If 𝑍𝑜 is ignored:
Vo Z 1
=− 2
Vi Z1 1  Z2 Z2 
1+ 1 + + 
K0  Z1 Z d 
19-Feb-24 Electronic Design – Le Minh Thuy 16
Common-mode Amplifier and CMRR
• When 𝑉𝑑 = 0 and 𝑉𝐶𝑀 ≠ 0, 𝑉𝑜 is non-zero.
• The common-mode rejection ratio (CMRR) is defined as the
ratio:
𝐴𝐷𝐼𝐹
𝐶𝑀𝑅𝑅 =
𝐴𝐶𝑂𝑀
where: 𝐴𝐷𝐼𝐹 is the differential gain
𝐴𝐶𝑂𝑀 is the common-mode gain
• Ideally, the CMRR is extremely large, i.e. the common-mode gain
is infinitely small compared to the differential gain.
-
Vd=0

+
VCM Vo

19-Feb-24 Electronic Design – Le Minh Thuy 17

Effects of 𝐴𝐶𝑀
• Considering the effect of 𝐴𝐶𝑀 in non-inverting amplifier (in
inverting amplifier, the effect is negligible because 𝑉𝐶𝑀 ≈ 0)
Vo R2
VN = R1 and VP = Vi
R1 + R2

i2
R1
R1 Vout
Vd = VP − VN = Vi − Vo -

R1 + R2 Vin
i1
+
VCM  Vi
 R 
Vo = K 0Vd + KCM VCM = K 0 Vi − 1 Vo  + KCM Vi
 R1 + R2  -

VCM Vd
V
 R  i CMRR + +

Vo
Vo = 1 + 2  VCM

 R1  1 + 1 1 + R2 
 
K 0  R1 
 R2   The larger the CMRR, the smaller
VCM 
1/𝐾0  0 Vo = 1 +   Vi +  the effect of common-mode signal
19-Feb-24
 R1   CMRR 
Electronic Design – Le Minh Thuy 18
Slew rate at gain = 1
• Slew rate (SR) is the rate of change of the output signal (V/ms or
V/μs) when the input is a step signal:
𝑑𝑉
𝑆𝑅 =
𝑑𝑡
• The slew rate increases when the bias current increases

19-Feb-24 Electronic Design – Le Minh Thuy 19

Bandwidth
• In practice, the differential gain of the op-amp is a function of
frequency.
▪ f = 0: maximum gain possible

▪ As the frequency increases, the gain decreases.

• Unity Gain Bandwidth: indicates the frequency at which the gain

is equal to 1.
• Gain Bandwidth Product: the product of the gain and the
bandwidth

19-Feb-24 Electronic Design – Le Minh Thuy 20

19-Feb-24 Electronic Design – Le Minh Thuy 21