*Microprocessors Assignment Refined Short Answers (Q1 - Q75)*

1. *First microprocessor:* The Intel 4004, launched by Intel in 1971, was the first commercially
available microprocessor. It was a 4-bit processor.

2. *Evolution:* Microprocessors evolved from Intel 4004 (2,300 transistors) to modern CPUs with
billions. Moore’s Law predicts doubling of transistor count every two years. Plot: Transistor count vs.
years (logarithmic growth).

3. *8085 Architecture:* Consists of ALU, accumulator, general-purpose registers, control unit,

4. *Applications:* Used in embedded systems, traffic signals, washing machines, medical devices,
and industrial automation.

5. *Instruction/Machine/Timing:* Instruction cycle = fetch + execute. Machine cycle = part of

6. *8085 Buses:* Address Bus (16-bit), Data Bus (8-bit), and Control Bus for coordinating read/write
operations.

7. *RISC vs CISC:* RISC (ARM): Simple instructions, faster; CISC (Intel x86): Complex instructions,
fewer per program. RISC uses more instructions for complex tasks.

8. *8085 Addressing Modes:* Immediate (MVI A, 32H), Register (MOV A, B), Direct (LDA 2050H),
Indirect (MOV A, M), Implicit (CMA).

9. *Accumulator/Flag Registers:* Accumulator stores results. Flag register indicates Zero (Z), Sign (S),
Carry (CY), Parity (P), Auxiliary Carry (AC).

10. *8086 Flag Register:* 16-bit, includes status flags (ZF, CF, SF, OF) and control flags (IF, DF, TF).
Used to control and monitor operations.

11. *Control Unit & ALU:* Control unit directs data flow and instruction execution. ALU performs
arithmetic/logical operations like ADD, SUB, AND, OR.

12. *Types of Instructions in 8085:* Data transfer (MOV, MVI), Arithmetic (ADD, SUB), Logical (ANA,
ORA), Branch (JMP, CALL), Control (NOP, HLT).

13. *Execution Time (20 T-states @4MHz):* T = 1/4MHz = 0.25 µs → 20 T-states × 0.25 = *5 µs*.

14. *8 Clock Cycles @5MHz:* T = 1/5MHz = 0.2 µs → 8 × 0.2 = *1.6 µs*.

15. *Last Mem Address (16KB from 2000H):* 2000H + 3FFFH = *5FFFH*.

16. *Memory Requirement:* 32KB RAM + 16KB ROM = *48KB total memory*.

17. *Instructions/sec (2 µs/instr):* 1 / (2×10⁻⁶) = *500,000 instructions/sec*.

18. *8086 Architecture:* Split into BIU and EU, supports pipelining. 16-bit processor with 20-bit
address bus (1MB addressable).

19. *Real vs Protected Mode:* Real mode allows 1MB memory, no protection. Protected mode
allows multitasking, memory protection, and >1MB access.
20. *Memory Segmentation:* Divides memory into CS, DS, SS, ES. Logical address = Segment × 10H +
Offset.

21. *General Purpose Registers (8086):* AX (Accumulator), BX (Base), CX (Counter), DX (Data). Used
for arithmetic, loops, and data transfer.

22. *8086 Pin Diagram:* Key pins include AD0–AD15 (address/data), ALE (address latch), RD, WR,
INTR. Used for interfacing.

23. *Physical Address (ES=6500H, offset=47670H):* PA = 6500 × 10H + 47670H = *6F670H*.

24. *PA (CS=3000H, IP=1500H):* PA = 3000 × 10H + 1500 = *31500H*.

25. *Exec Time (10 cycles @8MHz):* T = 1/8MHz = 0.125 µs → 10 × 0.125 = *1.25 µs*.

26. *Effective Addr (BP=3000H, DI=0500H, offset=120H):* EA = 3000 + 0500 + 0120 = *3620H*.

27. *Max Address (Real Mode 8086):* 20-bit address bus → 2²⁰ = *1MB (FFFFFH)*.

28. *Loop Time (1000 × 6 cycles @10MHz):* 6000 cycles → 6000 / 10⁶ = *0.6 ms*.

29. *Data Movement Examples:* MOV A, B; LDA addr (8085), MOV AX, BX; PUSH DX (8086).

30. *8085 vs 8086:* 8085 – 8-bit, no segmentation, 74 instructions. 8086 – 16-bit, segmented
memory, 100+ instructions.

31. *Arithmetic vs Logical:* Arithmetic (ADD, SUB) affects carry; Logical (AND, OR) doesn't. Logical
used for bitwise ops.

32. *Branch Control (8086):* JMP, JZ, JNZ, CALL, RET – used for loops, functions.

33. *Add 16-bit (8085):* Use LXI, MOV, DAD, and STORE instructions to add and store result.

34. *Loop Instr. (8086):* LOOP label uses CX as counter. Decrements CX each iteration.

35. *Instr Time (12 cycles @10MHz):* T = 1 / 10M = 0.1 µs → 12 × 0.1 = *1.2 µs*.

36. *Instr/sec (12MHz, 4 cycles):* 1 instr = 4 cycles → 12M / 4 = *3M instr/sec*.

37. *Subroutine (1500 × 8 @5MHz):* 12000 cycles / 5M = *2.4 ms*.

38. *6000 cycles @6MHz:* 6000 / 6M = *1 ms*.

39. *Mem Access (300ns × 3):* *900 ns* total.

40. *Interrupt Concept:* CPU halts current task, executes ISR, resumes later. Used for urgent events.

41. *Highest Priority Interrupt:* *TRAP* (non-maskable, edge and level-triggered).

42. *8259 PIC:* Handles 8 interrupts, prioritizes them, sends to CPU via INTR line.

43. *DMA (8237):* Transfers data from I/O to memory without CPU. Faster data transfer.

44. *Interrupt Vector Table:* Table of ISR addresses. In 8086, starts at 0000:0000H.

45. *Maskable vs Non-Maskable:* Maskable can be disabled (INTR). Non-maskable (TRAP) cannot be
ignored.

46. *Max Freq (10 cycles @6MHz):* 6M / 10 = *600,000 interrupts/sec*.

48. *ISR Time (5 + 25 cycles @8MHz):* 30 / 8M = *3.75 µs*.

49. *Max Interrupts (30 cycles @10MHz):* 10M / 30 = *~333,333/sec*.

50. *8 Interrupt Lines = ? Bits:* 2³ = 8 → *3 bits needed*.

51. *Memory Interfacing:* Uses address decoding to map memory to processor’s address bus.

52. *8255 PPI:* 3 ports (A, B, C), used to connect peripherals like LEDs, switches.

53. *8253 PIT:* Has 3 counters, programmable. Mode 3 = square wave generator.

54. *8251 USART:* Serial communication; converts parallel to serial and vice versa.

55. *ADC/DAC:* ADC samples analog signals; DAC reconstructs analog from digital data.

56. *Baud Rate (1.8432MHz / 16):* = *115200 bps*.

57. *8253 Count (1MHz, 1kHz):* 1M / 1k = *1000 count*.

58. *Sampling Rate (12-bit @10kHz):* = *10k samples/sec*.

59. *DAC Resolution (8-bit, 0–10V):* = 10 / 256 = *~0.039V/step*.

60. *Processor Comparison:* 80286 (16-bit), 80386 (32-bit), 80486 (faster), Pentium (dual pipeline).

61. *8051 Arch:* Includes CPU, RAM, ROM, 4 I/O ports, timers, serial port, interrupt control.

62. *8051 I/O Ports:* P0 to P3, 8-bit, used for digital input/output. Some dual-purpose.

63. *8051 Addressing:* Immediate (#data), Register (A, R0–R7), Direct (addr), Indirect (@R0).

64. *8051 Interrupts:* External, Timer, Serial – used in time-critical embedded apps.

65. *Timer Tick (11.0592MHz):* 1 cycle = 1.085 µs (11.0592MHz ÷ 12).

66. *Baud Rate (TH1 = 250):* ~28800 bps in Mode 1.

67. *Delay (5ms @12MHz):* 1 cycle = 1 µs → need 5000 machine cycles.

68. *8051 Max Clock Speed:* Up to *40 MHz* (depending on version).

69. *8051 Execution (2 cycles @24MHz):* 2 / 24M = *~83.3 ns*.

70. *Stepper Motor Ctrl:* 8051 gives pulses to driver in specific sequence to rotate motor.

71. *Temp Control (8086):* Use ADC to read temp, compare with threshold, control fan/heater.

72. *8051 in Real-Time:* Used in embedded systems like smart meters, medical devices, etc.

73. *Automotive Apps:* Speed control, engine management, wipers, display units.

74. *Traffic Light Ctrl:* 8051 uses timers and outputs to control LEDs in a timed loop.

75. *8251 Pins:* TXE = Transmit Buffer Empty, DTR = Data Terminal Ready, RTS = Request To Send.

*BHE/S:* High byte enable/select, *DEN:* Data enable, *HLDA:* Hold Acknowledge, *MN/MX:*
Mode select.
76. *8086 Instruction Format + Examples:*

a) XCHG AL, [0300H]

b) LAHF (load flags into AH)

c) XCHG DX, AX

d) OUT 01H, AL

77. *Microprocessor vs Microcontroller:* µP = CPU only, needs external peripherals. µC = CPU + RAM
+ ROM + I/O in one chip.

78. *Instruction Examples:*

a) MUL CL

b) MUL CX

c) PUSH AX

d) ADD [BX], 22H

79. *8253 PIT Modes & Freq:* Mode 3 = Square wave, Freq = 1MHz / 5000 = *200 Hz*.