0% found this document useful (0 votes)
12 views

Os Complete Short Notes

The document provides an overview of operating systems, detailing their role as intermediaries between users and hardware, and outlining their goals such as efficient resource management and user convenience. It discusses the structure of computer systems, including components like hardware, operating systems, application programs, and users, as well as the functions of interrupts, I/O structures, and process management. Additionally, it covers process concepts, interprocess communication, and various scheduling techniques essential for efficient operating system operations.

Uploaded by

Varun kumar
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
12 views

Os Complete Short Notes

The document provides an overview of operating systems, detailing their role as intermediaries between users and hardware, and outlining their goals such as efficient resource management and user convenience. It discusses the structure of computer systems, including components like hardware, operating systems, application programs, and users, as well as the functions of interrupts, I/O structures, and process management. Additionally, it covers process concepts, interprocess communication, and various scheduling techniques essential for efficient operating system operations.

Uploaded by

Varun kumar
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 72

UNIT-I

OVER VIEW OF OPERATING SYSTEM

What is an Operating System?


A program that acts as an intermediary between a user of a computer and the computer hardware
Operating system goals:
• Execute user programs and make solving user problems easier
• Make the computer system convenient to use
• Use the computer hardware in an efficient manner
Computer System Structure
Computer system can be divided into four components
• Hardware - provides basic computing resources
CPU, memory, I/O devices
• Operating system
Controls and coordinates use of hardware among various applications and users
• Application programs - define the ways in which the system resources are used to solve the computing
problems of the users
Word processors, compilers, web browsers, database systems, video games
• Users
People, machines, other computers

Four Components of a Computer System

Operating System Definition

• OS is a resource allocator
• Manages all resources
Decides between conflicting
requests for efficient and fair
resource use

• OS is a control program
• Controls execution of programs to prevent errors and improper use of the computer
• No universally accepted definition
• Everything a vendor ships when you order an operating system" is good approximation
But varies wildly
• "The one program running at all times on the computer" is the kernel. Everything else is either a
system program (ships with the operating system) or an application program

Computer Startup
• bootstrap program is loaded at power-up or reboot
• Typically stored in ROM or EPROM, generally known as firmware
• Initializes all aspects of system
• Loads operating system kernel and starts execution
Computer System Organization
• Computer-system operation
• One or more CPUs, device controllers connect through common bus providing access to shared memory
• Concurrent execution of CPUs and devices competing for memory cycles

Computer-System Operation
• I/O devices and the CPU can execute concurrently
• Each device controller is in charge of a particular device type
• Each device controller has a local buffer
• CPU moves data from/to main memory to/from local buffers
• I/O is from the device to local buffer of controller
• Device controller informs CPU that it has finished its operation by causing An interrupt
Common Functions of Interrupts
• Interrupt transfers control to the interrupt service routine generally, through the interrupt vector, which
contains the addresses of all the service routines
• Interrupt architecture must save the address of the interrupted instruction
• Incoming interrupts are disabled while another interrupt is being processed to prevent a lost interruptnA
trap is a software-generated interrupt caused either by an error or a user request
• An operating system is interrupt driven
Interrupt Handling
• The operating system preserves the state of the CPU by storing registers and the program counter
• Determines which type of interrupt has occurred:
• polling
• vectored interrupt system
• Separate segments of code determine what action should be taken for each type of interrupt
Interrupt Timeline

I/O Structure
• After I/O starts, control returns to user program only upon I/O completion
• Wait instruction idles the CPU until the next interrupt
• Wait loop (contention for memory access)
• At most one I/O request is outstanding at a time, no simultaneous I/O processing
• After I/O starts, control returns to user program without waiting for I/O completion
• System call - request to the operating system to allow user to wait for I/O completion
• Device-status table contains entry for each I/O device indicating its type, address, and state
• Operating system indexes into I/O device table to determine device status and to modify table entry to
include interrupt

Direct Memory Access Structure


• Used for high-speed I/O devices able to transmit information at close to memory speeds
• Device controller transfers blocks of data from buffer storage directly to main memory without CPU
intervention
• Only one interrupt is generated per block, rather than the one interrupt per byte
Storage Structure
• Main memory - only large storage media that the CPU can access directly
• Secondary storage - extension of main memory that provides large nonvolatile storage capacity
• Magnetic disks - rigid metal or glass platters covered with magnetic recording material
• Disk surface is logically divided into tracks, which are subdivided into sectors
• The disk controller determines the logical interaction between the device and the computer
Storage Hierarchy
• Storage systems organized in hierarchy
• Speed
• Cost
• Volatility
Caching - copying information into faster storage system; main memory can be viewed as a last cache for
secondary storage

Caching
• Important principle, performed at many levels in a computer (in hardware, operating system, software)
• Information in use copied from slower to faster storage temporarily
• Faster storage (cache) checked first to determine if information is there
• If it is, information used directly from the cache (fast)
• If not, data copied to cache and used there
• Cache smaller than storage being cached
 Cache management important design problem

 Cache size and replacement policy

Computer-System Architecture
• Most systems use a single general-purpose processor (PDAs through mainframes)
• Most systems have special-purpose processors as well
• Multiprocessors systems growing in use and importance •
Also known as parallel systems, tightly-coupled systems
Advantages include
1.Increased throughput
2.Economy of scale
3.Increased reliability - graceful degradation or fault tolerance
Two types
1.Asymmetric Multiprocessing
2.Symmetric Multiprocessing

How a Modern Computer Works


Symmetric Multiprocessing Architecture
A Dual-Core Design

Clustered Systems

• Like multiprocessor systems, but multiple systems working together


• Usually sharing storage via a storage-area network (SAN)
• Provides a high-availability service which survives failures
Asymmetric clustering has one machine in hot-standby mode
Symmetric clustering has multiple nodes running applications, monitoring each other
• Some clusters are for high-performance computing (HPC)
Applications must be written to use parallelization

Operating System Structure


• Multiprogramming needed for efficiency
• Single user cannot keep CPU and I/O devices busy at all times
• Multiprogramming organizes jobs (code and data) so CPU always has one to Execute
• A subset of total jobs in system is kept in memory
• One job selected and run via job scheduling
• When it has to wait (for I/O for example), OS switches to another job
• Timesharing (multitasking) is logical extension in which CPU switches jobs so frequently that users
can interact with each job while it is running, creating interactive computing
• Response time should be < 1 second
• Each user has at least one program executing in memory [process
• If several jobs ready to run at the same time [ CPU scheduling
• If processes don't fit in memory, swapping moves them in and out to run
Virtual memory allows execution of processes not completely in memory

Memory Layout for Multiprogrammed System

6
Operating System Services

One set of operating-system services provides functions that are helpful to the user
(Cont):lCommunications - Processes may exchange information, on the same computer or between
computers over a network
Communications may be via shared memory or through message passing (packets moved by the OS)
• Error detection - OS needs to be constantly aware of possible errors
May occur in the CPU and memory hardware, in I/O devices, in user program
For each type of error, OS should take the appropriate action to ensure correct and consistent
computing
Debugging facilities can greatly enhance the user's and programmer's abilities to efficiently use the
system

• Another set of OS functions exists for ensuring the efficient operation of the system itself via resource
sharing
• Resource allocation - When multiple users or multiple jobs running concurrently, resources must be
allocated to each of them
• Many types of resources- Some (such as CPU cycles, main memory, and file storage) may have
special allocation code, others (such as I/O devices) may have general request and release code
• Accounting - To keep track of which users use how much and what kinds of computer resources

• Protection and security - The owners of information stored in a multiuser or networked computer
system may want to control use of that information, concurrent processes should not interfere with each
other
• Protection involves ensuring that all access to system resources is controlled
• Security of the system from outsiders requires user authentication, extends to defending external I/O
devices from invalid access attempts
• If a system is to be protected and secure, precautions must be instituted throughout it. A chain is only
as strong as its weakest link.
Process Concept
 An operating system executes a variety of programs:
 Batch system – jobs
 Time-shared systems – user programs or tasks
 Textbook uses the terms job and process almost interchangeably
Process – a program in execution; process execution must progress in sequential fashion
A process includes:
 program counter
 stack
 data section
Process in Memory

Process State

As a process executes, it changes stat


 new: The process is being created
 running: Instructions are being executed
 waiting: The process is waiting for some event to occur
 ready: The process is waiting to be assigned to a processor
 terminated: The process has finished execution
Diagram of Process State
Process Control Block (PCB)

Information associated with each process


 Process state
 Program counter
 CPU registers
 CPU scheduling information
 Memory-management information
 Accounting information
 I/O status information

CPU Switch From Process to Process

Process Scheduling Queues

 Job queue – set of all processes in the system


 Ready queue – set of all processes residing in main memory, ready and waiting to
execute
 Device queues – set of processes waiting for an I/O device
 Processes migrate among the various queues
Ready Queue And Various I/O Device Queues

Representation of Process Scheduling


Schedulers
 Long-term scheduler (or job scheduler) – selects which processes should be brought
into the ready queue
 Short-term scheduler (or CPU scheduler) – selects which process should be
executed next and allocates CPU
Addition of Medium Term Scheduling

 Short-term scheduler is invoked very frequently (milliseconds) Þ (must be fast)


 Long-term scheduler is invoked very infrequently (seconds, minutes) Þ (may be slow)
 The long-term scheduler controls the degree of multiprogramming
 Processes can be described as either:
 I/O-bound process – spends more time doing I/O than computations, many short CPU
bursts
 CPU-bound process – spends more time doing computations; few very long CPU
bursts
Context Switch
 When CPU switches to another process, the system must save the state of the old
process and load the saved state for the new process via a context switch
 Context of a process represented in the PCB
 Context-switch time is overhead; the system does no useful work while switching
 Time dependent on hardware support
Process Creation
 Parent process create children processes, which, in turn create other processes,
forming a tree of processes
 Generally, process identified and managed via a process identifier (pid)
 Resource sharing
 Parent and children share all resources
 Children share subset of parent’s resources
 Parent and child share no resources
 Execution
 Parent and children execute concurrently
 Parent waits until children terminate
 Address space
 Child duplicate of parent
 Child has a program loaded into it
 UNIX examples
 fork system call creates new process
 exec system call used after a fork to replace the process’ memory space with a new
program
Process Creation

C Program Forking Separate Process

int main()
{
pid_t pid;
/* fork another process */
pid = fork();
if (pid < 0) { /* error occurred */
fprintf(stderr, "Fork Failed");
exit(-1);
}
else if (pid == 0) { /* child process */
execlp("/bin/ls", "ls", NULL);
}
else { /* parent process */
/* parent will wait for the child to complete */
wait (NULL);
printf ("Child Complete");
exit(0);
}
}
A tree of processes on a typical Solaris

Process Termination
 Process executes last statement and asks the operating system to delete it (exit)
 Output data from child to parent (via wait)
 Process’ resources are deallocated by operating system
 Parent may terminate execution of children processes (abort)
 Child has exceeded allocated resources
 Task assigned to child is no longer required
 If parent is exiting
Some operating system do not allow child to continue if its parent terminates
All children terminated - cascading termination
Interprocess Communication
 Processes within a system may be independent or cooperating
 Cooperating process can affect or be affected by other processes, including sharing
data
 Reasons for cooperating processes:
 Information sharing
 Computation speedup
 Modularity
 Convenience
 Cooperating processes need interprocess communication (IPC)
 Two models of IPC
 Shared memory
 Message passing
Communications Models

Cooperating Processes
 Independent process cannot affect or be affected by the execution of another process
 Cooperating process can affect or be affected by the execution of another process
Advantages of process cooperation
 Information sharing
 Computation speed-up
 Modularity
 Convenience
Producer-Consumer Problem
 Paradigm for cooperating processes, producer process produces information that is
consumed by a consumer process
 unbounded-buffer places no practical limit on the size of the buffer
 bounded-buffer assumes that there is a fixed buffer size
Bounded-Buffer – Shared-Memory Solution
Shared data
#define BUFFER_SIZE 10
typedef struct {
...
} item;
item buffer[BUFFER_SIZE];
int in = 0;
int out = 0;
Solution is correct, but can only use BUFFER_SIZE-1 elements
Bounded-Buffer – Producer
while (true) {
/* Produce an item */
while (((in = (in + 1) % BUFFER SIZE count) == out)
; /* do nothing -- no free buffers */
buffer[in] = item;
in = (in + 1) % BUFFER SIZE;
}

Bounded Buffer – Consumer


while (true) {
while (in == out)
; // do nothing -- nothing to consume
// remove an item from the buffer
item = buffer[out];
out = (out + 1) % BUFFER SIZE;
return item;
}
Interprocess Communication – Message Passing
 Mechanism for processes to communicate and to synchronize their actions
 Message system – processes communicate with each other without resorting to shared
variables
 IPC facility provides two operations:
 send(message) – message size fixed or variable
 receive(message)
 If P and Q wish to communicate, they need to:
 establish a communication link between them
 exchange messages via send/receive
 Implementation of communication link
 physical (e.g., shared memory, hardware bus)
 logical (e.g., logical properties)
Direct Communication
 Processes must name each other explicitly:
 send (P, message) – send a message to process P
 receive(Q, message) – receive a message from process Q
 Properties of communication link
 Links are established automatically
 A link is associated with exactly one pair of communicating processes
 Between each pair there exists exactly one link
 The link may be unidirectional, but is usually bi-directional
Indirect Communication
 Messages are directed and received from mailboxes (also referred to as ports)
 Each mailbox has a unique id
 Processes can communicate only if they share a mailbox
 Properties of communication link
 Link established only if processes share a common mailbox
 A link may be associated with many processes
 Each pair of processes may share several communication links
 Link may be unidirectional or bi-directional
 Operations
 create a new mailbox
 send and receive messages through mailbox
 destroy a mailbox
 Primitives are defined as:
 send(A, message) – send a message to mailbox A
 receive(A, message) – receive a message from mailbox A
 Mailbox sharing
 P1, P2, and P3 share mailbox A
 P1, sends; P2 and P3 receive
 Who gets the message?
 Solutions
 Allow a link to be associated with at most two processes
 Allow only one process at a time to execute a receive operation
 Allow the system to select arbitrarily the receiver. Sender is notified who the receiver
was.
Synchronization
 Message passing may be either blocking or non-blocking
 Blocking is considered synchronous
 Blocking send has the sender block until the message is received
 Blocking receive has the receiver block until a message is available
 Non-blocking is considered asynchronous
 Non-blocking send has the sender send the message and continue
 Non-blocking receive has the receiver receive a valid message or null
Buffering
Queue of messages attached to the link; implemented in one of three ways
1. Zero capacity – 0 messages
Sender must wait for receiver (rendezvous)
2. Bounded capacity – finite length of n messages
Sender must wait if link full
3. Unbounded capacity – infinite length
Sender never waits
Examples of IPC Systems - POSIX
 POSIX Shared Memory
 Process first creates shared memory segment
 segment id = shmget(IPC PRIVATE, size, S IRUSR | S IWUSR);
 Process wanting access to that shared memory must attach to it
 shared memory = (char *) shmat(id, NULL, 0);
 Now the process could write to the shared memory
 printf(shared memory, "Writing to shared memory");
 When done a process can detach the shared memory from its address space
 shmdt(shared memory);
Examples of IPC Systems - Mach
 Mach communication is message based
 Even system calls are messages
 Each task gets two mailboxes at creation- Kernel and Notify
 Only three system calls needed for message transfer
 msg_send(), msg_receive(), msg_rpc()
 Mailboxes needed for commuication, created via
 port_allocate()
Examples of IPC Systems – Windows XP
 Message-passing centric via local procedure call (LPC) facility
 Only works between processes on the same system
 Uses ports (like mailboxes) to establish and maintain communication channels
 Communication works as follows:
The client opens a handle to the subsystem’s connection port object
The client sends a connection request
The server creates two private communication ports and returns the handle to one of
them to the client
The client and server use the corresponding port handle to send messages or
callbacks and to listen for replies
Local Procedure Calls in Windows XP
Communications in Client-Server Systems
 Sockets
 Remote Procedure Calls
 Remote Method Invocation (Java)
Sockets
 A socket is defined as an endpoint for communication
 Concatenation of IP address and port
 The socket 161.25.19.8:1625 refers to port 1625 on host 161.25.19.8
 Communication consists between a pair of sockets
Socket Communication

Remote Procedure Calls


 Remote procedure call (RPC) abstracts procedure calls between processes on
networked systems
 Stubs – client-side proxy for the actual procedure on the server
 The client-side stub locates the server and marshalls the parameters
 The server-side stub receives this message, unpacks the marshalled parameters, and
peforms the procedure on the server
Execution of RPC
Remote Method Invocation
 Remote Method Invocation (RMI) is a Java mechanism similar to RPCs
 RMI allows a Java program on one machine to invoke a method on a remote object

Marshalling Parameters

Threads
 To introduce the notion of a thread — a fundamental unit of CPU utilization that forms
the basis of multithreaded computer systems
 To discuss the APIs for the Pthreads, Win32, and Java thread libraries
 To examine issues related to multithreaded programming
Single and Multithreaded Processes
Benefits
 Responsiveness
 Resource Sharing
 Economy
 Scalability
Multicore Programming
Multicore systems putting pressure on programmers, challenges include
 Dividing activities
 Balance
 Data splitting
 Data dependency
 Testing and debugging
Multithreaded Server Architecture

Concurrent Execution on a Single-core System

Parallel Execution on a Multicore System


User Threads
 Thread management done by user-level threads libraryThree primary thread libraries:
 POSIX Pthreads Win32 threads
 Java threads
Kernel Threads
Supported by the Kernel
Examples
 Windows XP/2000
 Solaris
 Linux
 Tru64 UNIX
 Mac OS X
Multithreading Models
 Many-to-One
 One-to-One
 Many-to-Many
Many-to-One
Many user-level threads mapped to single kernel thread
Examples:
 Solaris Green Threads
 GNU Portable Threads

One-to-One
Each user-level thread maps to kernel thread
Examples
Windows NT/XP/2000
Linux
Solaris 9 and later
Many-to-Many Model
 Allows many user level threads to be mapped to many kernel threads
 Allows the operating system to create a sufficient number of kernel threads
 Solaris prior to version 9
Windows NT/2000 with the ThreadFiber package

Two-level Model
Similar to M:M, except that it allows a user thread to be bound to kernel thread
Examples
 IRIX
 HP-UX
 Tru64 UNIX
 Solaris 8 and earlier

Thread Libraries
 Thread library provides programmer with API for creating and managing threads
 Two primary ways of implementing
 Library entirely in user space
 Kernel-level library supported by the OS
Pthreads
 May be provided either as user-level or kernel-level
 A POSIX standard (IEEE 1003.1c) API for thread creation and synchronization
 API specifies behavior of the thread library, implementation is up to development of the
library
 Common in UNIX operating systems (Solaris, Linux, Mac OS X)
Java Threads
 Java threads are managed by the JVM
 Typically implemented using the threads model provided by underlying OS
 Java threads may be created by: Extending Thread class
 Implementing the Runnable interface
Threading Issues
 Semantics of fork() and exec() system calls
 Thread cancellation of target thread
 Asynchronous or deferred
 Signal handling
 Thread pools
 Thread-specific data
 Scheduler activations
Thread Cancellation
 Terminating a thread before it has finished
 Two general approaches:
 Asynchronous cancellation terminates the target thread immediately
 Deferred cancellation allows the target thread to periodically check if it should be
cancelled
Signal Handling
 Signals are used in UNIX systems to notify a process that a particular event has
occurred
 A signal handler is used to process signals
 1.Signal is generated by particular event
 2.Signal is delivered to a process
 3.Signal is handled
 Options:
 Deliver the signal to the thread to which the signal applies
 Deliver the signal to every thread in the process
 Deliver the signal to certain threads in the process
 Assign a specific threa to receive all signals for the process
Thread Pools
 Create a number of threads in a pool where they await work
 Advantages:
 Usually slightly faster to service a request with an existing thread than create a new
thread
 Allows the number of threads in the application(s) to be bound to the size of the pool
Thread Specific Data
 Allows each thread to have its own copy of data
 Useful when you do not have control over the thread creation process (i.e., when using
a thread pool)
Scheduler Activations
 Both M:M and Two-level models require communication to maintain the appropriate
number of kernel threads allocated to the application
 Scheduler activations provide upcalls - a communication mechanism from the kernel to
the thread library
 This communication allows an application to maintain the correct number kernel
threads
Windows XP Threads

Implements the one-to-one mapping, kernel-level


 Each thread contains
 A thread id
 Register set
 Separate user and kernel stacks
 Private data storage area
 The register set, stacks, and private storage area are known as the context of the
threads
 The primary data structures of a thread include:
 ETHREAD (executive thread block)
 KTHREAD (kernel thread block)
 TEB (thread environment block)
Linux Threads

 Linux refers to them as tasks rather than threads


 Thread creation is done through clone() system call
 clone() allows a child task to share the address space of the parent task (process)
CPU Scheduling
 To introduce CPU scheduling, which is the basis for multiprogrammed operating
systems
 To describe various CPU-scheduling algorithms
 To discuss evaluation criteria for selecting a CPU-scheduling algorithm for a particular
system
 Maximum CPU utilization obtained with multiprogramming
 CPU–I/O Burst Cycle – Process execution consists of a cycle of CPU execution and I/O
wait
 CPU burst distribution
Histogram of CPU-burst Times
Alternating Sequence of CPU And I/O Bursts

CPU Scheduler
Selects from among the processes in memory that are ready to execute, and allocates the
CPU to one of them
CPU scheduling decisions may take place when a process:
1. Switches from running to waiting state
2. Switches from running to ready state
3. Switches from waiting to ready
4. Terminates
Scheduling under 1 and 4 is nonpreemptive
All other scheduling is preemptive
Dispatcher
 Dispatcher module gives control of the CPU to the process selected by the short-term
scheduler; this involves:
 switching context
 switching to user mode
 jumping to the proper location in the user program to restart that program
 Dispatch latency – time it takes for the dispatcher to stop one process and start
another running
Scheduling Criteria
 CPU utilization – keep the CPU as busy as possible
 Throughput – # of processes that complete their execution per time unit
 Turnaround time – amount of time to execute a particular process
 Waiting time – amount of time a process has been waiting in the ready queue
 Response time – amount of time it takes from when a request was submitted until the
first response is produced, not output (for time-sharing environment)
 Max CPU utilization
 Max throughput
 Min turnaround time
 Min waiting time
 Min response time
First-Come, First-Served (FCFS) Scheduling
Process Burst Time
P1 24
P2 3
P3 3
Suppose that the processes arrive in the order: P1 , P2 , P3
The Gantt Chart for the schedule is:

P1 P2 P3

0 24 27 30

Waiting time for P1 = 0; P2 = 24; P3 = 27


Average waiting time: (0 + 24 + 27)/3 = 17
Suppose that the processes arrive in the order
P2 , P3 , P1
The Gantt chart for the schedule is:Waiting time for P1 = 6; P2 = 0; P3 = 3Average
waiting time: (6 + 0 + 3)/3 = 3
Much better than previous case
Convoy effect short process behind long process

P2 P3 P1

0 3 6 30
Shortest-Job-First (SJF) Scheduling

 Associate with each process the length of its next CPU burst. Use these lengths to
schedule the process with the shortest time
 SJF is optimal – gives minimum average waiting time for a given set of processes
The difficulty is knowing
Process Arrival Time Burst Time

P1 0.0 6
P2 2.0 8
P3 4.0 7
P4 5.0 3
SJF scheduling chart
verage waiting time = (3 + 16 + 9 + 0) / 4 = 7the length of the next CPU request

P4 P1 P3 P2

0 3 9 16 24

1. t n  actual length of n th CPU burst


2.  n 1  predicted value for the next CPU burst
3.  , 0    1
4. Define :
Determining Length of Next CPU Burst
 Can only estimate the length
 Can be done by using the length of previous CPU bursts, using exponential averaging
Prediction of the Length of the Next CPU Burst
Examples of Exponential Averaging
a =0
tn+1 = tn
Recent history does not count
a =1
tn+1 = a tn
Only the actual last CPU burst counts
If we expand the formula, we get:
tn+1 = a tn+(1 - a)a tn -1 + …
+(1 - a )j a tn -j + …
+(1 - a )n +1 t0
Since both a and (1 - a) are less than or equal to 1, each successive term has less weight
than its predecessor
Priority Scheduling
 A priority number (integer) is associated with each process
 The CPU is allocated to the process with the highest priority (smallest integer º highest
priority)
 Preemptive
 nonpreemptive
 SJF is a priority scheduling where priority is the predicted next CPU burst time
 Problem º Starvation – low priority processes may never execute
 Solution º Aging – as time progresses increase the priority of the process
Round Robin (RR)

 Each process gets a small unit of CPU time (time quantum), usually 10-100
milliseconds. After this time has elapsed, the process is preempted and added to the
end of the ready queue.
 If there are n processes in the ready queue and the time quantum is q, then each
process gets 1/n of the CPU time in chunks of at most q time units at once. No process
waits more than (n-1)q time units.
 Performance
 q large Þ FIFO
 q small Þ q must be large with respect to context switch, otherwise overhead is too high
Example of RR with Time Quantum = 4
Process Burst Time
P1 24
P2 3
P3 3

The Gantt chart is:

P1 P2 P3 P1 P1 P1 P1 P1

0 4 7 10 14 18 22 26 30
Typically, higher average turnaround than SJF, but better response

Time Quantum and Context Switch Time

Turnaround Time Varies With The Time Quantum


Multilevel Queue
 Ready queue is partitioned into separate queues:
foreground (interactive)
background (batch)
 Each queue has its own scheduling algorithm
 foreground – RR
 background – FCFS
 Scheduling must be done between the queues
 Fixed priority scheduling; (i.e., serve all from foreground then from background).
Possibility of starvation.
 Time slice – each queue gets a certain amount of CPU time which it can schedule
amongst its processes; i.e., 80% to foreground in RR
20% to background in FCFS

Multilevel Queue Scheduling

Multilevel Feedback Queue


 A process can move between the various queues; aging can be implemented this way
 Multilevel-feedback-queue scheduler defined by the following parameters:
 number of queues
 scheduling algorithms for each queue
 method used to determine when to upgrade a process
 method used to determine when to demote a process
method used to determine which queue a process will enter when that process needs service
Example of Multilevel Feedback Queue
Three queues:
 Q0 – RR with time quantum 8 milliseconds
 Q1 – RR time quantum 16 milliseconds
 Q2 – FCFS
 Scheduling
 A new job enters queue Q0 which is served FCFS. When it gains CPU, job receives 8
milliseconds. If it does not finish in 8 milliseconds, job is moved to queue Q1.
 At Q1 job is again served FCFS and receives 16 additional milliseconds. If it still does
not complete, it is preempted and moved to queue Q2.
Multilevel Feedback Queues

Thread Scheduling
 Distinction between user-level and kernel-level threads
 Many-to-one and many-to-many models, thread library schedules user-level threads to
run on LWP
 Known as process-contention scope (PCS) since scheduling competition is within the
process
 Kernel thread scheduled onto available CPU is system-contention scope (SCS) –
competition among all threads in system
Pthread Scheduling
 API allows specifying either PCS or SCS during thread creation
 PTHREAD SCOPE PROCESS schedules threads using PCS scheduling
 PTHREAD SCOPE SYSTEM schedules threads using SCS scheduling.
Pthread Scheduling API
#include <pthread.h>
#include <stdio.h>
#define NUM THREADS 5
int main(int argc, char *argv[])
{
int i; pthread t tid[NUM THREADS];
pthread attr t attr;
/* get the default attributes */
pthread attr init(&attr);
/* set the scheduling algorithm to PROCESS or SYSTEM */
pthread attr setscope(&attr, PTHREAD SCOPE SYSTEM);
/* set the scheduling policy - FIFO, RT, or OTHER */
pthread attr setschedpolicy(&attr, SCHED OTHER);
/* create the threads */
for (i = 0; i < NUM THREADS; i++)
pthread create(&tid[i],&attr,runner,NULL);
/* now join on each thread */
for (i = 0; i < NUM THREADS; i++)
pthread join(tid[i], NULL);
}
/* Each thread will begin control in this function */
void *runner(void *param)
{
printf("I am a thread\n");
pthread exit(0);
}

Multiple-Processor Scheduling
 CPU scheduling more complex when multiple CPUs are available
 Homogeneous processors within a multiprocessor
 Asymmetric multiprocessing – only one processor accesses the system data
structures, alleviating the need for data sharing
 Symmetric multiprocessing (SMP) – each processor is self-scheduling, all
processes in common ready queue, or each has its own private queue of ready
processes
 Processor affinity – process has affinity for processor on which it is currently running
 soft affinity
 hard affinity
NUMA and CPU Scheduling

Multicore Processors
 Recent trend to place multiple processor cores on same physical chip
 Faster and consume less power
 Multiple threads per core also growing
 Takes advantage of memory stall to make progress on another thread while memory
retrieve happens

Multithreaded Multicore System

Operating System Examples


 Solaris scheduling
 Windows XP scheduling
 Linux scheduling
Solaris Dispatch Table
Solaris Scheduling

Windows XP Priorities

Linux Scheduling
 Constant order O(1) scheduling time
 Two priority ranges: time-sharing and real-time
 Real-time range from 0 to 99 and nice value from 100 to 140
Priorities and Time-slice length

List of Tasks Indexed According to Priorities

Algorithm Evaluation
 Deterministic modeling – takes a particular predetermined workload and defines the
performance of each algorithm for that workload
 Queueing models
 Implementation
Evaluation of CPU schedulers by Simulation
UNIT 3
What is a semaphore? Explain how semaphores can be used to deal with
n-process critical section.
Ans: semaphore is a hardware-based solution to the critical section problem.
A Semaphore S is a integer variable that, apart from initialization is accessed only
through two standard atomic operations: wait() and signal().
The wait () operation is termed as P and signal () was termed as V
Definition of wait () is
Wait (S) {
While S <= 0
; S--;
}
Definition of signal () is
Signal (S) {
S++;
}
All modifications to the integer value of the semaphore in the wait () and signal()
operations must be executed indivisibly, that is when one process modifies the
semaphore value, no other process can simultaneously modify that same semaphore
value.
Usage:
Operating systems often distinguish between counting and binary semaphores. The
value of counting semaphore can range over an unrestricted domain and the binary
semaphore also known as mutex locks which provide mutual exclusion can range only
between 0 and 1. Binary semaphores are used to deal with critical-section problem for
multiple processes as n processes share a semaphore mutex initialized to 1.
do {
Wait (mutex) ;
// critical section
Signal (mutex);
// remainder section
} while (TRUE);
Counting semaphores can be used to control access to a given resource consisting of a
finite number of instances. Each process that wishes to use a resource performs a wait
() operation on the semaphore. When the count for the semaphore goes to 0, all
resources are being used. And the process that wish to use a resource will block until
the count becomes greater than 0.

Implementation:
The main disadvantage of the semaphore is that it requires busy waiting. Busy waiting
wastes CPU cycles that some other process might be able to use productively. This
type of semaphore is also called a spinlock because the process spins while waiting for
the lock. To overcome the need for busy waiting, we can modify the definition of wait
() and Signal () semaphore operations.
When the process executes the wait () operation and finds that the semaphore
value is not positive it must wait. Rather that engaging in busy waiting the process can
block itself. The block operation places a process into a waiting queue associated with
the semaphore and the state of the process is switched to the waiting state.
The process that is blocked waiting on a semaphore S should be restarted when
some other process executes a signal () operation, the process is restarted by a wakeup
() operation.
Definition of semaphore as a C struct
typedef struct {
int value;
struct process *list;
} semaphore;
Each semaphore has an integer value and a list of processes list. When a process
must wait on a semaphore, it is added to the list of processes. A signal() operation
remove one process from the list of waiting processes and awakens that process.
Wait () operation can be defined as
Wait (semaphore *s) {
S->value--;
If (s->value <0) {
Add this process to S->list;
block (); } }
Signal operation can be defined as
Signal (semaphore *S) {
S->value++;
If (S-> value <=0) {
Remove a process P from S-> list;
Wakeup (P); } }
The block () operation suspends the process that invokes it. The wakeup () operation
resumes the execution of a blocked process P.
This is a critical section problem and in a single processor environment we can solve
it by simply inhibiting interrupts during the time the wait () and signal () operations
are executing and this works in single processor. Where as in multi processor
environment interrupts must be disabled on every processor.
Deadlock and Starvation:
The implementation of semaphore with a waiting queue may result in a satiation
where two more processes are waiting indefinitely for an event that can be caused
only by one of the waiting processes. When such a state is reached that process are
said to be deadlocked.
P0 p1
Wait(S); wait(Q);
Wait(Q); Wait(S);
. .
. .
. .
Signal( S); Signal (Q);
Signal (Q); Signal (S);
P0 executes wait (S) and then P1 executes wait (Q). When p0 executes wait (Q), it
must wait until p1 executes Signal (Q) in the same way P1 must wait until P0
executes signal (S). So p0 and p1 are deadlocked.
The other problem related to deadlocks is indefinite blocking or starvation, a situation
where processes wait indefinitely within the semaphore.
Priority inversion:
Scheduling challenges arises when a higher priority process needs to read or modify
kernel data that are currently used by lower priority process. This problem is known as
priority inversion and it occurs in systems with more than two priorities and this can
be solved by implementing priority- inheritance protocol. According to this, all
processes that are accessing resources needed by a higher priority process inherit the
higher priority until they are finished with the resources.

1. What is deadlock? What are the necessary conditions of deadlock?


Ans: A process requests resources, if the resources are not available at that time; the
process enters a waiting state. Sometimes a waiting process is never again able to
change state, because the resources it has requested are held by other waiting
processes. This situation is called a deadlock.
Necessary conditions of deadlock or deadlock characterization:
A deadlock situation can rise if the following four conditions hold simultaneously in a
system:
1. Mutual exclusion: At least one resource must be held in a non-sharable mode, that
is, only one processes at a time can use the resource. If another process requests
that resource, the requesting process must be delayed until the resources have been
released.
2. Hold and wait: A process must be holding at least one resource and waiting to
acquire additional resources that are currently being held by other processes.
3. No pre-emption: Resources cannot be pre-empted; that is, resources can be
released only voluntarily by the process holding it, after that process has completed
its task.
4. Circular wait: A set {p0,p1,p2....} of waiting processes must exist such that p0 is
waiting for a resource held by p1, p1 is waiting for a resource held by p2,....pn-1 is
waiting for a resource held by pn, and pn is waiting for a resource held by p0.

2. Explain a deadlock situation with resource allocation graph?


Ans: deadlocks can be described in terms of a directed graph called a system
resources-allocation graph. This graph consists of A set of vertices V and a set of
edges E.
V is partitioned into two types of nodes:
● P = {P1, P2, …, Pn}, the set consisting of all the processes in the system.
● R = {R1, R2, …, Rm}, the set consisting of all resource types in the system.
A directed edge from process Pi to resource type Rj is denoted by Pi->Rj is called as
requesting edge and it signifies that process Pi has requested an instance type Rj and
is currently waiting for that resource.
A directed edge Pi -> Rj is called a assignment edge, it signifies that resource type
Rj has been allocated to process Pi
Process Pi is represented as Circle
And each resource type Rj is represented as a rectangle
And since each resource type Rj can have more than one instance represented each
such instance as a dot with in the rectangle
.
Example of a Resource Allocation Graph
R1 R3
. .

P1 R2 P2 R4 P3
.
. .
 Process P1 is holding an instance of resource type R2 and is waiting for an
. .
instance of resource type R1
 Process p2 is holding an instance of R1 and an instance of R2 and is waiting
for an instance of R3
 Process P3 is holding an instance of R3
If the graph contains no cycles then no process in the system is deadlocked. If the
graph contains a cycle then a deadlock may exist.
If each resource type has exactly one instance, then a cycle implies that a deadlock
had occurred. If each resource type has several instances, then a cycle does not
necessarily imply that a deadlock has occurred.
R1 R3
. .

P1 R2 P2 P3

R4
.
.
.
.
.
In the above example the process P3 requests an instance of resource type R2, and
no resource instance is available, a request edge P3->R2 is added to the graph. At
this point two minimal cycles exist in the system
P1->R1->P2->R3->P3->R2->P1
P2->R3->P3->R2->P2
Processes P1, P2 and P3 are deadlocked R1
.
P2
.

P1

P3
R2
.
.
P4no deadlock.
In the above example there is a cycle but
P1->R1->P3->R2->P1
Process P4 may release its instance of resource type R2 and that resource can
be allocated to P3 breaking the cycle.

3. What are the methods to handle and prevent deadlock?


Ans:
 Ensure that the system will never enter a deadlock state
 Allow the system to enter a deadlock state and then recover
 Ignore the problem and pretend that deadlocks never occur in the system
 used by most operating systems, including UNIX and Windows

For a deadlock to occur each of the four necessary conditions must hold. By
ensuring that at least one of these conditions cannot hold, we can prevent the
occurrence of deadlock.
Mutual Exclusion – not required for sharable resources and read only files are a
good example of sharable resources but must hold for non-sharable resources.
Hold and Wait – must guarantee that whenever a process requests a resource, it
does not hold any other resources
1. Require process to request and be allocated all its resources before it begins
execution, or
2. Allow process to request resources only when the process has none – it must
release its current resources before requesting them back again
Disadvantages: –
Resource utilization may be low since resources may be allocated but unused for
long period
Starvation is possible. A process that needs several popular resources may have to
wait indefinitely, because at least one of the resources that it needs is always
allocated to some other process.
No Preemption –
 If a process, that is holding some resources, does request another resource
that cannot be immediately allocated to it, then all its resources currently
being held are released
 Preempted resources are added to the list of resources for which the process
is waiting
 Process will be restarted only when it can regain its old resources, as well
as the new ones that it is requesting
This process is often applied to resources whose state can be easily saved and
restored later such as CPU registers and memory space.
Circular Wait – impose a total ordering of all resource types
 require that each process requests resources in an increasing order of
enumeration, or release resources of higher or equal order 
 Several instances of one resource type must be requested in a single
request
 a witness may detect a wrong order and emit a warning
 Lock ordering does not guarantee deadlock prevention if locks can be
acquired dynamically.
4. Deadlock Avoidance
Ans: Avoiding deadlocks requires additional information about how resources
are to be requested. The most simple and useful model requires that each process
declare maximum number of resources of each type that it may need. With this
prior information it is possible to construct an algorithm that ensures the system
will never enter into deadlock state.
Deadlock- avoidance algorithm dynamically examines the
resource allocation state o ensure that a circular wait condition can never exist
and resource allocation state is defined by the number of available and allocated
resources and the maximum demands of the process.
Safe state:
A state is safe if the system can allocate resources to each process in some order
and still avoid a deadlock. A system is in a safe state if there exists a safe
sequence.
When a process requests an available resource, system must decide if immediate
allocation leaves the system in a safe state.
Sequence is safe if for each Pi, the resources that Pi can still request, can be
satisfied by currently available resources + resources held by all the Pj, with j < i
Formally, there is a safe sequence such that for all i = 1, 2, ..., n,
Available + Σ1≤ k ≤ i (Allocatedk) ≥ MaxNeedi
1. If Pi resource needs are not immediately available, then P can wait until all
P (j < i) have finished.
2. When Pj (j < i) is finished, Pi can obtain needed resources, execute, return
allocated resources, and terminate.
3. When Pi terminates, Pi+1 can obtain its needed resources, and so on.
A safe state is not a deadlocked state. A deadlocked state is an unsafe state and not
all unsafe states are deadlocks. As long as the state is safe, the operating system acn
avoid unsafe states.

Unsafe
deadlock

Safe
Resource- Allocation- Graph Algorithm
If we have a resource-allocation system with only one instance of each
resource, we use a variant of the resource- allocation graph for deadlock
avoidance called claim edge
 Claim edge Pi → Rj indicated that process Pj may request resource Rj;
represented by a dashed line.
 Request edge Pi Rj when a process requests a resource.
 When a resource is released by a process, assignment edge Rj → Pi
reconverts to a claim edge Pi → Rj.
Resources must be claimed a priori in the system. Grant a request only if no
cycle created. R1

Request edge
Assignement edge
R2
P1 ------- ---------------- P2

Claim edge
Resource- allocation graph for deadlock avoidance

The requesting edge can be granted only if converting the request edge Pi->Rj
to an assignment edge Rj->Pi does not result in the formation of a cycle in the
resource allocation graph. Cycle – detection algorithm is used to check the
safety. To detect a cycle in this graph requires an order of n 2 operations where
n is the number of processes in the system.
If no cycle exists, then the allocation of the resource will leave the system in a
safe state. If a cycle is found then the allocation will put the system in unsafe
state. R1

Unsafe state in a resource- allocation graph


R2 P2
P1
------- R2
Bankers Algorithm
 Bankers Algorithm is applicable to systems having multiple instances
but it is less efficient than the resource allocation graph.
 When a new process enters the system, it must declare the maximum
number of instances of each resource type that it may need.
 This number must not exceed the total number of resources available in
the system
 Allocation of resources is done to a requesting process until the process
leaves system is in safe state.
Several data structures must be maintained to implement the banker’s
algorithm.
Let n = number of processes, and m = number of resources types.
 Available: Vector of length m. If available [j] = k, there are k instances
of resource type Rj available.
 Max: n x m matrix. If Max [i,j] = k, then process Pi may request at most
k instances of resource type R request at most k instances of resource
type Rj .
 Allocation: n x m matrix. If Allocation[i,j] = k then Pi is currently
allocated k instances of Rj.
 Need: n x m matrix. If Need [i,j] = k, then Pi may need k more instances
of Rj to complete its task.
Need[ i, j] = Max[ i, j]- Allocation [ i, j]
Safety Algorithm
This algorithm is used to find out whether or not a system is in a safe state.
Let Work and Finish be vectors of length m and n, respectively.
Initialize: Work = Available Finish [ i] = false for i = 0, 1, …, n-1. 2.
Find an i such that both:
(a) Finish [ i] = false
(b) Needi ≤ Work
If no such i exists, go to step 4.
3. Work = Work + Allocation
Finish [ i] = true
go to step 2.
4. If Finish [ i] == true for all i, then the system is in a safe state.
This algorithm requires an order of m x n2 operations to determine whether a state is
safe.
Resource Resource-Request Algorithm
Request = request vector for process Pi. If Requesti [j] = k then process Pi wants k
instances of resource type Rj.
1. If Requesti ≤ Needi go to step 2. Otherwise, raise error condition, since process
has exceeded its maximum claim.
2. 2. If Requesti ≤ Available, go to step 3. Otherwise Pi must wait, since resources
are not available.
3. Pretend to allocate requested resources to Pi by modifying the state as follows:
Available = Available - Requesti;
Allocationi = Allocationi + Requesti;
Needi = Needi – Requesti;
If safe ⇒ the resources are allocated to Pi. If unsafe ⇒ Pi must wait, and the old
resource-allocation state is restored

5. Deadlock Detection
 An algorithm that examines the state of the system to determine whether
a deadlock has occurred
 An algorithm to recover from the deadlock.
Single Instance of Each Resource Type: If all resources have only a
single instance, then we define a deadlock detection algorithm that use a
variant of the resource- allocation graph called a wait- for graph.
 An edge from Pi to Pj in wait- for graph implies that process Pi is
waiting for process Pj to release a resource that Pi needs.
 An edge Pi Pj exists in a wait- for graph if and only if the
corresponding resource- allocation graph contains two edges Pi Rq
and Rq Pj for some resource Rq.
Diagram in page no 302 from text book
Deadlock exists in the system if and only if the wait- for graph
contains a cycle
To detect a cycle in a graph requires an order of n2 operations, where
n is the number of vertices in the graph.
Several Instances of a Resource Type:
 Available: A vector of length m indicates the number of available
resources of each type.
 Allocation: An n x m matrix defines the number of resources of each type
currently allocated to each process.
 Request: An n x m matrix indicates the current request of each process. If
Request [ i j] = k, then process Pi is requesting k more instances of
resource type Rj.
Detection Algorithm
1. Let Work and Finish be vectors of length m and n, respectively Initialize: (a)
Work = Available (b)For i = 1,2, …, n, if Allocationi ≠ 0, then Finish[i] =
false; otherwise, Finish[i] = true.
2. Find an index i such that both:
(a)Finish [ i] == false
(b)Request i ≤ Work If no such i exists, go to step 4
3. Work = Work + Allocationi
Finish [ i] = true
go to step 2.
4. If Finish [i] == false, for some i, 0 ≤ i ≤ n, then the system is in deadlock
state. Moreover, if Finish [i] == false, then P is deadlocked.
This algorithm requires an order of m x n2 operations to detect whether the
system is in deadlocked state.
6. Recovery from Deadlock
Ans: There are two options for breaking a deadlock.
 One is simply to abort one or more processes to break the circular wait.
 Second one is to pre-empt some resources from one or more of the
deadlocked processes.
To eliminate deadlocks by aborting a process, we use one of the two methods.
Process Termination
 Abort all deadlocked processes. This method clearly break the deadlock
cycle, but at great expense
 Abort one process at a time until the deadlock cycle is eliminated: since
after each process is aborted, a deadlock- detection algorithm must be
invoked to determine whether any processes are still deadlocked
 In which order should we choose to abort?
1. Priority of the process.
2. How long process has computed, and how much longer to
completion.
3. Resources the process has used.
4. Resources process needs to complete.
5. How many processes will need to be terminated?
6. Is process interactive or batch?
Resource Preemption
Successively pre-empt some resources and give them to other processes until
the deadlock cycle is broken.
If pre-emption is required to deal with deadlocks, then three issues need to be
addressed.
 selecting a victim: which resources and which processes are to be pre-
empted
1. How to minimize the cost?
2. what types and how many resources are held
3. how much time has run
4. how much time to end
 Rollback: if we pre-empt a resource from a process, what should be
done with that process
1. rollback a process to a safe state, and restart it (some resources are
released)
2. Two implementations –
3. totally rollback: simple but expensive as far as necessary – (OS should
maintain “checkpoints ” )
4. checkpoint: a recording of the state of a process to allow rollback.
 Starvation
Not always select the same process for pre-emption
8. What is address binding. Explain Logical versus and physical address
space?
Ans: After the instruction has been executed on the operands, results may be
stored back into the memory. The memory unit sees only the stream of memory
addresses; it does not known how they are generated and what they are for.
Main memory and the registers built into the processor itself are the only
storage that the CPU can access directly.
Registers that are built into the CPU are generally accessible within one cycle of
the CPU block.
Each process has a separate memory space and range of legal addresses that the
process may access and to ensure that the process can access only these legal
addresses. To ensure this, protection is provided by using two registers called
base and limit register.
The base register holds the smallest legal physical memory address and limit
register specifies the size of the range. The base and limit registers can be
loaded only by the operating system.
Address Binding
Program resides on a memory as an executable file, and that program must be
brought into memory and placed within a process. The processes on the disk
that are waiting to be brought into memory for execution from the input queue.
After the successful execution of process, it terminates and its memory space is
declared available.
Binding of instructions and data to memory addresses can be done at any step:
 Compile Time: If memory location known a priori, absolute code can be
generated; must recompile code if starting location changes.
 Load Time: Must generate relocatable code if memory location is not
known at compile time
 Execution time: Binding delayed until run time if the process can be
moved during its execution from one memory segment to another. Need
hardware support for address maps (e.g., base and limit registers).
Logical Versus Physical Address Space
 Logical address – generated by the CPU; also referred to as virtual
address
 Physical address – address seen by the memory unit, the one loaded into
the memory address register of the memory
 Logical and physical addresses are the same in compile-time and load-
time address-binding schemes; logical (virtual) and physical addresses
differ in execution-time address-binding scheme
 The set of all logical addresses generated by a program is a logical
address space and the set of all physical addresses corresponding to these
physical addresses is a physical address space
 The run- time mapping from virtual to physical addresses is done by a
hardware device called memory- management unit(MMU).
9. What is swapping? Explain in detail.
Ans: A process must be in memory to be executed and can be swapped
temporarily out of memory to a backing store and then brought back into
memory for continued execution
Backing store – fast disk large enough to accommodate copies of all memory
images for all users; must provide direct access to these memory images.
A variant of this swapping policy is used for priority based scheduling
algorithms. If a higher priority process arrives and wants service the memory
manager can swap out the lower priority process and then load and execute the
higher- priority process. This type of swapping called Roll out and Roll in
Roll out, roll in – swapping variant used for priority-based scheduling
algorithms; lower-priority process is swapped out so higher-priority process can
be loaded and executed

Operating
Main system
memory

Swap out
Proces
Backing
s p1
user
Store
space Sswap out Proces
s p2
 The process that is swapped out will be swapped in to the same
memory by the method of address binding
 If binding is done at assembly or load time, then the process
cannot be easily moved to a different location
 In execution time swapped process can be moved into different
memory space.
 The backing store accommodate copies of all memory images
for all users and provides direct access to these memory images
 The system maintains a ready queue consisting of all
processes whose memory images on the backing store or in
memory and are ready to run.
 The dispatcher checks to see whether the next process in the
queue is in memory, if it is not the dispatcher swaps out a
process currently in memory and swaps in the desired process.
 The context- switch time is high
 The total transfer time is directly proportional to the amount of
memory swapped.
 There are other constraints for swapping a process.
 To swap a process it should be completely idle.
The two main solutions for this problem is never swap a process with
Pending I/O , or execute I/O operations only into operating system
buffers.
SEGMENTATION
A programmer thinks of it as a main program with a set of methods,
procedures, or functions. It may also include various data structures: objects,
arrays, stacks, variables, and so on and these modules or data elements is
referred to by name. Segments vary in length, and the length of each is
intrinsically defined by its purpose in the program. Elements within a segment
are identified by their offset from the beginning of the segment. Segmentation
is a memory-management scheme that supports the programmer view of
memory. A logical address space is a collection of segments.

Each segment has a name and a length. The programmer therefore specifies
each address by two quantities: a segment name and an offset. For simplicity of
implementation, segments are numbered and are referred to by a segment
number, rather than by a segment name. Thus, a logical address consists of a
two tuple: . Normally, when a program is compiled, the compiler automatically
constructs segments reflecting the input program.

SEGMENTATION HARDWARE
Segmentation Hardware although the programmer can now refer to objects in
the program by a two-dimensional address, the actual physical memory is still,
of course, a one dimensional sequence of bytes. Thus, we must define an
implementation to map two-dimensional user-defined addresses into one-
dimensional physical addresses. This mapping is effected by a segment table.
Each entry in the segment table has a segment base and a segment limit. The
segment base contains the starting physical address where the segment resides
in memory, and the segment limit specifies the length of the segment

The use of a segment table is illustrated in Figure. A logical address consists of


two parts: a segment number, s, and an offset into that segment, d. The
segment number is used as an index to the segment table. The offset d of the
logical address must be between 0 and the segment limit. If it is not, we trap to
the operating system (logical addressing attempt beyond end of segment).
When an offset is legal, it is added to the segment base to produce the address
in physical memory of the desired byte. The segment table is thus essentially
an array of base–limit register pairs.

Advantages of Segmentation

1. No internal fragmentation
2. Average Segment Size is larger than the actual page size.
3. Less overhead
4. It is easier to relocate segments than entire address space.
5. The segment table is of lesser size as compare to the page table in paging.

Disadvantages

1. It can have external fragmentation.


2. It is difficult to allocate contiguous memory to variable sized partition.
3. Costly memory management algorithms

Paging:
Segmentation permits the physical address space of a process to be
noncontiguous. Paging is another memory-management scheme that offers this
advantage. However, paging avoids external fragmentation and the need for
compaction. It also solves the considerable problem of fitting memory chunks
of varying sizes onto the backing store. Paging is implemented through
cooperation between the operating system and the computer hardware.
Basic Method :
The basic method for implementing paging involves breaking physical
memory into fixed-sized blocks called frames and breaking logical memory
into blocks of the same size called pages. When a process is to be executed, its
pages are loaded into any available memory frames from their source (a file
system or the backing store). The backing store is divided into fixed-sized
blocks that are the same size as the memory frames or clusters of multiple
frames.

The hardware support for paging is illustrated in Figure:

Every address generated by the CPU is divided into two parts: a page number
(p) and a page. offset (d). The page number is used as an index into a page
table. The page table contains the base address of each page in physical
memory. This base address is combined with the page offset to define the
physical memory address that is sent to the memory unit.
The paging model of memory is shown in Figure:
The page size (like the frame size) is defined by the hardware. The size of a
page is a power of 2, varying between 512 bytes and 1 GB per page, depending
on the computer architecture. The selection of a power of 2 as a page size
makes the translation of a logical address into a page number and page offset
particularly easy. If the size of the logical address space is 2m, and a page size
is 2n bytes, then the high-order m − n bits of a logical address designate the
page number, and the n low-order bits designate the page offset. Thus, the
logical address is as follows:

page number page offset


p d
m -n n
where p is an index into the page table and d is the displacement within the
page.
Paging itself is a form of dynamic relocationWhen we use a paging scheme, we
have no external fragmentation: any free frame can be allocated to a process
that needs it. However, we may have some internal fragmentation. If process
size is independent of page size, we expect internal fragmentation to average
one-half page per process.

Free frames (a) before allocation and (b) after When a process
arrives in the system to be executed, its size, expressed in pages, is examined.
Each page of the process needs one frame. Thus, if the process requires n
pages, at least n frames must be available in memory. If n frames are available,
they are allocated to this arriving process. The first page of the process is
loaded into one of the allocated frames, and the frame number is put in the
page table for this process. The next page is loaded into another frame, its
frame number is put into the page table, and so on.
An important aspect of paging is the clear separation between the
programmer’s view of memory and the actual physical memory. The
programmer views memory as one single space, containing only this one
program. The difference between the programmer’s view of memory and the
actual physical memory is reconciled by the address-translation hardware. The
logical addresses are translated into physical addresses. This mapping is hidden
from the programmer and is controlled by the operating system.
Since the operating system is managing physical memory, it must be aware of
the allocation details of physical memory—which frames are allocated, which
frames are available, how many total frames there are, and so on. This
information is generally kept in a data structure called a frame table. The frame
table has one entry for each physical page frame, indicating whether the latter
is free or allocated and, if it is allocated, to which page of which process or
processes.
The operating system maintains a copy of the page table for each process, just
as it maintains a copy of the instruction counter and register contents. This
copy is used to translate logical addresses to physical addresses whenever the
operating system must map a logical address to a physical address manually.
Paging therefore increases the context-switch time.
Hardware Support:
Each operating system has its own methods for storing page tables. The
hardware implementation of the page table can be done in several ways. In the
simplest case, the page table is implemented as a set of dedicated registers.
These registers should be built with very high-speed logic to make the paging-
address translation efficient. Every access to memory must go through the
paging map, so efficiency is a major consideration. The CPU dispatcher
reloads these registers, just as it reloads the other registers.
The page table is kept in main memory, and a page-table base register (PTBR)
points to the page table. Changing page tables requires changing only this one
register, substantially reducing context-switch time. The problem with this
approach is the time required to access a user memory location. The standard
solution to this problem is to use a special, small, fastlookup hardware cache
called a translation look-aside buffer (TLB). The TLB is associative, high-
speed memory. Each entry in the TLB consists of two parts: a key (or tag) and
a value. When the associative memory is presented with an item, the item is
compared with all keys simultaneously. If the item is found, the corresponding
value field is returned. The search is fast. If the page number is not in the TLB
(known as a TLB miss), a memory reference to the page table must be made.
Depending on the CPU, this may be done automatically in hardware or via an
interrupt to the operating system. When the frame number is obtained, we can
use it to access memory.

Figure: Paging hardware with TLB


In addition, we add the page number and frame number to the TLB, so that
they will be found quickly on the next reference. The percentage of times that
the page number of interest is found in the TLB is called the hit ratio.
Protection:
Memory protection in a paged environment is accomplished by protection bits
associated with each frame. Normally, these bits are kept in the page table. One
bit can define a page to be read–write or read-only. Every reference to memory
goes through the page table to find the correct frame number. An attempt to
write to a read-only page causes a hardware trap to the operating system (or
memory-protection violation).
One additional bit is generally attached to each entry in the page table: a valid–
invalid bit. When this bit is set to valid, the associated page is in the process’s
logical address space and is thus a legal (or valid) page. When the bit is set to
invalid, the page is not in the process’s logical address space. Illegal addresses
are trapped by use of the valid–invalid bit.

Figure: Valid (v) or invalid (i) bit in a page table.


Shared Pages: An advantage of paging is the possibility of sharing common
code. This consideration is particularly important in a time-sharing

environment.

Figure: Sharing of code in a paging environment.


UNIT-5

Demand paging:
 To be simple in demand paging the entire process should be in the disk in
the form of pages
 In this technique a page is brought into memory for its execution only
when it is demanded
 It is a combination of paging and swapping

Here in the above diagram all the pages are loaded into backing store (hard disk).
By the mechanism of swapping when the main memory requests the page
Only then it is loaded from hard disk
As main memory is small in size and cannot handle large programs only few
pages are loaded into main memory after completing its execution it is swapped
out simply and new process is then swapped in..
UNIT-5

Basic Concepts :
When a process is to be swapped in, the pager guesses which pages will be used
before the process is swapped out again. Instead of swapping in a whole process,
the pager brings only those pages into memory. Thus, it avoids reading into
memory pages that will not be used anyway, decreasing the swap time and the
amount of physical memory needed. With this scheme, we need some form of
hardware support to distinguish between the pages that are in memory and the
pages that are on the disk. The valid–invalid bit scheme can be used for this
purpose. This time, however, when this bit is set to “valid,” the associated page
is both legal and in memory. If the bit is set to “invalid,” the page either is not
valid (that is, not in the logical address space of the process) or is valid but is
currently on the disk. The page-table entry for a page that is brought into
memory is set as usual, but the page-table entry for a page that is not currently
in memory is either simply marked invalid or contains the address of the page
on disk.
Marking a page invalid will have no effect if the process never attempts to
access that page.

Figure: Page table when some pages are not in main memory
UNIT-5

Figure: Steps in handling a page fault


But what happens if the process tries to access a page that was not brought into
memory? Access to a page marked invalid causes a page fault. The paging
hardware, in translating the address through the page table, will notice that the
invalid bit is set, causing a trap to the operating system. This trap is the result of
the operating system’s failure to bring the desired page into memory. The
procedure for handling this page fault is straightforward.
1. We check an internal table (usually kept with the process control block) for
this process to determine whether the reference was a valid or an invalid
memory access.
2. If the reference was invalid, we terminate the process. If it was valid but we
have not yet brought in that page, we now page it in.
3. We find a free frame (by taking one from the free-frame list, for example).
4. We schedule a disk operation to read the desired page into the newly
allocated frame.
5. When the disk read is complete, we modify the internal table kept with the
process and the page table to indicate that the page is now in memory. 6. We
UNIT-5

restart the instruction that was interrupted by the trap. The process can now
access the page as though it had always been in memory.
In the extreme case, we can start executing a process with no pages in memory.
When the operating system sets the instruction pointer to the first instruction of
the process, which is on a non-memory-resident page, the process immediately
faults for the page. After this page is brought into memory, the process
continues to execute, faulting as necessary until every page that it needs is in
memory. At that point, it can execute with no more faults. This scheme is pure
demand paging: never bring a page into memory until it is required.
The hardware to support demand paging is the same as the hardware for paging
and swapping:
• Page table. This table has the ability to mark an entry invalid through a valid–
invalid bit or a special value of protection bits.
• Secondary memory. This memory holds those pages that are not present in
main memory. The secondary memory is usually a high-speed disk. It is known
as the swap device, and the section of disk used for this purpose is known as
swap space.
A crucial requirement for demand paging is the ability to restart any instruction
after a page fault. Because we save the state (registers, condition code,
instruction counter) of the interrupted process when the page fault occurs, we
must be able to restart the process in exactly the same place and state, except
that the desired page is now in memory and is accessible. A page fault may
occur at any memory reference. If the page fault occurs on the instruction fetch,
we can restart by fetching the instruction again. If a page fault occurs while we
are fetching an operand, we must fetch and decode the instruction again and
then fetch the operand.
Advantages :
 Reduces memory requirement
 Swap time is also reduced.
UNIT-5

 increases the degree of multiprogramming(cpu utilization time increases )

Disadvantages:
 Page fault rate increases for bigger programs .
 If the size of swap file is big it is difficult for main memory

Thrashing:
Look at any process that does not have “enough” frames. If the process
does not have the number of frames it needs to support pages in active use, it
will quickly page-fault. At this point, it must replace some page. However,
since all its pages are in active use, it must replace a page that will be needed
again right away. Consequently, it quickly faults again, and again, and again,
replacing pages that it must bring back in immediately. This high paging
activity is called thrashing. A process is thrashing if it is spending more time
paging than executing.
Cause of Thrashing :
Thrashing results in severe performance problems.
The operating system monitors CPU utilization. If CPU utilization is too low,
we increase the degree of multiprogramming by introducing a new process to
the system. A global page-replacement algorithm is used; it replaces pages
without regard to the process to which they belong. Now suppose that a
process enters a new phase in its execution and needs more frames. It starts
faulting and taking frames away from other processes. These processes need
those pages, however, and so they also fault, taking frames from other
processes. These faulting processes must use the paging device to swap pages
in and out. As they queue up for the paging device, the ready queue empties.
As processes wait for the paging device, CPU utilization decreases. The CPU
scheduler sees the decreasing CPU utilization and increases the degree of
multiprogramming as a result. The new process tries to get started by taking
frames from running processes, causing more page faults and a longer queue
for the paging device. As a result, CPU utilization drops even further, and the
CPU scheduler tries to increase the degree of multiprogramming even more.
Thrashing has occurred, and system throughput plunges. The pagefault rate
increases tremendously. As a result, the effective memory-access time
increases. No work is getting done, because the processes are spending all their
time paging.
UNIT-5

This phenomenon is illustrated in Figure, in which CPU utilization is


plotted against the degree of multiprogramming. As the degree of
multiprogramming increases, CPU utilization also increases, although more
slowly, until a maximum is reached. If the degree of multiprogramming is
increased even further, thrashing sets in, and CPU utilization drops sharply. At
this point, to increase CPU utilization and stop thrashing, we must decrease the
degree of multiprogramming.

Figure: Thrashing
We can limit the effects of thrashing by using a local replacement
algorithm (or priority replacement algorithm). With local replacement, if one
process starts thrashing, it cannot steal frames from another process and cause
the latter to thrash as well. However, the problem is not entirely solved. If
processes are thrashing, they will be in the queue for the paging device most of
the time. The average service time for a page fault will increase because of the
longer average queue for the paging device. Thus, the effective access time
will increase even for a process that is not thrashing. To prevent thrashing, we
must provide a process with as many frames as it needs.
we can know how many frames it “needs” by several techniques. The
working-set strategy starts by looking at how many frames a process is actually
using. This approach defines the locality model of process execution. The
locality model states that, as a process executes, it moves from locality to
locality. A locality is a set of pages that are actively used together. A program
is generally composed of several different localities, which may overlap. For
example, when a function is called, it defines a new locality. In this locality,
UNIT-5

memory references are made to the instructions of the function call, its local
variables, and a subset of the global variables. When we exit the function, the
process leaves this locality, since the local variables and instructions of the
function are no longer in active use. We may return to this locality later. we see
that localities are defined by the program structure and its data structures. The
locality model states that all programs will exhibit this basic memory reference
structure.
We allocate enough frames to a process to accommodate its current
locality. It will fault for the pages in its locality until all these pages are in
memory; then, it will not fault again until it changes localities. If we do not
allocate enough frames to accommodate the size of the current locality, the
process will thrash, since it cannot keep in memory all the pages that it is
actively using.
Page-Fault Frequency:
The working-set model is successful, and knowledge of the working set can be
useful for prepaging , but it seems a clumsy way to control thrashing. A
strategy that uses the page-fault frequency (PFF) takes a more direct approach.
The specific problem is how to prevent thrashing. Thrashing has a high page-
fault rate. Thus, we want to control the page-fault rate. When it is too high, we
know that the process needs more frames. Conversely, if the page-fault rate is
too low, then the process may have too many frames. We can establish upper
and lower bounds on the desired page-fault rate. If the actual page-fault rate
exceeds the upper limit, we allocate the process another frame. If the page-fault
rate falls below the lower limit, we remove a frame from the process. Thus, we
can directly measure and control the page-fault rate to prevent thrashing.

You might also like