EE224AI Lab Manual Supplementary

Section 1: Process Creation Tutorial

1.1: Introduction
To construct a 3-D model with SEMulator3D, you need:
 A process description
 A 2-D layout
This tutorial shows you how to use SEMulator3D’s Process Editor to create a process, then how to configure
SEMulator3D to use the process and layout information to create the 3-D voxel model.

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For an in-depth tutorial that demonstrates how to use the Layout Editor, see page T2-1.

The model for this tutorial is a shallow trench isolation:

Figure 1-1 Tutorial Model

1.2: Create a Process

The first step in creating a design is creating the process.
 The Process Editor allows you to create a flow simulating the foundry process that will fabricate the device
 The Process Library has numerous modeling steps that can be added to a process flow, then configured to the
design-specific requirements
 You can also create your own modeling steps and then save them in the user-defined Process Steps folder
This section describes basic Process Editor techniques. For information on the Process Editor, see page S8-1 of the
SEMulator3D User Guide.

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Advanced User Procedure Detailed User Procedure

1. Create a SEMulator3D work directory a. If you have not already created a SEMulator3D workspace directory, create
and copy the Examples directory from a new directory, and name it SEMulator3D_Space.
the /.../Coventor/SEMulator3D b. Copy the Examples directory from the /.../Coventor/SEMulator3D
installation directory to this work installation directory, and then paste it into your newly created work
directory. directory.
 The files necessary for this tutorial are in the Examples directory. When
you copy them into your work directory you make them more accessible
and also preserve the original files.
2. Open SEMulator3D. a. On the Windows Start menu, select All Programs. Then select
3. Set up the license server. Coventor SEMulator3D 7> SEMulator3D 7.
4. Set your Project Folder to the work b. On Linux, from a shell window, cd to /.../SEMulator3D7/bin/linux_x64 and
directory you just created. type ./SEMulator3D.
 By default, SEMulator3D opens to the Manager tab. For more
information on the SEMulator3D Manager, see page S3-1.
c. If this the first time you have run SEMulator3D, you must set the license
server and the project folder:
 In the Manager tab’s menu bar, click on Tools > Licensing. Enter the
port number and host ID in the form portnumber@hostname. The
default port number for SEMulator3D is 54015, but it may be changed
if it conflicts with other port numbers. The hostname value is the name
of the machine where the license resides. Contact your system
administrator for the appropriate port and host information.
 Click on Tools > Options and select the SEMulator3D tab.Use the
Browse icon beside the Project Directory field to navigate to and select
the working directory you just created. When you set the Project
Directory, the Manager, Process Editor, and Layout Editor default to
this directory when you create a new file.
 For more information on setting these options, see page 1-2 of the
SEMulator3D Installation Instructions.
5. Save the .zam file as STI_Example.zam. a. From the Manager tab’s toolbar, Select File > Save As.
b. In the dialog that opens, navigate to your //Examples/Semiconductor/STI
directory, and save the file as STI_Example.zam.
 The .zam file saves whatever files and options you select in the Manager
tab, as well as the 3-D model that is created from those selections.

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1.2.1: Specify Materials and Masks

Advanced User Procedure Detailed User Procedure

1. Copy the default Process Library to a. Click on the Process Editor tab.
your workspace. b. Click on Tools > Options.
c. In the SEMulator3D tab of the dialog that opens, make sure the folder selected
for the Project Directory is the same as the Projects folder selected in the
Options dialog that opened when you first opened SEMulator3D. If not,
navigate to that folder, then click OK.
 This step copies the default Process Library to your workspace.

2. View the STI material database a. Click on the Material Library tab. A process must have an associated material

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associated with the STI tutorial. database to provide material information.
b. Click on the Open file icon, navigate to the //Examples/Semiconductor/STI
directory, and select the STI.vmpd.
c. Expand the Material groups and note the names and material types that will be
available for your process.
 By default, a new process file is associated with the
SEMulator3DMaterialsDatabase7.vmpd in your apps directory. Most
foundries will require specific materials and material properties. This vmpd
file has been created specifically for this tutorial.

When you first open SEMulator3D, Only the Manager, Process Editor, and Material Library tabs are visible. You
can select which tabs are visible using the Window menu selection.

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Advanced User Procedure Detailed User Procedure

3. Create a new process file in a. Click on the Process Editor tab.
//Examples/Semiconductor/STI and
name it STI_basic. b. From the Process Editor menu bar, select the Save as icon.
c. Save the file as STI_basic.
4. Make sure that the model units are a. Select Tools > Options.
set to nanometers (nm). b. Click on the Process Editor tab.
c. Verify that the Default Model Units is set to nm.

The Process Editor has five components:

 The Process Library
 The list of Process Steps that make up the process description
 The Step Properties, Variables, and Comments panes.
For our tutorial, we will use the Process Library, Process Steps, and Step Properties panes.
 The Process Library pane lists all available modeling steps
 The Process Steps pane lists all the modeling steps in the active process
 The Step Properties pane allows the user to set the parameters for the modeling step that has been selected in
the Process Steps pane
Note: You can move (undock) the panes out of the Console so that they are free-standing dialogs.

Figure 1-2 Customized View of Process Editor

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Advanced User Procedure Detailed User Procedure

5. Import the mask names from the a. From the Process Editor toolbar, click on Tools > Import Mask Names.
STI_layout_prebuilt.cat file. b. In the dialog that opens, select STI_layout_prebuilt.cat in the //Examples/
Semiconductor/STI directory then click on Open.
 This step loads the mask names from the selected layout so that you can
select them from the Mask drop-down menu in each process step; otherwise,
you would have to enter them in the Mask field.

1.2.2: Create Wafer

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Advanced User Procedure Detailed User Procedure
1. Set the wafer parameters as shown below. a. Make sure the Wafer Setup step is active (click on it if necessary).
b. In the Wafer Name field, enter Wafer1.
c. Click in the Material field to open the Select Material dialog, and select
Si_Xtal from under Silicon in the drop-down menu.
 The content of the Material drop-down menu is determined by the
.vmpd file associated with the process.
 Si_Xtal is single crystalline silicon.
d. Click on the Dopant field to open the dopant selection dialog.
e. In the dialog that opens, select B from the Available list, then click on
Add. Set the Concentration of B to 1e15, then click on OK.
f. Set the Thickness to 200.
g. Check that the rest of the properties are as shown below.

Figure 1-3 Wafer Setup

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1.2.3: Create STI Module

Advanced User Procedure Detailed User Procedure

1. Add a sequence to your process, and name a. From the Process Steps pane, right click to select Add > Sequence.
it STI Module. b. Name the sequence: in the Step Name field, enter STI Module.
2. Add a Deposit modeling step to the STI a. Right click on the STI Module sequence, and select Add > Process >
Module sequence, and set the parameters Deposit.
as shown below. Module b. In the Step Name field, enter Pad Oxide Deposition.
 The Step Name is displayed in the SEMulator3D Viewer Scene Graph.
We are giving a step a more descriptive name to make it easier to map
the step in the Process Editor to the resulting step in the SEMulator3D
Viewer.
c. In the Wafer field, make sure Wafer1 is selected.
 There is only one Wafer Setup step, so it is selected by default.
d. For Wafer Side, select Both.
e. Click on the Material field to open the material selector dialog.
f. From the Oxides group, select SiO2_Thermal, then click on OK.
g. Set the Thickness to 5.
 This creates a uniform deposit 5 nm thick.
h. Make sure the Deposit Type is set to Conformal and the Lateral Ratio
Value is set to 1.
 The 1 value for Lateral Ratio defines this step as isotropic deposit.
 For more information on the Deposit step, see page S9-1 of the
SEMulator3D User Guide.

Figure 1-4 Deposit Oxide

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Advanced User Procedure Detailed User Procedure

3. Add another deposit to the STI Module a. Right click on the STI Module sequence, and select Add > Process >
sequence, and set the parameters as Deposit.
shown below. b. If it is not displayed automatically, double click on the step to open its
properties.
c. In the Step Name field, enter Pad Nitride Deposition.
d. For the Wafer Side, select Both.
e. Select Nitrides > Si3N4_LPCVD as the material.
f. Set the Thickness to 50.

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Advanced User Procedure Detailed User Procedure
4. Add a sub-sequence to the STI Module a. Right click on the STI Module sequence, and select Add > Sequence.
sequence, and name it Active b. Name the sequence Active Patterning.
Patterning.
 Note that you can drag and drop existing process steps into a sequence or
select several steps, and then right click to Create Sequence.

Advanced User Procedure Detailed User Procedure

5. Add an ODL deposit to the Active a. Right click on the Active Patterning sequence, and select Add > Process >
Patterning sequence, and set the Deposit.
parameters as shown below. b. In the Step Name field, enter Active ODL Deposition.
c. Select Organics/ODL as the material.
d. Set the Thickness to 80.
e. Set the Deposit Type to Planarizing, and the Reference Plane to Highest
Elevation.

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Advanced User Procedure Detailed User Procedure

6. Add an SiARC deposit to the Active a. Right click on the Active Patterning sequence, and select Add > Process >
Patterning sequence, and set the Deposit.
parameters as shown below. b. In the Step Name field, enter Active SiARC Deposition.
c. Select Silicon/SiARC as the material.
d. Set the Thickness to 25.
e. Make sure the Deposit Type is set to Conformal.

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Advanced User Procedure Detailed User Procedure

7. Add a Resist deposit to the Active a. Right click on the Active Patterning sequence, and select Add > Process >
Patterning sequence, and set the Deposit.
parameters as shown below. b. In the Step Name field, enter Active Resist Deposition.
c. Select Organics/Resist as the material.
d. Set the Thickness to 80.
e. Set the Deposit Type to Planarizing, and the Reference Plane to Highest
Elevation.

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Advanced User Procedure Detailed User Procedure
8. Add an Expose Material step to the a. Right click on the Active Patterning sequence, and select Add > Process >
Active Patterning sequence, and set the Expose Material.
parameters as shown below. b. In the Step Name field, enter Active Lithography.
c. Select Organics/Resist as the material.
d. Set the Thickness to 150.
e. Set the Mask Name parameter to Active.
f. Set the Mask Polarity to Light.
g. Check the Dimensional Bias option and set the values for X Bias and Y Bias
to -6.
h. Check the Lithography Emulation box and set the Size Threshold to 22.
 Expose Material step includes all stages of a physical photolithography
process from exposure through development. For more information on the
Expose Material step, see page S9-20 of the SEMulator3D User Guide.

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Figure 1-5 Active Lithography

Advanced User Procedure Detailed User Procedure

9. Add a sub-sequence to the Active a. Right click on the Active Patterning sequence, and select Add >
Patterning sequence, and name it Sequence.
Integrated STI Trench Etch. b. Name the sub-sequence Integrated STI Trench Etch.
10. Add an Etch step to the Integrated STI a. Right click on the Integrated STI Trench Etch sequence, and select Add >
Trench Etch sequence, and set the Process > Etch.
parameters as shown. b. In the Step Name field, enter SiARC Etch.
c. Click on the Etch Materials field, and select the material groups and Etch
Ratios shown below.
 Note that when you select a material group, all the materials that are in
that group and that have been added to the process are etched.
d. Make sure the Selectivity option is enabled.
 The Selectivity option invokes etch ratios applied in the Etch Materials
dialog. For more information on selectivity, see page S9-32 of the
SEMulator3D User Guide.
e. Set the Depth to 28.
f. Set the Etch Type to Enhanced Basic.
g. Set the Lateral Ratio value to 0.1.
 For more information on the Etch step, see page S9-31 of the
SEMulator3D User Guide.

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Advanced User Procedure Detailed User Procedure
11. Add an Etch step to the Integrated STI a. Right click on the Integrated STI Trench Etch sequence, and select Add >
Trench Etch sequence, and set the Process > Etch.
parameters as shown below. b. In the Step Name field, enter ODL Etch.
c. Click on the Etch Materials field, and select the material groups and Etch
Ratios shown below.
 Note that the Silicon material group was added, and then SiARC was
added separately so that it would have a different etch ratio than its
parent group.
d. Set the Depth to 88.
e. Set the Etch Type to Enhanced Basic.
f. Set the Lateral Ratio value to 0.05.

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12. Add an Etch step to the Integrated STI a. Add an Etch step to the Integrated STI Trench Etch sequence.
Trench Etch sequence, and set the b. In the Step Name field, enter Pad Nitride Etch.
parameters as shown below. c. Click on the Etch Materials field, and select the material groups and Etch
Ratios shown below.
d. Set the Depth to 55.
e. Set the Etch Type to Enhanced Basic.
f. Set the Lateral Ratio value to 0.125.

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Advanced User Procedure Detailed User Procedure
13. Add an Etch step to the Integrated STI a. Add another Etch step to the Integrated STI Trench Etch sequence.
Trench Etch sequence, and set the b. In the Step Name field, enter Pad Oxide Etch.
parameters as shown below. c. Click on the Etch Materials field, and select the materials and Etch Ratios
shown below.
d. Set the Depth to 7.
e. Set the Etch Type to Enhanced Basic.
f. Set the Lateral Ratio value to 0.125.

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Advanced User Procedure Detailed User Procedure

14. Add another Etch step to the Integrated a. Add another Etch step to the Integrated STI Trench Etch sequence.
STI Trench Etch sequence, and set the b. In the Step Name field, enter Silicon Trench Etch.
parameters as shown below. c. Select the Etch materials and the Etch Ratios shown below.
d. Set the Depth to 150.
e. Set the Etch Type to Enhanced Basic.
f. Set the Lateral Ratio value to 0.05.

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Advanced User Procedure Detailed User Procedure
15. Add a Remove Material step to the Active a. Right click on the Active Patterning sequence, and select Add > Process
Patterning sequence, and set the > Remove Materials.
parameters as shown below. b. In the Step Name field, enter Active Resist Strip.
c. Click in the Target Materials field, and in the dialog that opens, add
Organics.
 By selecting /Organics, you will be removing all the materials in the
Organics category that have been added to the process. So you will be
removing the ODL and Resist materials.
 For more information on the Remove Material step, see page S9-111 of
the SEMulator3D User Guide.
 At this point, the process file should look like the one shown in Figure
1-6.

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Figure 1-6 Process in Progress

In Figure 1-6, the Action and Lock columns are hidden for easier viewing. To display or hide Process Step
columns, right click on one of the column titles and select to view or deselect to hide the desired columns.

Advanced User Procedure Detailed User Procedure

16. Add an Interface Growth step to the STI a. Right click on the STI Module sequence, and select Add > Process >
Module sequence, and set the parameters Interface Growth.
as shown below. b. In the Step Name field, enter STI Linear Growth.
c. Set the Materials, interfaces, and replacement materials as shown below.
d. Set the Thickness and Growth Fraction into Side 1 as shown below.
 For more information on the Interface Growth step, see page S9-17 of
the SEMulator3D User Guide.

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Figure 1-7 STI Linear Growth

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Advanced User Procedure Detailed User Procedure
17. Add a deposit step to the STI Module a. Right click on the STI Module sequence, and select Add > Process >
sequence, and set the parameters as shown Deposit.
below. b. In the Step Name field, enter STI Fill Deposition.
c. Select SiO2_HDP as the material.
d. Set the Thickness to 200.
e. Set the Lateral Ratio to 0.67.

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Advanced User Procedure Detailed User Procedure

18. Add a Polish step to the STI Module a. Right click in the space below the process steps, and select Add >
sequence and set the parameters as shown. Process > Polish.
b. Name the step STI Oxide CMP.
c. For the Polish Type, select the Stop on Material option.
d. Set Target Material(s) to Si3N4_LPCVD.
e. Set Overpolish to 10.
f. Check the Dishing option, and set the following parameters:
 Maximum Depth: 10
 Lateral Decay Constant: 100

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Advanced User Procedure Detailed User Procedure

19. Add an Etch step to the STI Module, and a. Add an Etch step to the STI Module sequence.
set the parameters as shown below. b. In the Step Name field, enter STI Deglaze Etch.
c. Set the Wafer Side to Both.
d. Click on the Etch Materials field, and select the materials and Etch Ratios
as shown below.
e. Set the Depth to 10.

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Advanced User Procedure Detailed User Procedure
20. Add an Etch step to the STI Module, and a. Add an Etch step to the STI Module sequence.
set the parameters as shown below. b. In the Step Name field, enter Pad Nitride Strip.
c. For Wafer side, select Both.
d. Click on the Etch Materials field, and select the materials and Etch Ratios
shown below.
e. Set the Depth to 60.
 The completed STI Module is shown in Figure 1-8.

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Figure 1-8 Completed STI Module

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1.2.4: Create the Dielectric Gate

Advanced User Procedure Detailed User Procedure

21. Add an Etch step, and set the parameters as a. In the Process Steps pane, right click below the list of process steps, and
shown below. select Add > Process > Etch to add it after the STI Module.
b. In the Step Name field, enter Gate Dielectric Preclean.
c. For the Wafer Side, select Both.
d. Click on the Edit Materials field, and select the materials and Etch Ratios
shown below.
e. Set the Depth to 5.

Advanced User Procedure Detailed User Procedure

22. Add another deposit, and set the a. Right click below the Process Steps list, and select Add > Process >
parameters as shown below. Deposit.
b. In the Step Name field, enter Gate Dielectric Deposition.
c. Select SiO2_Thermal as the material.
d. Set the Thickness to 2.

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Figure 1-9 Gate Dielectric Deposit

Advanced User Procedure Detailed User Procedure

23. Save the file. a. Select File > Save.
 Figure 1-10 shows the final process.

Figure 1-10 Final Process

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1.3: Open Layout

Advanced User Procedure Detailed User Procedure

1. Open the //Examples/Semiconductor/ a. From the Manager, use the Browse icon beside the Layout File field to
STI/ STI_layout_prebuilt.cat in the navigate to and select the STI_layout_prebuilt.cat file in the /.../Examples/
Layout Editor. Semiconductor/STI folder.
b. For the Top cell field, select Cell6x6.
c. Click on the Layout Editor icon.

2. Review the layer assignments and the a. In the Layout Editor, click on the Layer Browser icon.
corresponding 2-D objects, as shown
in Figure 1-11. b. Review the list of layers and their corresponding objects in the layout, as

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shown in Figure 1-11.
 The layers correspond to the mask names assigned in the Process Editor.
The buildBounds layer is used to define the wafer bounds of the device;
only this area will be built.
 For more information on the Layout Editor, see the Layout Editor User
Guide, which you can access from the Manager’s Help > Layout Editor.
 Figure 1-11 shows the Layout Editor with a white background. To set the
white background, click on the drop-down arrow beside the Refresh screen
icon and select White Background.
c. Close the Layer Browser and the Layout Editor.

Figure 1-11 Layout as Viewed in Layout Editor

The tutorial beginning on page T2-1 demonstrates how to build this layout.

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1.4: Build a 3-D Model

Advanced User Procedure Detailed User Procedure

1. Continue configuring the Manager to build a. Select the Manager tab.
the 3D model of the mirror. b. Set the Top Cell to Cell6x6.
c. Set the Model Resolution to 1.0.
 The Model Resolution setting defines the size of a voxel in model
units.
d. Set the Model Extent to All Active Masks.
e. Set Pad by % to 0.
f. Do not check Crop Unused Region From Layout.
g. Make sure the Save After Every Step and the Launch Viewer After
Building options are selected.
 The Save After Every Step option extracts a model for every process
step, allowing you to view the model at each process step in the
Viewer.
h. Save the .zam file.
i. Click on the Build icon.
 When you click on the Build icon, the software writes out a GDS file
and Python script (with a .py extension), then executes the script. You
can view the progress in the Coventor Terminal window. When the
model is finished, the Viewer will automatically open because you
checked Launch Viewer After Building.
 The build time is about 44 seconds on a 64-bit Windows 7 machine
with 16 GB of RAM and dual 2.4 GHz processors.

Figure 1-12 Setup for Building Model

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1.5: Viewing the 3-D Model

Advanced User Procedure Detailed User Procedure

1. View the 3-D model in the SEMulator3D a. View the model in the SEMulator3D Viewer.
Viewer.  The initial view shows the complete model. To view an individual step,
click on that step in the Model list.

Figure 1-13 Initial Model View

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Advanced User Procedure Detailed User Procedure
2. Use the down arrow key to step through a. Click on the plus sign beside Process to make the individual steps visible.
each modeling step that was defined in the  You can also expand all steps with their substeps by right clicking on
Process Editor.
Process and selecting Expand/Collapse All.
b. Click on Step 1 to make it visible.
c. Use the down arrow key to progress through each step to see how the
model is created.
 The up and down arrow keys can be used to move up or down the step
list.
 Note that when a step is a sequence, the up and down keys do not drill
down into the substeps unless the step is expanded to show the
substeps. You can expand the step by clicking on the right arrow key,
and then use the down arrow key to step through the substeps.
d. Use the Rotate and Zoom icons to get a better view of the model.
 Each step is shown in Figure 1-14 through Figure 1-20.
 For more information on the SEMulator3D Viewer, see page S18-1 of
the SEMulator3D User Guide.

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Figure 1-14 3-D Model Step 1

Figure 1-15 3-D Model Steps 2.1 and 2.2

Figure 1-16 3-D Model Steps 2.3.1 and 2.3.2

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Figure 1-17 3-D Model Steps 2.3.3 and 2.3.4

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Figure 1-18 3-D Model Steps 2.3.5.1, 2.3.5.2, 2.3.5.3, and 2.3.5.4

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Figure 1-19 3-D Model Steps 2.3.5.5 and 2.3.6

Figure 1-20 3-D Model Step 2.4 and 2.5

Figure 1-21 3-D Model Steps 2.6 and 2.7

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Figure 1-22 3-D Model Step 2.8

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Figure 1-23 3-D Model Steps 3 and 4

1.6: SEMulator3D MultiEtch Capability

The Multi Etch step allows the user to etch multiple materials with different etch profiles, including tapered etch,
lateral etch bias, and mask sputtering. This section demonstrates how the Multi Etch step can be used in the STI
example to create more realistic etch profiles. We will change the Etch steps in the Integrated STI Trench submodule
to Multi Etch steps. The step parameters and resulting geometry are shown below. Note that on a Windows 7 64-bit
machine with dual 2.4 GHz processors and 16 GB of RAM, using the process with the Multi Etch steps, the model
takes 727 seconds to build compared to 39 seconds with the basic Etch steps.
For more information on the Multi Etch step, see page S9-56 of the SEMulator3D User Guide.

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Figure 1-24 Nitride Multi Etch (Step 2.3.5.3)

Multi-Etch Result Compare to Basic Etch Result:

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Figure 1-25 Oxide Multi Etch (Step 2.3.5.4)

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Multi Etch Result Compare with Basic Etch Result:

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Figure 1-26 Silicon Multi Etch (Step 2.3.5.5)

Multi Etch Compare with Basic Etch Result

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Compare the final result with Multi Etch steps with the final result with the basic Etch steps, shown in Figure 1-27:

Figure 1-27 Final Model with Multi Etch Steps

With Multi Etch Steps With Basic Etch Steps

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 Epitaxy Guideline

the Athena code fragment to simulate the homoepitaxial

growth is shown below in bold:
go athena
line x loc=0.0 spacing=0.1
line x loc=1.0 spacing=0.1
line y loc=0.0 spacing=0.05
line y loc=1.0 spacing=0.05
# Initialize the mesh
init silicon orient=100 c.boron=5e14 one.d
# Perform a epitaxial growth step
epitaxy temperature=1050 time=4 growth.rate=.4
# Perform a epitaxial growth step product of
c.arsenic=5.e15 division=40
epitaxy temperature=1050 time=4 growth.rate=.4 the y-direc
c.arsenic=5.e15 division=40
# Saving the created structure sion param
# Saving the created structure sublayers.
structure outfile=epitaxy.str
structure outfile=epitaxy.str The sim
# Plotting the the
# Plotting final structure
final structure Figure 2.2,
tion is ND=
tonyplottonyplot -st epitaxy.str
-st epitaxy.str is NA=5×1
quit
quit growth. Th
profiles int
depth, Xj, w
ND heavily dop
Xj is deepe
measured j
NA

Xj

epitaxial layer silicon wafer

1. 1D
FigureFigure simulated
2.2 1D doping
simulated doping profileprofile of the
of the epitaxial epitaxial
growth growth
as a function
of depth
as a function of depth
From the command above, the growth of arsenic doped silicon
Figure 2.3 2
on top of the p-type silicon wafer at a rate of 0.4 µm per minute is
simulated. The epitaxial thickness is equal to 1.6 µm, because it is a
21
 From the command above, the growth of arsenic doped silicon
on top of the p-type silicon wafer at a rate of 0.4 µm per minute is
simulated. The epitaxial thickness is equal to 1.6 µm, because it is
a product of the time and growth rate. The number of mesh points
in the y-direction of the completed epitaxial layer is set with the
division parameter. The completed epitaxial layer is divided into 40
sublayers.
The simulated doping profile as a function of depth as shown
product of the time and growth rate. The number of mesh points in
.4 in Figurethe1y-direction
, indicates the sim ulated
of the completed epitaxial epitaxial layer
layer is set with the dopi
divi-
ng con-
centration is N =
sion parameter.
d
5 The completed epitaxial layer is divided into 40 of the
× 10 15
cm -3
. The doping concentration
sublayers.
p-type wafer is NA = 5 × 1014 cm-3. The epitaxial layer nominally
The simulated doping profile as a function of depth as shown in
1.6 µm thick is growth.
Figure 2.2, indicates the The point epitaxial
simulated where the layerepitaxial layer doping
doping concentra-
tion is NDN
concentration =5×10
D
profiles
15
cm -3
. intersects
The doping the silicon
concentration of wafer
the concentration
p-type wafer
14 -3
NA is is
the N =5×10
junction
A cm
depth, . The X epitaxial
, where layer
the nominally
net doping1.6 µm
(|N thick
– NisD|) con-
j A
growth. The point where the epitaxial layer doping concentration ND
centration is zero.
profiles A heavily
intersects the silicondoped epitaxial layer
wafer concentration dopes
NA is the the wafer,
junction
and the junction depththeXnet
depth, Xj, where j
isdoping
deeper (|Nthan
A – NDthe nominal thickness
|) concentration is zero. A of the
epitaxial layer. The measured junction depth Xj is about depth
heavily doped epitaxial layer dopes the wafer, and the junction 1.63 µm.
Xj is deeper than the nominal thickness of the epitaxial layer. The
measured junction depth Xj is about 1.63 µm.

on

on
FigureFigure
2. 2D2.3simulation
2D simulationresults
results ofof
thethe p-type
p-type siliconsilicon wafer
wafer with with the
the arsenic
is
a
arsenic epitaxial
epitaxial layer layer

22
 The preceding program can be changed to a 2D program by
adding the argument two.d to the initialization command in the
pro-gram. The extract results remain the same, however the
TonyPlot window indicates a 2D result as shown in Figure 2. The
doping profile is not shown by default in this 2D result. To show
the doping profile, the user must select Display item from the Plot
pull down menu (Plot→Display) and on “TonyPlot: Display (2D
Mesh)” win-dow select Contours graphical icon. The Junctions
graphical icon specifies the position of the junction depth Xj. The
different colours in the silicon structure represent the specific
doping concentration.
 Deposition Guideline

the Athena code fragment to simulate 2D the unidirectional

deposition model is shown below in bold:
go athena
# The x dimension definition
line x loc=0.0 spac=0.20
line x loc=0.25 spac=0.01
line x loc=0.75 spac=0.01
line x loc=1.0 spac=0.20
# The y dimension definition
line y loc=0.00 spac=0.01
line y loc=1.0 spac=0.01
#Initialize the mesh
init silicon orientation=100 two.d
# Deposit the nitride layer
deposit nitride thick=.3 divis=10
# The arbitrary shape of geometrical etching

etch nitride start x=0.35 y=-0.3

etch cont x=0.35 y=0.3
etch cont x=0.65 y=0.3
etch done x=0.65 y=-0.3
# Save the primary structure into a file
structure outfile=structure.str
# Define the unidirectional deposition model
rate.depo machine=uni aluminum a.m sigma.dep=0.20
uni dep.rate=800 angle1=45.0
# Running the machine for a specified period of time
deposit machine=uni time=2 minutes divis=20
structure outfile=unidirectional.str
From the command above, the deposition machine is modelled
with an unidirectional (uni command) deposition model. The mate-
rial is defined by using material name as a statement (e. g. alu-
minum, tungsten, titanium, platinum, cobalt, and etc.). The
deposition rate (dep.rate command) is 800 Ångstroms/min. The
logical parameter, a.m, specifies what units are used, in this case,
Ångstroms per minute. The parameter sigma.dep specifies the
surface diffusion parameter. Finally, the angle of incidence of the
unidirectional deposition with respect to the surface normal is spe-
cified with the parameter angle1.
From the command above, the unidirectional machine is ap-
plied to deposit the Al film onto the current structure for 2 minu-
tes.
The dual directional deposition model is realized by specifying
the parameter dualdirec on the rate.depo statement. In this mo-
del, each point in the unshadowed region views the vapour streams
arriving from two different directions (two different angles: angle1
and angle2). The following commands demonstrate the dual direc-
tional deposition model:

# Re-initialize the primary structure and continue

# process simulation
init infile=structure.str
# Define the dual directional deposition model
rate.depo machine=dual aluminum a.m sigma.dep=0.20
dualdirec dep.rate=800 angle1=45.00 angle2=-45.00
# Running the machine for a specified period of time
deposit machine=dual time=2 minutes divis=20
structure outfile=dualdirectional.str
 The hemispheric deposition model is realized by specifying the
parameter hemisphe on the statement rate.depo. The angles of
in-cidence of the hemispherical deposition with respect to the
surface normal are specified with the angle1 and angle2
parameters. The Athena code fragment to simulate the hemispheric
deposition model is shown below in bold:
# Re-initialize the primary structure and continue
# process simulation
init infile=structure.str
# Define the hemispherical deposition model
rate.depo machine=hemi aluminum a.m sigma.dep=0.20
hemisphe dep.rate=800 angle1=90.00 angle2=-90.00
# Running the machine for a specified period of time
deposit machine=hemi time=2 minutes divis=20
structure outfile=hemispherical.str
The chemical vapour deposition model is realized by specifying
the cvd parameter on the rate.depo statement, as well as the mate-
rial type, the deposition rate dep.rate, and step coverage step.
cov parameter. The CVD model can be defined by the bolded com-
mand:
# Re-initialize the primary structure and continue
# process simulation
init infile=structure.str
# Define the chemical vapour deposition model

rate.depo machine=cvd1 aluminum a.m cvd dep.rate=800

step.cov=0.80
# Running the machine for a specified period of time
deposit machine=cvd1 time=2 minutes divis=20
structure outfile=cvd.str
# Plot different structures to compare
tonyplot -st unidirectional.str dualdirectional.str
hemispherical.str cvd.str
quit
 Several cases of deposition under different process conditions
are shown for illustration in Figure 1.

Evaporated materials de-posit non-uniformly if the wafer has a

rough surface. Because the evaporated material attacks the wafer
mostly from a single (Figure 1, a) or dual direction (Figure 1, b),
protruding features block the evaporated material from some areas.
This phenomenon is called shadowing. As shown in Figure 1, a, the
shadowed region of the wafer is formed because of the vapour
streams in one direction only. The growth rate of the deposited film
in the shadowed region is equal to zero. The resulting non-
uniformity of thickness of deposi-ted layer can cause reliability
problem in the final device: may result in a non-uniform
distribution of the current density in the conduct-ing line. The high
current density in the thinner regions can cause a metal
interconnection break.
Figure 1, c, shows a simulated hemispherical vapour source
deposition model and a more uniform thickness distribution.
As previously mentioned, the CVD techniques have a number
of advantages as a method for depositing thin films. One of the pri-
mary advantages is that CVD films are generally quite conformal, i.
e., that the film thickness on the sidewalls of features is compara-
ble to the thickness on the top. Figure 1, d, shows a conformal film
deposition in which the film thickness is uniform along all surfaces
of the step.
 a) b)
Vapour strem
Va

am
po

tre
ur

r s
str

ou
e

angle1 angle2

c) d)

FigureFigure 1. Simulation
8.1 Simulation results
results of different
of different deposition
deposition models:
models: a – unidirec-
a - unidirectional
tional vapour vapour
source; b - dual source; bc -- dual
directional; directional;d – CVD
hemispherical;
c - hemispherical; d - CVD

90
 Photolithography Guideline

Definition of illumination, mask and projection systems para-

meters. The illumination system is defined using two statements:
illumination and illum.filter. The illumination statement de-
fines the illuminating wavelength (λ = 365 nm (i-line), λ = 405 nm
(h-line) and λ = 436 nm (g-line). The illumination system can be
defined by executing the code:
go athena
# The illumination system setting
illumination h.line
The illum.filter statement defines the shape of the illumina-
tion system. The general shapes available are: circle, square, Gaus-
sian and other. The extent of the source is defined by the coherence
parameter sigma (σ). The sigma parameter defines the radius for
circular sources, the x and y intercepts for square sources. The fol-
lowing code describes the shape of the illumination system:
# The shape of the illuminating source
illum.filter circle sigma=0.5
The layout command is used to enter mask coordinates. The
following layout statement describes a mask feature that is 1 µm
in the x direction and 2 µm in the z direction:
# The mask setting
layout x.low=-0.5 z.low=-1.0 x.high=0.5 z.high=1.0
The projection system is defined using two statements: projec-
tion and pupil.filter. The projection command is used to define
the numerical aperture:
# The projection system numerical aperture
projection na=0.45
The pupil.filter command describes the shape of the projec-
tion system and the possible filters of the projection system. The
shape of the projector pupil can be square or circle. The code below
illustrates this statement:
 # The shape of the pupil of the projection system
pupil.filter circle
The image statement invokes the imaging module and speci-
fies the window in which the imaging will be performed. The ima-
ge window is specified with the parameters win.x.low, win.z.low,
win.x.high, win.z.high. These parameters define the minimum
and maximum range of x and z values. The following statement de-
scribes an image window:
# The image module setting
image win.x.lo=-1.0 win.x.hi=1.0 win.z.lo=-1.25 win.
z.hi=1.25 dx=0.05 clear
The parameter dx specifies the discretization along the x-di-
mension. The clear parameter specifies that the mask should be
considered as a clear field with dark features defined by the layout
statements.
The structure statement saves simulation results into an out-
put file:
# The storage of simulation results
structure outfile=lithography _ 1.str intensity mask
 The structure statement saves simulation results into an output
file:
# The storage of simulation results
structure outfile=lithography_1.str intensity mask

Figure
Figure 1. 6.1
TheThe contour
contour ofofthe
thelight
lightintensity
intensity through
throughaamask
mask

The mask parameter in the structure statement saves only mask

layout
The information, the intensity
mask parameter parameterstatement
in the structure saves onlysaves
intensity
onlydis-
mask
tribution.
layout information, the intensity parameter saves only intensity dis-
The tonyplot command is used for display the results of the
tribution.
simulation. The following command displays the lithogra-
The tonyplot command is used for displaying the results of
phy_1.str file:
the simulation. The following command displays the lithogra-
64
phy _ 1.str file:
# The tonyplot command displays the aerial image
tonyplot –st lithography _ 1.str
Figure 1 shows the aerial image. The aerial image of a mask or
the light intensity on top of the photoresist surface is a critically
important quantity in photolithography governing how well a deve-
loped photoresist structure replicates a mask design. The aerial ima-
ge contrast can be varied by wavelength, illumination conditions,
numerical aperture or mask parameters.
 Flow of photolithography. The photoresist is deposited onto the
whole surface of the Si wafer with dielectric (oxide, nitride, etc.)
or metallic (Al, Cu, etc.) film layers by the spin coating process.
So, before this step the following code is necessary for further 2D
simulation:
# The mesh setting
line x loc=-1.0 spacing=0.1
line x loc=1.0 spacing=0.1
line y loc=0.0 spacing=0.02
line y loc=1.0 spacing=0.02
# The silicon substrate initialization
initialize silicon orientation=111 two.d
# The oxide layer deposition
deposit oxide thick=0.1 div=10
The thickness of the photoresist can be controlled by different spin
speed. The spin coating process is simulated by the deposit statement
in which the material (name.resist parameter) to be deposited and the
thickness (thickness parameter) of the layer to be deposited must be
specified. The code for the spin coating process is shown below:
# Deposit a layer of AZ1350J photoresist
deposit name.resist=AZ1350J thickness=0.5 div=10
From the command above, the positive AZ1350J photoresist
(produced by Shipley Inc.) of 0.5 µm thickness is coated onto the
whole surface of the Si wafer with oxide layer of 0.1 µm thickness.
After coating the photoresist, second step is often soft or pre-
bake resist, typically 10–30 min at 90–100 °C temperature. In this
simulator this step is default.
After coating the photoresist, the Si wafer is placed in an ap-
paratus called a mask aligner. The mask is aligned with the wafer.
Once the mask has been accurately aligned with the pattern on the
surface of the wafer, the photoresist is exposed through the pattern
on the mask with a high intensity ultraviolet light with necessary
dose. The code for this step is shown below:
 # The photoresist exposure
expose dose=150
From the command above, the positive AZ1350J photoresist is
exposed with a dose of 150 mJ/cm2.
The post-exposure bake (PEB) is performed before developing
to eliminate the standing wave effect. This step also increases the
resistance of resist for the next step of development. The standing
wave effect is the result of interference within the resist layer be-
tween incoming and reflected light. Such a standing wave can leave
its mark in the exposed photoresist. The typical PEB temperature is
around 100 °C or 120 °C and the time is around 500–600 sec and
100 sec, respectively. If antireflective coatings are used under the
resist, this PEB may not be necessary. The code for this post-expo-
sure bake is shown below:
# The post-exposure bake
bake time=100 sec temp=120
The development removes the exposed photoresist from wafer
by immersing it in a chemical acid bath, developer filled container,
for a certain time, and then taken out to wash off the residual deve-
loper. The code for the photoresist development is shown below:
# The photoresist development process
develop mack time=90 steps=30
From the command above, the Mack’s development model
is specified along with the development time in seconds, and the
number of time steps.
The post-development hard bake hardens the photoresist, to
make a more durable protecting layer in the following process steps
like wet chemical or plasma etching steps. Typical hard bake tem-
peratures are in the range of 120 °C to 140 °C, for 10 to 30 minutes.
The code for this post-development hard bake is shown below:
# The reflow parameters setting
material material=AZ1350J gamma.reflo=2e2 reflow
visc.0=1.862e-13 visc.E=1.85
 # The post-development hard bake process
bake time=10 min temp=120 reflow
The reflow model for the photoresist is enabled by setting the
reflow parameter on the material statement. The visc.0 and visc.
e parameters set the viscosity of the photoresist. The gamma.reflo
parameter set the surface tension factor for the reflow calculation.
From the command above, the positive AZ1350J photoresist is hard
baked at 120 °C for 10 minutes.
The next step saves the created structure:
# The saving code for a final structure
structure outfile=lithography _ 2.str
Finally, the results of the simulation are plotted using the tony-
plot command:
# The displaying code
tonyplot -st lithography _ *.str
quit

Figure 2. The final structure after the photolithography process

Figure
Figure 2
6.2shows thestructure
The final situation results
after after photoresist
the photolithography coating,
process
soft bake, alignment, exposure, post-exposure bake, development
and post-development
Figure 6.2 shows thehardsituation
bake of the photoresist.
results after photoresist coating,
soft bake, alignment, exposure, post-exposure bake, development
and post-development hard bake of the photoresist.
 ETCHING Guideline

Wet etching of Si (111). The most commonly used etchant for

isotropic wet etching of the Si, orientation (111), is the HNA (HF/
hnO3/CH3COOH) system, which is a mixture of nitric acid
(HNO3), hydrofluoric acid (HF) and acetic acid (CH3COOH). The
etch rates and the resulting surface quality strongly depend on the
chemical composition and temperature. The typical concentration
used is 10 ml HF, 30 ml HNO3, 80ml DI H2O or ch3COOH at 22
ºC. Si is etched at a rate of 0.7–3.0 μm/min. However, there are
several prob-lems associated with the HNA wet etching process of
the Si. First, it is difficult to mask with high precision using a
desirable and simple mask such as SiO2 which is etched at a rate of
30–70 nm/min. Second, the etch rate is very sensitive to agitation
and temperature. This makes it difficult to control lateral as well as
vertical geometries.
the Athena code fragment to simulate the HNA wet etching
process is shown below in bold:
go athena
# Read in structure file created in previous lab work
init infile=lithography_2.str
# Define the etcher machine
rate.etch machine=HNA wet.etch oxide n.m isotropic=30
rate.etch machine=HNA wet.etch silicon u.m isotropic=0.7
# Running the machine for a specified period of time
etch machine=HNA time=4 min
# Saving structure
structure outfile=HNA _ etching.str
# Plot structure
tonyplot HNA _ etching.str
quit
This etch process is performed by defining an etch machine
with the rate.etch statement. For this etch process, the rate is de-
fined for the wet.etch model. The parameter u.m specifies that the
etch rate is given in units of microns per minute (n.m – nanometres
per minute). The parameter isotropic describes the etching type
and rate 30 nm/minute for oxide and 0.7 μm/minute for Si. Selecti-
vity is equal 23.3. From the command above, the HNA machine is
applied to etch the current structure for 4 minutes.
The parameter isotropic describes the etching type and rate 30
nm/minute for oxide and 0.7 ȝm/minute for Si. Selectivity is to equal
23.3. From the command above, the HNA machine is applied to etch
the current structure for 4 minutes.

Figure 1. The
Figure7.4 Theisotropic
isotropicwet
wetetching
etchingprocess
processof
ofSi
Si

Figure 7.4 shows a simulated the HNA wet etching process. The
etchedFigure 1 shows
structure in thisa figure
simulated
shows thatwet
HNA the etching
etch rateprocess. The in
is identical
etcheddirection.
every structureWein this
canfigure shows
see SiO that the etch rate is identical in
2 mask erosion about 120 nm from
everysides
every direction. We can see SiO2 mask erosion about 120 nm from
of mask.
all the sides of mask.
Dry etching. The most common form of dry etching today is re-
active ion etching (RIE). In this dry etching process, the same radio
frequency (RF) power supply is used to excite ions in a gas to an
Dry etching.
energetic The
state. The most common
energized form ofthe
ions supply drynecessary
etching today is to
energy
reactive ion etching (RIE). In this dry etching process, the same
generate physical and chemical reactions on the exposed area of the
radio frequency (RF) power supply is used to excite ions in a gas to
an energetic state. The energized77ions supply the necessary energy
to generate physical and chemical reactions on the exposed area of
the wafer, which starts the etching process. For example, halocarbon
gases (CHF3, CF4) can be used to etch SiO2 and Si3N4, the photore-
sist can be etched (removed) with O2. The RIE can generate strong
anisotropic, as well as isotropic profiles, depending on the gases
used, the condition of plasma, and the applied power.
 The following commands demonstrate simple trench etching
using the RIE isotropic, anisotropic and chemical etching model
components (in bold):
go athena
# Read in structure file created in previoius lab work
init infile=lithography _ 2.str
# The first part. Isotropic only
rate.etch machine=etch oxide a.s rie isotropic=5.0
rate.etch machine=etch silicon a.s rie isotropic=50.0
# Running the machine for a specified period of time
etch machine=etch time=4 minutes dx.mult=0.5
# Saving structure
structure outfile=isotropic.str
# Read in structure file created in previous lab work
init infile=lithography _ 2.str
# The second part. Anisotropic only
rate.etch machine=etch oxide a.s rie directional=5.0
rate.etch machine=etch silicon a.s rie directional=50.0
# Running the machine for a specified period of time
etch machine=etch time=4 minutes dx.mult=0.5
# Saving structure
structure outfile=anisotropic.str
# Read in structure file created in previous lab work
init infile=lithography _ 2.str
# The last part. Chemical only
rate.etch machine=etch oxide a.s rie chemical=5.0
divergence=5
rate.etch machine=etch silicon a.s rie chemical=50.0
divergence=5
# Running the machine for a specified period of time
etch machine=etch time=4 minutes dx.mult=0.5
# Saving structure
structure outfile=chemical.str
# Plot structures to compare
tonyplot –overlay isotropic.str anisotropic.str chemical.
str
quit
 The first part demonstrates an example of isotropical etching,
which is modelled using the isotropic parameter. The second part
shows anisotropical etching using the directional parameter. For
this etching model, the etch rate is the contribution of the ions to
the chemically oriented etching mechanisms. The ions are assumed
to have an anisotropic angular distribution specified by diver-
gence parameter. The last part illustrates chemical etching using
the chemical and divergence parameters. The chemical parame-
ter is the etch rate and the divergence parameter is the standard
deviation in degrees of a Gaussian distribution of ions with angle,
incident upon the surface. In all these parts, the etch rate of the Si
is 50 Ångstroms per second, and the etch selectivity of the Si with
respect to the oxide is 10.

Figure 2 shows a simulated the RIE etching profiles.

Anisotropic Chemical

Isotropic

Figure 2. The RIE etching profiles of isotropic, anisotropic and

chemical etchings
 Thermal Oxidation Guideline

Oxidation simulation requires as input: wafer orientation (100)

or (111) and doping level; temperature; time; oxidizing ambient wet
/ dry; pressure and HCl or Cl2 percent concentration.
the Athena code fragment to simulate the thermal growth of
siO2 on the semiconductor surface is shown below in bold:
go athena
# The x dimension definition
line x loc = 0.0 spacing=0.02
line x loc = 2.0 spacing=0.25
# The y dimension definition
line y loc = 0.0 spacing = 0.02
line y loc = 4.0 spacing = 0.25
# Initialize the mesh
init silicon orientation=100 c.phos=3e15 two.d
# Perform a oxidation step
diffuse time=90 temperature=900 wetO2 press=2 hcl=3
# Saving the created structure
struct outfile=oxidation.str
# Plotting the final structure
tonyplot –st oxidation.str
The oxidation process is simulated by the diffusion command,
abbreviated diffuse. Parameters that can be specified with the dif-
fuse statement include the gas present in the furnace (e. g. weto2
or dryo2), the percentage of HCl (hydrochloric acid) in the oxidant
stream (hcl), the pressure (press) of the process gas, the tempera-
ture of the furnace (temperature) and the amount of time spent at
the furnace (time).
The general command to save the created structure into a file is
struct outfile=oxidation.str. the tonyplot command is used
to display the results of the simulation (Figure 1).
 When oxidation.str file is displayed in TonyPlot, the user
can zoom in the view of the structure. The user can depress the
left mouse button anywhere on the displayed structure, and drag
it to another location, defining a rectangle between the two points.
Upon releasing the mouse button, only the selected area is displayed
(zoom).
The SiO2 thickness can be defined from the Ruler tool. To use
the Ruler facility of TonyPlot, the user must select the plots in which
measurements are to be taken, and choose Ruler from the Tools
menu (Tools→Ruler). The Ruler position is defined by dragging the
pointer across the plot to define a box and line. The Ruler shows
useful data such as length, gradient, intercepts, and so on, of an
arbitrary line defined by the user.

Figure 3.3 Thethermal

1. The thermaloxidation
oxidationfor
for(100)
(100)Si
Siwafer:
wafer:wet
wetoxidation,
oxidation,
time=90
time min,temperature
= 90 min, temperature=900C, pressure=2
= 900˚C, pressure = 2atm.,
atm.,HCl=3%
HCl = 3 %
 Figure 3.3 The thermal oxidation for (100) Si wafer: wet oxidation,
time=90 min, temperature=900C, pressure=2 atm., HCl=3%

Figure 2.
3.4The
Thezoomed
zoomedview
viewofofthe
thethermal
thermaloxidation
oxidationfor
for(100)
(100)SiSiwafer:
wafer:
wetwet oxidation,
oxidation, time =min,
time=90 90 min, temperature = 900
temperature=900C, ˚C, pressure
pressure=2 atm,= HCl=3%
2 atm,
HCl = 3 %
30

Figure 2 that is invoked from TonyPlot shows a wet oxidation

being carried out on the (100)-oriented Si wafer. Results actually
proved that the SiO2 grown is approximately 54 % (0.20 µm)
above the original surface of the silicon and 46 % (0.17 µm) below
the orig-inal surface. The total SiO2 thickness is approximately
0.37 µm.
The oxide thickness can also be extracted directly using the
extract statement. The full extraction statement for the SiO2 thick-
ness is shown below:
extract name=”Oxide thickness” thickness
material=”SiO~2” mat.occno=1 x.val=0.5
quit
 This extraction will calculate the thickness of the top (first) oc-
currence of the silicon oxide (the silicon oxide can be substituted for
the material = “SiO~2”) for a 1D cutline taken where x.val=0.5.
The results from the extract statements are printed in a bottom
half of the Deckbuild window:
EXTRACT> extract name=”Oxide thickness” thickness
material=”SiO~2” mat.occno=1 x.val=0.5
Oxide thickness=3729.08 angstroms (0.372908um)
X.val=0.5
The extracted SiO2 thickness is 3729 Å, and approximately
equal to the measured value (0.37 µm).
 DIFFUSION Guideline

the Athena code fragment to simulate the phosphorus pre-

depo-sition at 950 °C for 30 minutes is shown below in bold:
go athena
line x loc=0.0 spac=0.01
line xx loc=1.0
line loc=1.0 spac=0.01
spac=0.01
line
line yy loc=0.0
loc=0.0 spac=0.01
spac=0.01
line
line yy loc=1.0
loc=1.0 spac=0.01
spac=0.01
initialize
initialize silicon orient=100c.boron=1e15
silicon orient=100 c.boron=1e15 one.d
one.d
diffusion
diffusion time=30
time=30temperature=950
temperature=950pressure=1.0 hcl.
pressure=1.0
hcl.pc=0 c.phos=1.0e20
pc=0 c.phos=1.0e20
structure outfile=predeposition.str
structure outfile=predepsition.str
tonyplot predeposition.str
tonyplot predepsition.str

Xj

Figure 4.4.
Figure 4.4 Dopant
Dopantdistributions after
distributions the pre-deposition
after diffusion
the pre-deposition of phos-
diffusion of
phorus atoms
phosphorus atoms

Figure 4.4 shows dopant distributions after the pre-deposition

diffusion of phosphorus 1×1020 cm-3 into a Si wafer of 1×1015 cm-3 of
boron dopants carried out at 950 °C. In such a process, the p-n junc-
tion occurs in the plane in which the concentration of the diffused
dopants, phosphorus in this case, decreases to the value that is equal
to the concentration of the p-type dopants in the Si wafer. The point
 Figure 4.4 shows dopant distributions after the pre-deposition
diffusion of phosphorus 1 × 1020 cm-3 into a Si wafer of 1 × 1015 cm-3
of boron dopants carried out at 950 °C. In such a process, the p-n
junction occurs in the plane in which the concentration of the dif-
fused dopants, phosphorus in this case, decreases to the value that
is equal to the concentration of the p-type dopants in the Si wafer.
The point at which this happens is known as the junction depth Xj,
which approximates 0.2 μm shown in Figure 4.4.
Athena can also extract parameter values from the simulation.
In this case, the parameters of interest are the junction depth Xj, the
sheet resistance ρs and the surface concentration N0. The extract
statement of the junction depth Xj is shown below:
extract name=”Junction Depth” xj material=”Silicon”
mat.occno=1 x.val=0 junc.occno=1
The extract statement of the sheet resistance ρs is shown be-
low:
extract name=”Sheet Resistance” sheet.res
material=”Silicon” mat.occno=1 x.val=0 region.occno=1
For surface concentration N0, specify surf.conc as the extrac-
tion target, and specify the name of the impurity: impurity=”Net
Doping”. A point within the semiconductor structure is given using
x.val=0.0. The full extraction statement for the surface concentra-
tion N0 is shown below:
extract name=”Surface concentration” surf.conc
impurity=”Net Doping” material=”Silicon” mat.occno=1
x.val=0.0
The results from the extract statements are printed in a bottom
half of the Deckbuild window:
EXTRACT> extract name=”Junction Depth” xj
material=”Silicon” mat.occno=1 x.val=0 junc.occno=1
Junction Depth=0.199918 um from top of first Silicon
layer X.val=0
 EXTRACT> extract name=”Sheet Resistance” sheet.res
material=”Silicon” mat.occno=1 x.val=0 region.occno=1
Sheet Resistance=97.4889 ohm/square X.val=0
EXTRACT> extract name=”Surface Concentration” surf.
conc impurity=”Net Doping” material=”Silicon” mat.occ-
no=1 x.val=0
Surface Concentration=9.99999e+019 atoms/cm3 X.val=0
The extracted junction depth Xj is 0.199918 μm, sheet resistan-
ce ρs is 97.4889 Ω/□, surface concentration N0 is 1 × 1020 cm-3.
As previously mentioned the drive-in diffusion, which drives
the dopants deeper into the Si wafer to a desired depth, follows after
pre-deposition. The Athena code to simulate this drive-in stage is
shown below in bold:
go athena
line x loc=0.0 spac=0.2
line x loc=8.0 spac=0.2
line y loc=0.0 spac=0.2
line y loc=8.0 spac=0.2
initialize silicon orient=100 c.boron=1e15 one.d
# Pre-deposition diffusion of phosphorus dopants
diffusion time=30 temp=950 press=1.0 hcl.pc=0
c.phos=1.0e20
# Saving structure
structure outfile=predepsition.str
# Phosphorus drive-in: 60 minutes, 1175 ºC
diffusion time=60 temp=1175 dryo2 press=1.0 hcl.pc=3
# extract Xj, ρs, N0
extract name=”xj” xj material=”Silicon” mat.occno=1
x.val=0 junc.occno=1
extract name=”rho” sheet.res material=”Silicon” mat.
occno=1 x.val=0 region.occno=1
extract name=”Ns” surf.conc impurity=”Phosphorus”
material=”Silicon” mat.occno=1 x.val=0
 # Saving the structure of drive-in for 60 minutes
structure outfile=drive _ in _ 60min.str
# Phosphorus drive-in: 90 minutes, 1175 ºC
diffusion time=30 temp=1175 dryo2 press=1.0 hcl.pc=3
# extract Xj, ρs, N0
extract name=”xj” xj material=”Silicon” mat.occno=1
x.val=0 junc.occno=1
extract name=”rho” sheet.res material=”Silicon” mat.
occno=1 x.val=0 region.occno=1
extract name=”Ns” surf.conc impurity=”Phosphorus”
material=”Silicon” mat.occno=1 x.val=0
# Saving the structure of drive-in for 90 minutes
structure outfile=drive _ in _ 90min.str
# Phosphorus drive-in: 120 minutes, 1175 ºC
diffusion time=30 temp=1175 dryo2 press=1.0 hcl.pc=3
# extract Xj, ρs, N0
extract name=”xj” xj material=”Silicon” mat.occno=1
x.val=0 junc.occno=1
extract name=”rho” sheet.res material=”Silicon” mat.
occno=1 x.val=0 region.occno=1
extract name=”Ns” surf.conc impurity=”Phosphorus”
material=”Silicon” mat.occno=1 x.val=0
# Saving the structure of drive-in for 120 minutes
structure outfile=drive _ in _ 120min.str
# Plot the structures to compare
tonyplot –overlay drive _ in _ 60min.str drive _ in _
90min.str drive _ in _ 120min.str
quit
Figure 4.5 shows a one dimensional dopant profile of the drive-
in diffusion of phosphorus, pre-deposited 1 × 1020 cm-3 at 950 °C for
30 minutes, into a silicon wafer doped with 1 × 1015 cm-3 of boron
dopants for increasing drive-in diffusion time. As the diffusion time
increases, the diffusion front moves deeper into the silicon wafer.
This means an increase in Xj. As the junction depth Xj increases, the
surface concentration N0 must decrease, so that the area under the
curve can remain constant with time. The various junction depths
Xj, sheet resistances ρs and surface concentrations N0 are extracted
and presented in Table 4.2.

Figure
Figure 4.5. Dopantdistributions
4.5 Dopant distributions of the
of the drive-in
drive-in diffusion
diffusion at increasing
at increasing diffu-
diffusion time
sion time

Table 4.2 Junction depths, sheet resistances and surface concentrations for
various drive-in diffusion times
Table 4.2. Junction depths, sheet resistances and surface
Drive-in 60 min. 90 min. 120 min.
concentrations for various drive-in diffusion times
diffusion time
Drive-in
Xj (microns) 603.26
min 90 min
3.91 120 min
4.47
diffusion time
ȡs (ohms/square) 48.74 46.13 44.20
Xj (microns)
N0 (cm-3)
3.26
1.06×1019
3.91
0.88×1019
4.47
0.77×1019
ρs (ohms/square) 48.74 46.13 44.20
N0 (cm-3) 1.06Work
× 1019 assignments
0.88 × 1019 0.77 × 1019
1. Comment on the pre-deposition step of the dopant diffusion.
2. Comment on the drive-in step of the dopant diffusion.
3. Simulate the pre-deposition of phosphorous (the surface con-
centration N0=5×1018 cm-3) into an p-type (100) Si wafer at 850 °C
for 15 minutes, if the Si wafer is doped with B at a level of 3×1016
 ION IMPLANTATION

Guideline

the Athena code fragment to simulate the ion implantation pro-

cess is shown below in bold:

go athena
line x loc = 0.0 spac=0.2
line x loc = 8.0 spac=0.2
line y loc = 0.0 spac=0.01
line y loc = 2.0 spac=0.01
initialize silicon orient=100 c.phosphor=1.0e14 one.d
# Implant boron
implant boron energy=100 dose=6.0e14 pears tilt=7
struct outfile=implant _ 100keV.str
tonyplot implant _ 100keV.str
The implant statement is used modelling the implantation of
ionized impurities into the Si wafer. The energy statement speci-
fies the implant energy in keV. The dose statement allows the user
to specify the dose of the implant. The units are in cm 2. The pears
statement is a mathematical model (the Dual Pearson Model) used
to simulate the ion implantation. The tilt statement allows the user
to specify the angle normal to the wafer that the impurity was im-
planted at.
 The following statements extract the junction depth Xj, which is
the depth where the silicon wafer doping and the implanted dopants
cancel each other out:
# Extract Xj
extract name=”Junction Depth” xj silicon mat.occno=1
x.val=0.0 junc.occno=1
The following statements extract the peak carrier concentra-
tion Npeak, which is the maximum concentration of dopants in the
implanted region:
# Extract N peak
extract name=”Peak” max.conc impurity=”boron”
material=”silicon” x.val=0.0
The extract statement of the projected range Rp is shown be-
low:
# Extract R p
extract name=”Range” x.val from curve(depth,
impurity=”boron” material=”silicon” mat.occno=1) where
y.val=max(curve(depth, impurity=”boron” material=”silicon”
mat.occno=1))
The ΔRp is sometimes referred to as the range straggle. The
measurement units are either in angstroms (Å) or microns (μ) (see
Figure 5.1). The extract statement of the range straggle ΔRp is shown
below:
# Extract ΔR p
extract name=”StragglePoint” x.val from curve(depth,
impurity=”boron” material=”silicon” mat.occno=1) where
y.val=max(curve(depth, impurity=”boron” material=”silicon”
mat.occno=1))*0.6
extract name=”Straggle” ($Range - $StragglePoint)
Figure 5.1 shows a simulated Dual Pearson implantation profile
of boron (100 keV, 6 × 1014 cm-2) for a tilt angle of 7°. From this fi-
gure and extract commands, it can be seen that the junction depth
Xj of the structure is about 0.88 µm, the peak carrier concentration
Npeak is about 2.7 × 1019 cm-3, the projected range Rp is about 0.33 μm,
and the range straggle ΔRp is about 936 Å.

Figure
Figure 5.1.5.1 Thedoping
The dopingprofile
profile after
after the
theion
ionimplantation
implantationprocess
process

The Athena code fragment to simulate the annealing process in a

neutral environment,
The Athena code N 2 atmosphere,
fragment is shownthe
to simulate below in bold:process in
annealing
a neutral environment,
# The annealing N atmosphere,
process:
2
is shown
heating cycle below
for 30inmin
bold:
# diff time=30 temp=800
The annealing t.final=1000
process: nitro
heating cycle forpress=1.0
30 min
hcl.pc=0
diff time=30 temp=800 t.final=1000 nitro press=1.0
# Holding cycle of 90 min
hcl.pc=0
diff time=90 temp=1000 nitro press=1.0 hcl.pc=0
# Holding cycle of 90 min
# Cooling cycle for 30 min
diff time=90 temp=1000 nitro press=1.0 hcl.pc=0
diff time=30 temp=1000 t.final=800 nitro press=1.0
# Cooling cycle for 30 min
hcl.pc=0
diff time=30 temp=1000 t.final=800 nitro press=1.0
# Extract Xj,Nmax, Rp, ǻRp after annealing process
hcl.pc=0
extract name="Junction Depth" xj silicon mat.occno=1
x.val=0.0 junc.occno=1
# Extract Xj,N max, Rp, ΔRp after annealing process
extract
extract name=”Junction Depth” impurity="boron"
name="Peak" max.conc xj silicon mat.occno=1
mate-
rial="silicon"
x.val=0.0 x.val=0.0
junc.occno=1

52
 extract name=”Peak” max.conc impurity=”boron”
material=”silicon” x.val=0.0
extract name=”Range” x.val from curve(depth,
impurity=”boron” material=”silicon” mat.occno=1) where
y.val=max(curve(depth, impurity=”boron” material=”silicon”
mat.occno=1))
extract name=”StragglePoint” x.val from curve(depth,
impurity=”boron” material=”silicon” mat.occno=1) where
y.val=max(curve(depth, impurity=”boron” material=”silicon”
mat.occno=1))*0.6
extract name=”Straggle” ($Range - $StragglePoint)
# Saving structure after the annealing process
struct outfile=after _ anneal.str
#Plot structures to compare
tonyplot -overlay -st implant _ 100keV.str after _ an-
neal.str
quit
From the command above, the annealing process is a combi-
nation of a ramp heating (from 800 to 1000 °C within 30 min), a
holding (at 1000 °C for 90 min) and a controlled cooling cycle (from
1000 to 800 °C within 30 min). These annealing temperatures are
required to reduce the implantation damage and activate the im-
planted atoms. Figure 5.2 shows a one dimensional dopant profile,
before and after the annealing process. As annealing temperature
and time increase, the dopant profile front moves deeper into the Si
wafer. As the junction depth Xj increases, the peak carrier concentra-
tion Npeak must decrease so that the area under the curve can remain
constant with time and temperature. The extracted junction depth
Xj is 1.17 μm, the peak carrier concentration Npeak is 9.9 × 1018 cm-3,
the projected range Rp is 0.32 μm, and the range straggle ΔRp is
0.252 μm.
Usually in practice, the ions beam is tilted by 7…10° from the
(100) or the (111) directions.
 Figure 5.2.5.2
Figure TheThedoping
dopingprofile
profile before andafter
before and afterthe
theannealing
annealing process
process

The Athena code to simulate the tilt angle dependence of B ion

implants into (100)
The Athena codeSitois simulate
shown below
the in
tiltbold:
angle dependence of B ion
implants
go into (100) Si is shown below in bold:
athena
goline
athena
x loc = 0.0 spac=0.2
line
line xx loc
loc =
= 0.0 spac=0.2
8.0 spac=0.2
line
line xy loc
loc =
= 8.0 spac=0.2
0.0 spac= 0.01
line
line yy loc
loc =
= 0.0 spac== 0.01
1.0 spac 0.01
line y loc =silicon
initialize 1.0 spac = 0.01 one.d
orient=100
initialize
#Save resultssilicon
into aorient=100
file one.d
#Save results
struct into a file
outfile=initialize.str
struct outfile=initialize.str
#The tilt angle of boron ion implantation is 0°
#The tilt angle of boron
implant boron energy=35 ion implantation
dose=1e13 is 0°
pears tilt=0
implant boron energy=35 dose=1e13 pears tilt=0
struct outfile=tilt_0deg.str
struct outfile=tilt _ 0deg.str
#Re-initialize the silicon substrate and continue
#process simulation 54
 init infile=initialize.str
#The tilt angle of boron ion implantation is 2°
implant boron energy=35 dose=1e13 pears tilt=2
struct outfile=tilt _ 2deg.str
#Re-initialize the silicon substrate and continue
#process simulation
init infile=initialize.str
#The tilt angle of boron ion implantation is 5°
implant boron energy=35 dose=1e13 pears tilt=5
struct outfile=tilt _ 5deg.str
#Re-initialize the silicon substrate and continue
#process simulation
init infile=initialize.str
#The tilt angle of boron ion implantation is 7°
implant boron energy=35 dose=1e13 pears tilt=7
struct outfile=tilt _ 7deg.str
#Re-initialize the silicon substrate and continue
#process simulation
init infile=initialize.str
#The tilt angle of boron ion implantation is 10°
implant boron energy=35 dose=1e13 pears tilt=10
struct outfile=tilt _ 10deg.str
#Plot doping profiles to compare
tonyplot -overlay -st tilt _ 0deg.str tilt _ 2deg.str
tilt _ 5deg.str tilt _ 7deg.str tilt _ 10deg.str
From the command above, the crystallographic (100) orienta-
tion of the Si wafer was initialized and saved in initialize.str. The
initialize.str file can be reloaded back into Athena using the state-
ment init infile to re-initialize the structure and continue process
simulation. It allows performing different tilt angle simulations at
the same time.
 Channeling

Figure 5.3.5.3The
Figure Thetilt
tiltangle
angledependence ofboron
dependence of boronimplant
implant profiles
profiles in (100)
in (100) Si Si

Figure 5.3 shows the tilt angle dependence of B ion implants

into (100) 5.3
Figure Si. As can be
shows theseen
tilt the boron
angle distributionof
dependence is B
very
ionsensitive
implants
even for a small variation in the tilt angle. The channeling
into (100) Si. As it can be seen the boron distribution is very sensi-effect can
be clearly seen at angle less than 2° and that channeling
tive even for a small variation in the tilt angle. The channeling ef-is progres-
sively decreased with increasing tilt angle. For a tilt of 7°, channeling
fect can be clearly seen at angle less than 2° and that channeling is
is reduced significantly.
progressively decreased with increasing tilt angle. For a tilt of 7°,
channeling is reduced significantly.
Work assignments
1. Describe the ion implantation process for introducing dopants
into the Si wafer.
2. B ions are implanted into an As-doped (ND = 2.3×1015 cm-3)
Si wafer. The implantation energy is 125 keV, and the dose is
3.2×1015 cm-2. Plot the B concentration as a function of depth. What
is the projected range and straggle of the implantation? What is the
peak concentration of B ions? Find the location of the p-n junction?

56