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Chapter 2 discusses the concept and algorithms behind mixer design, focusing on the function of mixers as multipliers that produce output signals based on the combination of RF and local oscillator signals. It details various types of mixers, including singly balanced and double-balanced diode mixers, as well as FET mixers, highlighting their configurations, advantages, and disadvantages. The chapter emphasizes the importance of understanding the mixing process for effective design and performance prediction.

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0% found this document useful (0 votes)
2 views

754704

Chapter 2 discusses the concept and algorithms behind mixer design, focusing on the function of mixers as multipliers that produce output signals based on the combination of RF and local oscillator signals. It details various types of mixers, including singly balanced and double-balanced diode mixers, as well as FET mixers, highlighting their configurations, advantages, and disadvantages. The chapter emphasizes the importance of understanding the mixing process for effective design and performance prediction.

Uploaded by

jonyg01
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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CHAPTER 2

The Concept and Algorithm of Mixer Design


2.1 Mixer Concept

Up-converter
⎡1 1 ⎤
A(t ) ⎢ COS (ω S − ω P )t + COS (ω S + ω P )t ⎥ 1
⎣2 2 ⎦ A(t )Cos (ω s + ω p )t
2
A(t )Cosω s t
High- or low-
pass filter
Down-converter
1
A(t )Cos (ω s − ω p )t
2

Figure 2.1 Ideal multiplier mixer models showing both up and down converter

performance, from Maas “Microwave Mixer” [12]

The mixer, which can consist of any device capable of exhibiting nonlinear performance,

is essentially a multiplier. That is, if at least two signals are present, their product will be

produced at the output of the mixer. This concept is illustrated as shown in Fig. 2.1. The RF

signal applied has a carrier frequency of x with modulation M(t), and the local oscillator

signal (LO or pump) applied has a pure sinusoidal frequency of x. From basic trigonometry

we know that the product of two sinusoids produces a sum and difference frequency. Either of

these frequencies can be selected with the IF filter.

A mixer can also be analyzed as a switch that is commutated at a frequency equal to the

pump frequency x. This is a good first-order approximation of the mixing process for a diode

since it is driven form the low-resistance state (forward bias) to the high-resistance state

(reverse bias) by a high-level LO signal. The simplified diode model is shown in Fig. 2.2.

With this switching action in mind, a single-ended mixer can be represented by the circuit as

shown in Fig. 2.3a.

4
S(t)
1.0

VIF S(t)
t
IF Load

Vrf

Figure 2.2 Single-ended mixer employing diode switching model, from Mass

“Microwave Mixer”

2.2 Balance Diode Mixer (from Mass ” Nonlinear Microwave and RF Circuits”,

second edition. [14])

L1
RF D1
IF
180-degree
Hybrid
LO
D2
L2
0

Figure 2.3 A singly balance mixer: Diodes D1 and D2 can be unmatched diodes or complete

individual single-diode mixers. From Mass “ Nonlinear Microwave circuits”

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Figure 2.3 shows a singly balanced mixer that uses a 180-degree hybrid. The RF and LO

are connected to one pair of mutually isolated ports; the single-diode mixers, represented by

diode symbols in this figure, are connected to the other pair.

In a singly balanced mixer, it is essential that the dc path through the diodes be

continuous. If the diodes are open-circuited at dc, the mixer simply will not work. Often, the

hybrid provides that path. In Figure 2.3 the inductors L1 and L2 realized the so-called IF

return; the inductors also provide a dc return in cases where the hybrid does not, dc bias, if

desired, can be provided to both diodes by a voltage source in series with either of these

inductors. If bias is used, dc blocks between the hybrid and diodes also may be necessary.

2.3 Double-balanced Diode Mixers

Figure 2.4 Block diagram of double-balanced diode mixer

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Figure 2.5 RF voltage waveform versus time in ns

Figure 2.6 LO voltage waveform versus time in ns

Figure 2.7 IF voltage waveform (Vrf * Vlo) versus time in ns

A double-balanced diode mixer normally make use of four diodes in a ring or star

configuration with both the LO and RF being balanced. All ports of the mixer are inherently

isolated from each other. Matched diode rings (fabricated in close proximity on the same

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substrate material) are readily available in SOT143 plastic packages. Advantages of the

double-balanced design over the single balanced design are increased linearity, improved

suppression of spurious products (all even order products of the LO and/or the RF are

suppressed) ant the inherent isolation between all ports. The disadvantages are that they

require a higher level LO drive and require two baluns. Figure 2.4 shows a block diagram of a

double balanced quad-ring diode mixer. Details of the star topology can be found in [12]. The

operation of a double balanced mixer is best understood by considering the diodes as switches.

The LO alternately turns the right hand pair and left hand pair of diodes on and off in

anti-phase. Points ‘a’ and ‘c’ are virtual earths to the RF signal and can be considered as

connected to ground. Thus points ‘b’ and ‘d’ (the balanced RF signal) are alternately

connected to ground (at points ‘a’ and ‘c’). This means an in-phase RF signal and an

anti-phase RF signal are alternately routed to the IF port under control of the LO. Thus the

signal at the IF port is effectively the RF signal multiplied by an LO square wave of peak

magnitude ±1.

This action is easily demonstrated using simple mathematical processing software.

Figure 2.5 shows a sinusoidal voltage waveform at a frequency of 1GHz, this is the RF

waveform. Figure 2.6 shows a square wave at a frequency of 870MHz, this is the LO

switching waveform. Multiplication of the two will produce a waveform wit a strong

component at the difference frequency (IF) of 130MHz.

Figure 2.7 shows the result of multiplying the RF and LO waveforms. A low

frequency sinusoid is clearly visible. This is a replica of the RF signal (i.e. a sinusoid)

translated to the IF frequency of 130MHz. Although this method of mixer analysis provides a

qualitative understanding of how the mixer functions, it is not adequate to predict the RF

functionality. Ideal square wave multiplication, such as this, results in a conversion loss of

3.9dB. In practice diode-ring mixers have additional losses (in the baluns and diodes) and

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imperfections that increase the conversion loss actually achieved. A loss of between 6 and

8dB is typical for a well-designed diode ring mixer. In order to predict accurately the mixer’s

performance, large signal circuit simulation must be performed. The block diagram in Figure

9 shows the differential RF and LO signals provided using wire-wound ferrite transformers.

Wire-wound transformers can be used at frequencies up to over 2GHz but lower cost printed

or lumped element baluns are often implemented in practical mixers. At higher frequencies

wire wound transformers become impractical and printed and/or lumped baluns become the

norm. Care should be taken to consider how the performance of these baluns differs from

wound transformers; additional filtering may be necessary.

2.4 FET Mixer

Figure 2.8 Simple transconductance mixer

Figure 2.9 Dual gates FET mixer block diagram

9
Figure 2.10 Simple equivalent circuit of a passive switching FET

Figure 2.11 Circuit diagram of a FET based switching mixer

10
Figure 2.12 FET quad ring mixer

FETs can be used in mixers in both active and passive modes. Active FET mixers are

transconductance mixers using the LO signal to vary the transconductance of the transistor.

They have the advantage of providing the possibility of conversion gain rather than loss and

can also have lower noise figures than passive designs. Figure 2.8 shows the simplest

realization of a transconductance mixer; biasing circuitry has been omitted for clarity. The RF

(and LO) short circuit at the drain is important to ensure that the value of Vds is not moved

significantly from its DC bias point by the applied LO. This ensures the magnitude of the time

varying transconductance is maximized so optimizing the conversion gain. Unfortunately it

also means that this mixer topology is not well suited to realizing up converters.

The topology of Figure 2.8 has the disadvantage that some form of diplexing is

required to separate the RF and LO inputs which are incident on the same port. For this reason

dual gate FET mixers are often used. This topology is essentially a cascade arrangement of

two transistors as shown in Figure 2.9, although in practice four terminal dual gate FET

devices are sometimes used.

11
The RF input is applied to the bottom device which is matched using the well-known

techniques developed for amplifier design, the LO signal is applied to the top device, which is

often resistively matched. One advantage this structure has is that the LO and RF signals are

inherently isolated. It can be used to develop compact mixers with conversion gain, as

described in [9]. Although the potential of conversion gain rather than loss, which the

transconductance mixer offers, is attractive the downside is that they tend to have lower

linearity than passive designs. When used in passive mode, the FET is used as a switch. Its

suitability for switch realization stems from the fact that its drain-source resistance behaves as

a voltage variable resistor, the resistance being set by the gate-source voltage [10]. When used

as a switch, a FET is operated with the drain and source at zero volts DC. The RF signal path

is drain to source and the gate is the control terminal. The simplified equivalent circuit shown

in Figure 2.10 can represent it.

A simple FET switching mixer, which can provide high linearity for moderate LO

drive levels, is shown in Figure 2.11. The gates of the FETs are biased part way between 0V

and pinch off, this allows the LO signal to move the FETs between their “on” and “off” states.

At lower RF frequencies FET gates have high input impedance and the load for the

differential LO signal is thus approximately 2Rg (Figure 2.11). By setting Rg to a moderately

high value say (200 or 300Ω), increased gate voltage swing can be obtained for the same LO

level as compared to driving a 100Ω differential load. At higher frequencies, the input

capacitance of the FET gate presents a lower reactance and the LO voltage swing will be

reduced for the same LO power level. FET switching mixers will not function well if the gates

are left unbiased. If the LO signal is large enough to turn the FETs “off” on the negative cycle,

it will drive the gate-source junction in to forward bias on the positive cycle. It is vital that the

gate bias voltage is set appropriately if optimum mixer performance is to be obtained. For

discrete implementations this gives a problem as the specified range of pinch-off voltages for

12
the FETs can be very wide (-0.5V to –2.5V is a typical range). Whilst integrated designs can

overcome this problem with on-chip bias circuitry, for discrete designs there are two solutions:

Select on test resistors can be used to set the bias or a supply of FETs with a reduced range of

pinch-off voltages can be agreed with the manufacturer. Both solutions have cost penalties.

A practical implementation of this switching mixer had a conversion loss of 8dB and an input

1dB compression point of +8dBm for an LO signal level of +5dBm.

Double-balanced FET quad ring mixers, analogous to the diode-ring mixer (Section 2.3)

can also be used. An additional IF balun is required, as shown in Figure 2.12. The LO signal

switches Q1 and Q3 on and off in anti-phase with Q2 and Q4. The effect of this is that the RF

signal and a 180° phase shifted version of the RF signal are alternately routed through to the

IF port. As with the diode ring, this means the IF output is effectively the RF signal multiplied

by an LO square wave of peak magnitude ±1. The additional cost and complexity of this

topology means it is not a popular choice for discrete realizations, although it has been used

successfully on integrated designs [11].

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