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Double Input Boost/Y-Source DC-DC Converter for Renewable Energy Sources

Thesis · July 2019

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 PES UNIVERSITY
(Established under Karnataka Act No. 16 of 2013)
100-ft Ring Road, Bengaluru – 560 085, Karnataka, India

Dissertation on
‘Double Input Boost/Y-Source DC-DC Converter for
Renewable Energy Sources’

Submitted by
NITEESH S SHANBOG
(PES1201702421)
Aug. 2018 - May 2019

under the guidance of

Internal Guide
Mrs. Pushpa K. R.
Assistant Professor,
Department of Electrical and Electronics Engineering
PES University
Bengaluru -560085

FACULTY OF ENGINEERING

DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

MASTER OF TECHNOLOGY
Scanned by CamScanner
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 ABSTRACT

With the increasing adoption of renewable energy sources by domestic users, decen-
tralisation of the grid is fast becoming a reality. Distributed generation is an important
part of a decentralised grid. This approach employs several small-scale technologies to
produce electrical energy close to the end users or consumers. The higher reliability
of these systems proves to be of advantage when compared to traditional generation
systems. Multi-Input Converters (MICs) perform a decisive function in Distributed En-
ergy Resources (DERs). Making use of such MICs prove to be beneficial in terms of
size, cost, number of components used, efficiency and reliability as compared to using
several independent converters. This thesis proposes a double input DC-DC converter
which makes use of a quasi Y-source converter in tandem with a boost converter. The
quasi Y-source converter has the advantage of having a very high gain for low duty
cycles. The associated operating modes are analysed and the operation of the MIC is
verified using simulation result. A hardware prototype is built for large signal analysis
in open loop. Different loads are applied and the efficiency of the MIC as a whole as
well as the load sharing between the different sources is investigated.

Keywords: DC-DC Converter, Y-Source Impedance Network, Distributed Generation,

Multi-Input Converters

5
 TABLE OF CONTENTS

ABSTRACT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
LIST OF FIGURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iii
LIST OF TABLES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iv

1 Introduction 1
1.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Types of Multi-Input Converters . . . . . . . . . . . . . . . . . . . . . . 3
1.3 Thesis organisation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Literature Review 6

3 Multi-Input Converter 9
3.1 Synthesis of Multi-Input Converter . . . . . . . . . . . . . . . . . . . . . 9
3.2 Quasi Y-Source Converter . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.3 Zeigler Nichols Tuning Method . . . . . . . . . . . . . . . . . . . . . . . 11
3.4 Double Input Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

4 Simulation 16
4.1 Simulation Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.1.1 Turns ratio of Three Winding Transformer . . . . . . . . . . . . . 16
4.1.2 Zeigler Nichols Tuning . . . . . . . . . . . . . . . . . . . . . . . 17
4.2 Simulation Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

5 Hardware Implementation 19
5.1 Hardware Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5.1.1 PWM Generation . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5.1.2 Gate Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5.1.3 Inductor Design . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

i
 5.1.4 Switch Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
5.2 Hardware Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

6 Results and Conclusion 28

6.1 Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
6.2 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
6.3 Future Scope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
REFERENCES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Appendices

Appendix A DATASHEETS 37

Appendix B TOROIDAL CORE DETAILS 46

ii
 LIST OF FIGURES

1.1 Multiple photovoltaic sources employing Multi-Input Converters . . . . 2

1.2 Hybrid Electric Vehicles with multiple converters . . . . . . . . . . . . 3
1.3 Photovoltaic system employing Multi-Input Converters . . . . . . . . . 3
1.4 Series Multi Input Converter . . . . . . . . . . . . . . . . . . . . . . . 4
1.5 Parallel Multi Input Converter . . . . . . . . . . . . . . . . . . . . . . 4
3.1 Circuit Diagram of Quasi Y-Source DC-DC Converter . . . . . . . . . . 10
3.2 Closed Loop Control System with Proportional Controller . . . . . . . . 12
3.3 Sustained Oscillation observed during Zeigler Nichols Tuning . . . . . 13
3.4 Proposed Double Input DC-DC Converter . . . . . . . . . . . . . . . . 14
3.5 Operating Modes in the Double Input Converter . . . . . . . . . . . . . 15
4.1 Simulation Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . 17
4.2 Control Loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.3 Output Voltage of the Double Input Converter . . . . . . . . . . . . . . 18
4.4 Gating signals for the MOSFETs in the Double Input Converter . . . . . 18
5.1 Master-Slave configuration in TL494 . . . . . . . . . . . . . . . . . . . 20
5.2 A Schematic of Buffer Amplifier . . . . . . . . . . . . . . . . . . . . . 21
5.3 Schematic of Optocoupler . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.4 A Schematic of IR2101 Gate Driver . . . . . . . . . . . . . . . . . . . 23
5.5 Hardware Implementation of the Double Input Converter . . . . . . . . 26
5.6 Operation of Double Input Converter . . . . . . . . . . . . . . . . . . . 26
6.1 Input power vs Output load . . . . . . . . . . . . . . . . . . . . . . . . 28
6.2 Load Sharing by the two converters . . . . . . . . . . . . . . . . . . . . 29
6.3 Efficiency of the Double Input Converter at different loads . . . . . . . 30

iii
 LIST OF TABLES

3.1 Gain of Quasi Y-Source Converter for different δ and turns ratios . . . . 11
3.2 PID Controller parameters and their effect on system response . . . . . 12
3.3 Gain Estimator Chart . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.1 Simulation parameters for the Double Input Converter . . . . . . . . . . 16

iv
v
 CHAPTER 1

Introduction

1.1 Introduction

Multi-Input Converters (MICs) are growing in popularity because of their newfound

applications in the modern energy system. The entry of renewables into the energy
system is a precursor to the rapid spread of distributed generation technologies. Re-
newable energy sources like solar and fuel cells are DC in nature. Also, the ability of
renewable sources to be installed on a small scale is leading to the adoption of these
power sources at the domestic level. Distributed generation at domestic level which
includes significant amounts of renewable energy sources is one of the most important
applications of power electronics based converters. To aggregate the numerous sources,
the development of a Multi-Input converter takes prominence.
In most modern day systems, the power generated, output load demand or some-
times both change dynamically and are not the same at any given instant as they ideally
should be. Providing a perfect synergy between the input power source and the output
sink is thus, a complicated task. Additional sources thus become necessary to aid the
primary power source in satisfying the load demand in a reliable manner.
It is in such situations that MICs have started to play a pivotal role. One single
MIC can thus be able to replace numerous converters leading to significant savings.
These converters can interface different input voltage levels, and blend their individual
superiorities to feed the load. MICs are able to perform this task with a reduced number
of components while also simultaneously aiming for higher reliability and efficiency.
The usual approach to connecting numerous diverse sources is to connect them in ei-
ther series or in parallel. However, the sources that are connected in parallel must carry
the same current, which is not always feasible. Since the sources may have varying

1
 CHAPTER 1 – Introduction

voltage levels, connecting them in parallel directly will not be feasible. This is where
MICs come into play. The MICs consists of different power electronic converters which
convert the different input voltages to into a single output voltage which can supply the
load.
A prime example of such a system with multiple sources is a Photo Voltaic (PV)
system which is shown in Fig 1.1. This generic system consists of two power sources,
the PV cells and the battery pack. The supply by the solar cells are not consistent and
depends on uncontrollable factors like availability of clear skies and the time of the
day. This system requires additional supplies like a battery pack or ultra-capacitors to
handle the excess load demand. In case of excess generation of energy by the solar cells
because of clear sunny days, the use of bidirectional converters enable the batteries to
be recharged. The use of multiple converters is therefore very common in a large system
having multiple photovoltaic sources.

Fig. 1.1 Multiple photovoltaic sources employing Multi-Input Converters

Hybrid Electric Vehicles (HEVs) are another system which makes use of multiple
converters. HEVs use an internal combustion engine along with a battery pack or ultra-
capacitors which can act either as a power source or as an energy storage unit depending
on various conditions. Use of such a system enables the internal combustion engine to
run at optimum efficiency and any additional energy requirement during acceleration or
for power steering can be supplied by the connected batteries or ultracapacitors. Using
more than one electric power source in such a system improves the efficiency of the
system. Thus the use of multiple converters become inevitable. The block diagram of
such a system having two bidirectional converters is shown in Fig 1.2.

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 CHAPTER 1 – Introduction

Fig. 1.2 Hybrid Electric Vehicles with multiple converters

In systems such as these, it becomes beneficial to use a single Multi-Input Converter

instead of several discrete converters as it uses a lesser number of components, has more
stability, is simpler to control and also helps to reduce losses. The block diagram of a
system using Multi-Input Converters is shown in Fig 1.3.

Fig. 1.3 Photovoltaic system employing Multi-Input Converters

1.2 Types of Multi-Input Converters

Based on the topology of connection of the multiple converters, the Multi-Input Con-
verter can be classified as parallel or series connected MIC. Fig 1.4 shows a series
connected Multi-Input Converter system which is usually used for low power wind and
solar systems. This converter layout is derived by connecting the output stages of the

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 CHAPTER 1 – Introduction

two DC-DC converters in series.

Fig. 1.4 Series Multi Input Converter

However, output voltage and current regulation are very difficult in such a configura-
tion as both the sources in question may be of a dynamic nature. The main disadvantage
of this system is that the load current flows through both the converters. This causes
a high power loss. The gating signals for the individual converters are conjunctive in
nature which may lead to circulating currents between the two input sources.
Fig 1.5 shows a representative diagram of a system which uses several individual
converters connected in parallel to form a single Multi-Input Converter. All the convert-
ers are linked together at the DC bus. An important feature of such a system is that all
the converters are controlled independently. Such a system is however inherently com-
plex and expensive because of multiple conversion stages and communication devices
which are required for each of the conversion stages.

Fig. 1.5 Parallel Multi Input Converter

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 CHAPTER 1 – Introduction

1.3 Thesis organisation

The thesis is organised as follows. Chapter II contains the literature referenced for this
thesis. Chapter III contains descriptions about the circuits that make up the proposed
converter. It also contains a brief about the proposed converter and its modes of op-
eration. A summary of the method used to determine a closed loop operation is also
given. Chapter IV contains the procedure and the results of the simulation performed
in MATLAB-Simulink. Chapter V contains the design procedure of the components
used in building the hardware of the converter. It also contains the pictures of the out-
put which was obtained by the hardware. Chapter VI contains the analysis of various
results obtained and also the scope for improvement of this converter in the future.

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 CHAPTER 2

Literature Review

Multi-Input Converters (MICs) are growing in popularity because of their newfound

applications in the modern energy system which includes significant amounts of re-
newable energy sources and distributed generation [1]. The pressure to increase the
share of renewable energy in the existing energy infrastructure and to remove the de-
pendence of oil is driving the adoption of renewable sources like solar, wind, and fuel
cells[2]. Renewable energy sources are primarily DC in nature. Another feature of
renewable sources is the absence of large generating areas. Household adoption of
renewable energy creates a large network of distributed generation sources[3]. Dis-
tributed Generation is set to change the way electric power systems operate according
to [4]. The electric power generation trends point towards the disbursed generators of
size kW to MW sitting at the loads as opposed to traditional centralized generators sized
from 100MW to GW and are located at far of places where natural resources are more
readily available. In most modern day systems, the generation and demand balance is
dynamic and difficult to maintain without complicated demand side management tech-
niques [5]. Maintaining the balance between the input source and the output sink is
thus, a complicated task. Additional sources thus become necessary to aid the primary
source to satisfy the load demand.
Liu and Chen have given the general systematic approach to synthesize Multi-Input
Converters in [6]. The Quasi Y-source converter and the boost converter act like a Pul-
sating Current Source Cell according to [6] and hence they must be added together in
parallel before being supplied to the load. Various types of double input converters
which draw from two sources either simultaneously or individually have been imple-
mented in [7], [8] and [9].
Various types of Multiple Input Converter topologies have been compared in [10].

6
 CHAPTER 2 – Literature Review

These converters occupy less space, use fewer semiconductors thereby reducing the
manufacturing cost. Zhao and Kwasinki propose a multiple input converter in [11] espe-
cially for distributed generation applications which allows for the integration of various
renewable sources into a common DC bus. A Multi-Input topology with two separate
boost and buck-boost input legs have been developed in [12] that aims to enhance the
availability of distributed generation sources in microgrids. The multiple input con-
verter is arranged in modules which contain the common parts and the different input
sources are arranged in submodules. This is a highly flexible and scalable topology that
is suitable for renewable energy sources. A further extension of this is the development
of multi-port converters with bidirectional power flow capability which finds increasing
use as the developments in storage technology continue to grow. These multi-port con-
verters have been investigated in [13], [14] and [15] among others. These applications
find mention in the development of stand-alone hybrid microgrids with battery storage
capabilities.
The Y-source impedance network is introduced in converters in order to achieve
higher voltage gains even with small duty cycles. A single switch DC-DC boost con-
verter which makes use of this impedance network has been implemented in [16]. These
types of impedance networks make use of a tightly coupled transformer to achieve the
high gains observed. The quasi Y-Source DC-DC converter proposed in [17] is a modi-
fication to the Y-source converter. This modification over the Y-source converter enjoys
continuous input current characteristics thus enabling it to be used in fuel cells and
photovoltaic systems. Coupled inductors have been used in literature [18] to create
magnetically coupled impedance sources in converters to create high gain at small duty
cycles. The Quasi Y-source converter belongs to this class of converters. The DC-DC
Boost Converter [19] is one of the most elemental power electronics converters which
are used to boost the DC voltage.
A family of different DC-DC boost converters are defined in [20] which makes use
of the high voltage gain applications of this topology in various places like photovoltaic
cells and fuel cells. The Y-source impedance network is combined with boost modules
to provide high gain, continuous input current and inrush current suppression. The
thermal performance and the efficiency of the Y-source converter have been investigated
in [21]. Major losses like conduction, switching, core and winding losses, and capacitor

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 CHAPTER 2 – Literature Review

ESR losses have been evaluated for different gains and winding factors. The results
show that higher is the voltage gain and the winding factor, higher is the power loss and
junction temperature. Various experimental prototypes of the Y-source converter have
been built in [22] which need a small duty ratio to obtain high voltage gains. The Y-
source converter belong to a class of impedance source DC-DC converters which have
been deduced for high gain conversions in [23], [24], [25] and [26].
Double Input Converters have been developed in [27] and energy from two diverse
sources with different I-V characteristics have been integrated to feed a load in a single
stage. Different control strategies and power management techniques have been ex-
plored. [28] develops a double input converter for renewable or non-renewable sources
and then increases the number of inputs and achieves a higher efficiency for this opera-
tion. Low output voltage ripple is achieved even with the addition of multiple sources.
Gummi, Karteek and Ferdowsi have investigated the use of a double input converter in
electrical drives for electric vehicles in [29]. Applications for these types of converters
which make use of multiple numbers of input power sources are on the rise. The re-
duced number of parts in such systems are proving to be of advantage. [29] also tries
to develop a systematic approach to developing a Multi-Input converter for such hybrid
systems.

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 CHAPTER 3

Multi-Input Converter

3.1 Synthesis of Multi-Input Converter

According to [6], the rules for synthesis of MIC depends upon the type of the converters
being used in the system. Both the Quasi Y-Source Converter and the Boost Converter
represent a Pulsating Current Source Cell (PCSC) when the voltage sink is removed.
The Quasi Y-Source Converter is considered as a PWM converter. The converter rep-
resents a pulsating current source with a diode in series. To develop a Multi-Input
Converter, the PCSC has to be connected in parallel with one of the branches of the
Quasi Y-Source Converter. These converters are not connected in series because the
current which is flowing through the connected branch of the boost converter will be
clamped by the pulsating current source. The series diode in the boost converter blocks
any voltage differences which may crop up between the voltage imposed on the boost
converter and the voltage in the connected branch of the Quasi Y-Source Converter.
When the PCSC of the boost converter is being introduced to the voltage sink por-
tion of the Quasi Y-Source converter, it is connected across the voltage sink with its
outgoing current terminal tied to the positive terminal of the output sink.
The following sections give more detail about the topology of the modified Y-Source
converter which is one of the converters used while synthesizing this particular Multi-
Input Converter.
3.2 Quasi Y-Source Converter

The quasi Y-Source DC-DC converter proposed in [17] a modification to the Y source
converter which uses a high impedance network. This modification enjoys continuous
input current characteristics enabling it to be used in fuel cells and photovoltaic systems.
The high voltage gain is also an added advantage.

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 CHAPTER 3 – Multi-Input Converter

Coupled inductors are finding their way into power electronics circuits[18]. One im-
portant application of coupled inductors is in creating magnetically coupled impedance
networks. These impedance networks were used in synthesising the Z - Source Inverter
in 2003. These Z - Source converters initially had a very low voltage gain. With im-
provements and modifications, several new topologies have been developed based on
the impedance networks. The Y source Converter is one among them. Other notable
topologies include the quasi Z - Source and the τ - Source networks.
The presence of an input diode in the above-mentioned networks means the con-
verters which make use of these networks inherently suffer from discontinuous input
current. Continuous input current is an important necessity when the converter is used
for renewable energy sources like fuel cells or photovoltaic cells. Especially in pho-
tovoltaic systems, drawing continuous input current helps the system to operate more
accurately around the maximum power point. The improvement in the efficiency of
the PV system is especially noticeable when continuous current is drawn[17]. The
chopping of the current experienced when discontinuous current is drawn is known to
negatively affect the lifetime of the PV cells. To achieve a continuous input current
when using magnetically coupled impedance sources, a large filter inductor and capac-
itor were added to the original network [17] resulting in a Quasi Y Source Converter.
The Y-Source impedance network is capable of achieving very high gain in smaller duty
cycles.

Fig. 3.1 Circuit Diagram of Quasi Y-Source DC-DC Converter

The circuit of the Quasi Y Source Converter is shown in Fig 3.1. By using KVL, we

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 CHAPTER 3 – Multi-Input Converter

can find the mesh equations during shoot through and non shoot through cycles. The
output equation for the Quasi Y Source Converter is given as,

1 Vm
vo = V = . (3.1)
N1 + N2 in 1 − δDST
1−
N2 − N3
N1 + N2 1
Where, δ = > 1 and, B = .
N2 − N3 1 − δdst

As seen in the above equations, the boosting gain depends on the winding ratios of
the three windings (N1, N2, and N3) and the duty ratio of the switch used. By manipu-
lating the winding ratios, a high gain can be achieved for a relatively lower duty ratio.
For the same duty cycle, a significantly larger gain is achieved than a Z source converter
or a boost converter. The gain of the Quasi Y-Source DC-DC Converter for different
winding factors δ, and turns ratio (N1:N2:N3) is calculated from Eq. 3.1 and shown in
Table 3.1:

Table 3.1 Gain of Quasi Y-Source Converter for different δ and turns ratios

NI:N2:N3 δ Gain
(1:3:1),(1:5:2),(2:4:1) 2 (1 − 2dst )−1
(1:2:1),(3:3:1),(2:4:2) 3 (1 − 3dst )−1
(2:2:1),(1:3:2),(5:3:1) 4 (1 − 4dst )−1
(1:4:3),(2:3:2),(3:2:1) 5 (1 − 5dst )−1
(2:4:3),(3:3:2),(4:2:1) 6 (1 − 6dst )−1

3.3 Zeigler Nichols Tuning Method

The Zeigler-Nichols tuning method is a popular algorithm which is used to tune PID
controllers. This is a heuristic approach, designed to sufficiently reach an immediate
goal without any guarantees that the result found is the most optimal solution that can be
found. The four important parameters that can be controlled using the PID controller are
rise time, overshoot, settling time and the steady-state overshoot. Rise time is defined
as the time taken for the plant to rise to 90% of the desired level for the first time. Rise
time is an important measure of the responsiveness of the system. This usually depends
on the stray capacitances and inductances in the circuit. The overshoot refers to how
much the peak level is higher than the steady state whereas settling time is the time it
takes for the system to converge to steady state. Overshoot is useful for the stability of

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 CHAPTER 3 – Multi-Input Converter

the system and to look after the constraints of the components in the system. Overshoot
is calculated only in the transition period. The settling time is also important for the
stability of the system. The steady state error is the difference between the steady state
output and the desired output. Steady state error gives the accuracy of the system. The
effects of each of the controller parameters Kp , Ki and Kd can be summarized as in
Table 3.2.

Table 3.2 PID Controller parameters and their effect on system response

Steady
Settling
Response Rise Time Overshoot State
Time
Error
Kp Decreases Increases No Change Decreases
Ki Decreases Increases Increases Eliminated
Kd No Change Decreases Decreases No Change

Table 3.2 gives an assessment of the effect of the various controller parameters on
the system response. By fine-tuning the controller parameters we can arrive at a suf-
ficiently good enough model. However, to find the starting point for the tuning is a
cumbersome process. This is where the Zeigler Nichols Method comes into play. Zei-
gler and Nichols conducted a large number of experiments. They then proposed these
rules for determining the controller parameters, namely, Kp , Ki and Kd which are ar-
rived on the basis of the transient response of the plant. They many methods, but in this
thesis, only one method is explored. This is the Zeigler Nichols second tuning method.
In this method, the tuning is first started with a proportional controller to a closed loop
system as shown in Fig 3.2.

Fig. 3.2 Closed Loop Control System with Proportional Controller

The tuning is then begun with a very low or zero value of Kp and marked up grad-
ually. This is done until a steady state oscillation is seen. The gain which is obtained is

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 CHAPTER 3 – Multi-Input Converter

noted as Kcr , or ultimate gain. The period of this sustained oscillation is noted down as
Pcr , or ultimate period as shown in Fig 3.3.

Fig. 3.3 Sustained Oscillation observed during Zeigler Nichols Tuning

Based on the arrived ultimate gain and ultimate period, and by referring to the gain
estimator chart given by Zeigler and Nichols, the controller parameters are chosen. The
gain estimator chart is given in Table 3.3.

Table 3.3 Gain Estimator Chart

Controller Kp Ki Kd
P Controller 0.5Kcr ∞ 0
1
PI Controller 0.45Kcr P
1.2 cr
0
PID Controller 0.6Kcr 0.5Pcr 0.125Pcr

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 CHAPTER 3 – Multi-Input Converter

3.4 Double Input Converter

The proposed Multi-Input Converter topology is derived from two discrete converters:
a Boost DC-DC converter and the Quasi Y-Source Converter. In this type of converter,
both the inputs can be used to supply the load either individually or simultaneously is
the case demanded by the load. The proposed system is illustrated in Fig 3.4.

Fig. 3.4 Proposed Double Input DC-DC Converter

The boost converter consists of a Pulsating Source Current cell which can be con-
nected parallel to the loaded sink in order to synthesise a Multi-Input Converter. This
strategy is utilised in this topology. Vin1 , Vin2 and Vo are the two input voltages and the
output voltage of the converter.N1 ,N2 and N3 are the number of winding turns of the
coupled inductor. The voltage across the primary of the coupled inductor is given by
vL . VC1 and VC2 are the voltages seen across the capacitors C1 and C2 . The voltages
across the input inductors and are given by Vl1 and Vl2 . This converter draws power
from the two discrete sources simultaneously as well as individually. Since there are
two switches, S1 and S2, there are four modes of operation as illustrated in Fig 3.5.
The four modes of operation are as follows:

• Mode I: S1 off, S2 on. The equivalent circuit for this mode is shown in Fig 3.5
(a). The load is supplied by the quasi Y-Source converter, while the input inductor
of the boost converter is getting charged.

• Mode II: S1 on, S2 off. Fig 3.5 (b) shows the equivalent circuit for this mode
of operation The load is entirely supplied by the boost converter while the input

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 CHAPTER 3 – Multi-Input Converter

Fig. 3.5 Operating Modes in the Double Input Converter

inductor of the quasi Y-Source Converter gets charged.

• Mode III: S1 off, S2 off. Fig 3.5(c) shows the equivalent circuit for this mode of
operation. In this mode of operation, both the boost converter as well as the quasi
Y-Source Converter supplies the load.

• Mode IV: S1 on, S2 on. Fig 3.5 (d) shows the equivalent circuit for this mode of
operation. In this mode of operation, the load is disconnected from the supply.
The input inductors of both the boost converter as well as the quasi Y Source
Converter gets charged during this period.
A control strategy can be adapted to chose which of the two sources should be used
a the primary power source. One of the sources can be used to supply the base load
while the other can compensate for changes in load, or change in the source supply.
The simulation of this converter is shown in the next chapter along with the associated
results.

Department of EEE, PES University 15

 CHAPTER 4

Simulation

4.1 Simulation Parameters

MATLAB is a numerical computing environment which allows matrix manipulations

and plotting of functions and implementations of algorithms. Simulink is an exten-
sion to the MATLAB environment which allows for a graphical programming envi-
ronment. Modelling, simulating and analyzing of many multidomain components is
possible through Simulink. MATLAB-Simulink was used to simulate the Multi-Input
Converter in order to verify its performance. The parameters of the simulation blocks
are given in Table 4.1.

Table 4.1 Simulation parameters for the Double Input Converter

Description Values
Input Voltage (vin1 ) 12V
Input Voltage (vin2 ) 24V
Desired Output Voltage (vo ) 48V
Power 80-120W
Input Inductors (L1 and L2 ) 1mH
DC Blocking Capacitor (C1 ) 470µF
DC Blocking Capacitor (C2 ) 150µF
Output Capacitor (Co ) 470µF
Turns Ratio of Transformer 3:2:1
Switching Frequency 20kHz

4.1.1 Turns ratio of Three Winding Transformer

The turns ratio is selected based on the data from Table 3.1 in order to obtain a gain
factor of 4. The duty cycles are controlled in such a manner that the boost converter
converts 30V to 40V and the quasi Y source converter converts 10V to 40V. The block
diagram created for simulation in MATLAB-Simulink is represented in Fig 4.1.

16
 CHAPTER 4 – Simulation

Fig. 4.1 Simulation Block Diagram

4.1.2 Zeigler Nichols Tuning

Zeigler Nichols Second Tuning Method has been used for estimating the controller
parameters for the PI controller to be implemented. With Ki and Kd kept at zero, Kp
was increased until consistent oscillations were observed in the output. This value is
known as the ultimate gain. The period of oscillation thus found was 5ms.
Ultimate gain = 1.3
Ultimate period = 5ms
From the Table 3.3,
Kp = 0.675
Ki = 162
The corresponding controller loop which is designed using Zeigler Nichols tuning method
is shown in Fig 4.2.
4.2 Simulation Results

The output voltage of 48V is shown in Fig 4.3 and the gating signals are shown in
Fig 4.4. The fact that the Quasi Y-Source converter requires a very small duty cycle to
achieve high gain can be observed through this simulation.
The boost converter requires a duty cycle of 50% to boost the input voltage from
24V to 48V whereas the Quasi Y-Source achieves even greater gain for noticeably
smaller duty cycles.

Department of EEE, PES University 17

 CHAPTER 4 – Simulation

Fig. 4.2 Control Loop

Fig. 4.3 Output Voltage of the Double Input Converter

Fig. 4.4 Gating signals for the MOSFETs in the Double Input Converter

Department of EEE, PES University 18

 CHAPTER 5

Hardware Implementation

5.1 Hardware Design

The hardware of the proposed double input converter has been implemented with an
open loop control system. The gating signals are generated by Pulse Width Modulation
(PWM) using TL494 ICs. A gate is then added in order to amplify the low power
signal from the microcontroller or the controller IC which is the TL494 in this case and
generate a high current drive input to the gate of the semiconductor switch, which is a
MOSFET in this case. The converter is built as per the circuit diagram. Toroidal cores
are chosen for the input inductors. A three winding transformer is wound as per the
required ratio in order to give high input impedance to the Quasi Y -Source converter.
The design and selection of components are covered in the following subsections.
5.1.1 PWM Generation

The TL494 IC is used for the generation of gating pulses using Pulse Width Modulation
(PWM). The TL494 consists of the complete PWM power control circuitry on a single
chip. However, since two synchronized pulses are required for the open loop control,
two TL494 ICs are used in a master-slave configuration. Synchronizing multiple oscil-
lators in a common system is conveniently achievable due to the flexible architecture
of the TL494. The internal oscillator in the TL494 is used only for the generation of
a saw-tooth waveform on the timing waveform. This can be to constrain the oscillator
on the slaves by maintaining a compatible saw-tooth waveform externally to the timer
capacitor terminal. Terminating the RT terminal to the reference supply will constrain
the internal oscillator of the slave TL494.
The two TL494s used are synchronized by establishing one IC as the master. The
oscillator of this IC is programmed normally. The oscillators of the slave ICs are dis-

19
 CHAPTER 5 – Hardware Implementation

abled as explained above. The saw-tooth waveform created by the master is used as the
modulating signal for the slave IC by tying all the CT pins together as shown in Fig 5.1.

Fig. 5.1 Master-Slave configuration in TL494

5.1.2 Gate Driver

The gate driver functions like a power amplifier that takes in low power inputs from the
controller ICs or microcontrollers and delivers a high current drive for driving the gate
of power semiconductor switches like power MOSFETs. A gate driver is used when
the PWM controller cannot provide sufficient output current which is required to drive
the gate capacitance of the MOSFET. The gate drive function is partitioned off from
the PWM controller in order to restrain the controller from heating and be more stable.
This is because of the high peak currents which are required to drive a power MOSFET
at high frequencies but cause high heat dissipation are eliminated from the controller
IC.
The Gate Driver circuit designed in this project has three major components: a
buffer, an optocoupler and a gate driver IC.
5.1.2.1 Buffer Amplifier

The buffer circuit prevents the loading of the source. If the load to a voltage source is a
low value, it practically shorts the source and draws too much current from the source
for which the source is not rated which is harmful to the source. So by cascading a
buffer after a source provides a division of labour- the source only generated the cor-
rect voltage and the buffer provides the demanded current keeping the voltage constant
AND without loading the source as the buffer has very high input impedance, it draws
negligible current from the original source, thereby preventing loading. The buffer also
prevents unintended current division (i.e, basically provides the required amount of cur-

Department of EEE, PES University 20

 CHAPTER 5 – Hardware Implementation

rent to all the load impedance). In a nutshell, wherever there is a possibility of loading
of source, buffers are used. A CD4050B opamp based buffer is used for this purpose.
The schematic of the buffer circuit used is shown in Fig 5.2.

Fig. 5.2 A Schematic of Buffer Amplifier

5.1.2.2 Optocoupler

The Optocoupler is used to provide electrical isolation between the high voltage power
converter section and the low voltage controller section of the circuit. It protects the
sensitive, low voltage components and isolates them on a PCB. The 6N136 IC is used as
the optocoupler in this driver circuit. This IC allows for the transmission of an electrical
signal between two electrically isolated circuits. It consists of two parts: an LED that
emits infrared light and a photosensitive transistor that detects the light from this LED
and is driven whenever the LED is switched ON. Optocouplers are used in circuits
which are susceptible to voltage surges, lightning strikes, power supply surges etc in
order to protect the low voltage controllers. The optocoupler can effectively remove
electrical noise from signals and thereby allow the use of small digital signals to control
larger AC voltages. The schematic of the optocoupler used is shown in Fig 5.3.
Calculation of suitable resistance for the optocoupler circuit design is done using the
forward current of 6N136 from the datasheet. According to the datasheet, the 6N136

Department of EEE, PES University 21

 CHAPTER 5 – Hardware Implementation

Fig. 5.3 Schematic of Optocoupler

has a forward current of 16mA with a forward voltage of 1.9V.

5V − 1.9V = 3.1V has to developed across the resistance R1 .

3.1V
Therefore, R1 = = 193.7 ohm.
16mA

To saturate the phototransistor and to develop a value of 0V at the output, R2 must

develop 12V when passing a current of 16mA (assuming 115% CTR value).

12V
R2 = = 750 ohm
16mA

A value of 750 ohm is thus used.

5.1.2.3 Gate Driver

A gate driver is then used to accept low power control signals from a controller and
amplify it into a larger current output which drives the power MOSFET. IR2101 is
a high and low side driver which is used for driving the power MOSFETs used in the
converter. The IR2101 driver is capable of a high voltage and high-speed operation. It is
capable of driving a power MOSFET with it’s independent high and low side referenced
output channels. It includes a floating channel which is used for the bootstrap operation

Department of EEE, PES University 22

 CHAPTER 5 – Hardware Implementation

for driving high side switches. This is not used in this project as both the switches in
this topology are low side switches. A range of voltages from 10V to 20V can be used
to supply the gate. This IC is 3.3V, 5V and 15V logic input compatible. A gate-source
resistance is then added before giving the gate drive to the gate of the MOSFET. This
gate is usually used in high-frequency operations. Usually, this resistance is provided
to prevent accidental turn on due to noise or other factors like gate-to-drain internal
capacitance (Miller’s capacitance). The schematic of the IR2101 gate driver is shown
in Fig 5.4.

Fig. 5.4 A Schematic of IR2101 Gate Driver

5.1.3 Inductor Design

Two input inductors are used in the design of this converter. Both have an inductance
of 1mH, however, the current carried by each inductor is different.
5.1.3.1 Input Inductor for Quasi Y-Source Converter

Inductance = 1mH
Maximum current = 2.85A
Energy stored in inductor,

E = 0.5LI 2 = 0.046125J (5.1)

Department of EEE, PES University 23

 CHAPTER 5 – Hardware Implementation

Area Product for the core,

2EL
Ap = Aw Ac = = 18050mm4 (5.2)
Kw Kc JBm

A core with a high resistivity is picked to reduce the eddy current losses. A Ferrite
core is chosen for this purpose. T45 core is selected for calculations. The number of
turns is given by,
LIm
N= = 123 (5.3)
Ac Bm

The cross section of the winding is given by,

I 2.85
aw = = = 9.5E − 7 (5.4)
J 3 ∗ 106

Wire Gauge of SW18 is chosen.

Upon performing the cross check to see if the wires can be accommodated in the
window area, it fails. The window area is not enough to accommodate the windings.
By choosing a different core, (O42813TC), the calculations are performed again. From
the new core, the number of turns is are,

N Im
N= = 18 (5.5)
2.301 ∗ 0.25

This new core will be able to accommodate the new windings satisfactorily.
5.1.3.2 Input Inductor for Boost Converter

Inductance = 1mH
Maximum current = 0.75A
Energy stored in inductor,

E = 0.5LI 2 = 0.000281J (5.6)

Department of EEE, PES University 24

 CHAPTER 5 – Hardware Implementation

Area Product for the core,

2EL
Ap = Aw Ac = = 0.125 ∗ 10−8 m4 (5.7)
Kw Kc JBm

A core with high resistivity is selected to minimize the eddy current losses. A
Ferrite core is chosen for this purpose. A O41206TC core is selected for calculations.
The number of turns is given by,

LIm
N= = 14 (5.8)
Ac Bm

The cross section of the winding is given by,

I 0.75
aw = = = 2.5E − 7 (5.9)
J 3 ∗ 106

Wire Gauge of SW23 is chosen. The window area is sufficient to accommodate the
windings and passes the cross check.
5.1.4 Switch Selection

IRFZ34 Power MOSFET has been chosen as the switch for this converter. This MOS-
FET has a Vds of 60V which is suitable for the voltage ratings selected for this converter.
Combined with a fast switching and a low on-resistance (Rds ) of 0.01 ohm for a Vgs of
10V, this switch is a cost-effective option.

5.2 Hardware Results

Since the main application of this converter is in distributed generation, two separate
sources are required. For this purpose 12V, lead-acid batteries are used. The source to
the Quasi Y-Source Converter is a 12V supply and a single battery is used as input. For
the boost converter, for which the input is 24V, two batteries are connected in series.
Both the inputs are connected to the converter. The PWM pulses which are finally ob-
tained from the gate driver is given as input to the MOSFET gate. The required duty
cycles are tuned beforehand.

Department of EEE, PES University 25

 CHAPTER 5 – Hardware Implementation

Fig. 5.5 Hardware Implementation of the Double Input Converter

The eventual hardware implementation of the Double Input Converter is shown in

Fig 5.5.
The output of 48V can be achieved by connecting the Quasi Y-Source Converter and
the Boost converter independently.
Both the Quasi Y-Source Converter as well as the Boost Converter are now supplied
with 12V and 24V respectively. The output of 48V is observed as shown in Fig 5.6.

Fig. 5.6 Operation of Double Input Converter

Care must be exercised while tuning the duty cycles as the boost converter is an
inherently unstable converter, especially when operated in an open loop. High duty
cycles will exponentially increase the gain to very high voltage levels and this may

Department of EEE, PES University 26

 CHAPTER 5 – Hardware Implementation

cross the voltage ratings of the components in the converter leading to malfunction.
The analysis of the results obtained by operating the converter under different loads
has been presented in the next chapter.

Department of EEE, PES University 27

 CHAPTER 6

Results and Conclusion

6.1 Results

A Multi-Input Converter which is arrived at by a combination of a boost converter and

a Quasi Y-source converter has been proposed in this thesis. This dual input converter
has some useful features like continuous input current, ability to run either individually
or simultaneously and also has a very high boost ability. The proposed control loop
which has been derived using Zeigler Nichols estimation has been able to satisfactorily
operate for the given voltage and power ratings. These features enable this converter to
be applied for renewable energy sources. The results have been confirmed by simulation
using MATLAB-Simulink. A working hardware prototype which has open loop control

Fig. 6.1 Input power vs Output load

has been built to validate the circuit topology. Output loads in the range of 3W to

28
 CHAPTER 6 – Results and Conclusion

25W have been used as a sink to the circuit and various parameters have been recorded.
Fig 6.1 shows the trend of input power required to supply the given output load. It also
shows the input power drawn by the two converters in order to supply the given load.
In the case of converters with multiple sources, most sources will not share the load
equally. One of the sources will always try to supply an excessive fraction of the load.
Typically, this is the source with the highest power rating. It will always try to deliver
the highest current possible according to the design. The voltage will drop as it supplies
more current and when the voltage has dropped to the point where it is lower than
the next source, the other source will be activated. In a system with multiple sources,
all the sources may contribute towards fulfilling the load, but the proportion is widely
unequal. In the absence of any control strategy, the load sharing is highly dependent on
the voltages of the different sources used.

Fig. 6.2 Load Sharing by the two converters

This graph shows the pattern of load sharing by the two converters when different
loads are applied. The efficiency of the converter is extremely low at small loads. The
boost converter supplies the majority of the load in this converter in the open loop
configuration. In the absence of any control strategy which dictates which source is to
be the primary source, most of the current is hence drawn by the boost converter. This is
because two 12V batteries are connected in series to derive the 24V input for the boost
converter. Hence the strain on the battery is lower and this source can supply greater

Department of EEE, PES University 29

 CHAPTER 6 – Results and Conclusion

current than a single 12V battery. Fig 6.2 shows the sharing of load between the two
converters at different values of loads.
Fig 6.2 shows that the boost converter which has 2 batteries supplies the majority
of the load as the output load is increased. This is a potential problem because if one of
the converters fails, then the other converter will go from supplying a percentage of the
load to supplying the full load. During this time the voltage will droop in the absence
of a closed loop control system. The transient will be even more severe if the converter
which is supplying a higher percentage of the load fails.
Fig 6.3 shows the plot of efficiency against output power. The efficiency of the
double input converter increases when it is loaded closer to the rated values. At very
low loads, the efficiency is very poor.

Fig. 6.3 Efficiency of the Double Input Converter at different loads

At very low loads, the efficiency is very poor. This can be explained by the con-
duction losses and the V-I overlap losses which are usually seen in DC-DC Converters
at low loads. V-I overlap losses are proportional to the input voltage, load current and
switching frequency and occur due to the V-I overlap region that is seen in converters
with rapid switching cycles. But at low loads, the conduction losses which are caused
due to current ripples dominate the overlap losses as the power dissipated due to current
ripples remain same whereas the overlap losses reduce due to low load currents. Under
light loads, the gate drive losses which occur due to the charging and discharging the

Department of EEE, PES University 30

 CHAPTER 6 – Results and Conclusion

gate capacitance dominate the load.

Thus, a DC-DC converter with multiple input ports can be successfully implemented
to supply a common load. The load will be shared by the different sources depending
on their capacities.
6.2 Conclusion

With the increasing adoption of renewable energy in the power grid, it has become im-
perative to look for unique and efficient converter designs. Renewable energy sources
are primarily DC in nature. It is also one of the leading types of distributed genera-
tion. In these conditions, the development of a Multi-Input Converter to aggregate all
the different distributed sources and feed a common load assumes importance. This
project proposes such a converter which can take in two different sources of different
voltage levels, aggregate their power and feed a load. The use of different topologies of
converters in this aggregated converter has been well demonstrated. A Quasi Y-Source
converter which can give a high gain is used for this converter. A boost converter has
also been used to demonstrate the use of multiple converters. With this converter, the
load can be shared between the two sources. The use of multiple converters has been
eliminated. This method of using a multiple input converter to aggregate different power
sources can be used as a viable method to integrate renewables into the existing power
infrastructure.

Department of EEE, PES University 31

 CHAPTER 6 – Results and Conclusion

6.3 Future Scope

To create a Multi-Input Converter for distributed generation sources for real-life ap-
plications, the open loop version will not be satisfactory. A control strategy has to
developed where one source is chosen to be the primary source and supplies the bulk of
the load while the other source acts as an auxiliary source kicking in at peak demands.
The converter must be able to handle dynamic loads as well as dynamic sources as is the
case with most of the renewable sources. Current sharing strategies must be developed
so that both the converters supply a pre-determined share of the load. This is essential
so that both the converters age at the same rate and replacement will be easier.
An interesting method of current sharing will be to choose one converter as the
master. This master converter will be employed with intelligent driver controls and will
supply the base load. The slave controller will boost the voltage to meet the dynamic
power requirements.
The performance of the converter with different types of distributed generation
sources like solar, wind, biomass, fuel cells etc must be evaluated. Primary sources
must be selected based on the power availability. Auxiliary sources must be used to sup-
ply the peak load demand. Adding extra redundant converters to the existing topology
can ensure reliability. Conducting reliability studies of such converters and developing
redundancy indices will be an area of research.
Another upcoming area of research will be to develop bidirectional converters which
allow the integration of storage devices as well. Advances in storage technology, as well
as the availability of cheap second-hand batteries disposed of EV’s, will increase the
use of batteries as a part of the power grid. Higher power production from renewables
will be used to store the batteries which will then be used during peak loads. Having
bidirectional multi-port converters will be useful in such conditions.

Department of EEE, PES University 32

 REFERENCES

[1] Willis, H. Lee, ed. Distributed power generation: planning and evaluation. Crc
Press, 2018.
[2] Pacesila, Mihaela, Stefan Gabriel Burcea, and Sofia Elena Colesca. ”Analysis of
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[8] Ruan, Jie, et al. ”Isolated multiple-input dc/dc converter using alternative pulsating
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[10] Khosrogorji, S., et al. ”Multi-input DC/DC converters in connection with dis-
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ference. IEEE, 2008.

[20] Wang, Yijie, et al. ”A Family of Y-Source DC/DC Converter Based on Switched
Inductor.”IEEE Transactions on Industry Applications55.2 (2019): 1587-1597.
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Department of EEE, PES University 35

Appendices

36
 Appendix A

DATASHEETS

• CD4050B Datasheet

• TL494 Datasheet

• 6N135 Datasheet

• IR2101 Datasheet

37
 Product Sample & Technical Tools & Support & Reference
Folder Buy Documents Software Community Design

CD4049UB, CD4050B
SCHS046J – AUGUST 1998 – REVISED SEPTEMBER 2016

CD4049UB and CD4050B CMOS Hex Inverting Buffer and Converter

1 Features 3 Description
•
1 CD4049UB Inverting The CD4049UB and CD4050B devices are inverting
and noninverting hex buffers, and feature logic-level
• CD4050B Noninverting conversion using only one supply voltage (VCC). The
• High Sink Current for Driving 2 TTL Loads input-signal high level (VIH) can exceed the VCC
• High-to-Low Level Logic Conversion supply voltage when these devices are used for logic-
• 100% Tested for Quiescent Current at 20 V level conversions. These devices are intended for use
as CMOS to DTL or TTL converters and can drive
• Maximum Input Current of 1 µA at 18 V Over Full directly two DTL or TTL loads. (VCC = 5 V,
Package Temperature Range; 100 nA at 18 V and VOL ≤ 0.4 V, and IOL ≥ 3.3 mA.)
25°C
• 5-V, 10-V, and 15-V Parametric Ratings Device Information(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
2 Applications CD4049UBE,
PDIP (16) 3.90 mm × 19.30 mm
CD4050BE
• CMOS to DTL or TTL Hex Converters
CD4049UBD,
• CMOS Current Sink or Source Drivers SOIC (16) 9.90 mm × 3.91 mm
CD4050BD
• CMOS High-to-Low Logic Level Converters CD4049UBDW,
SOIC (16) 10.30 mm × 7.50 mm
CD4050BDW
CD4049UBNS,
SO (16) 19.30 mm × 6.35 mm
CD4050BNS
CD4049UBPW,
TSSOP (16) 5.00 mm × 4.40 mm
CD4050BPW
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Schematic Diagram of CD4049UB Schematic Diagram of CD4050B
VCC VCC

P
P P
R OUT
R
IN
IN OUT
N
N N

VSS
VSS
Copyright © 2016,
Texas Instruments Incorporated Copyright © 2016, Texas Instruments Incorporated

1 of 6 Identical Units 1 of 6 Identical Units

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
 CD4049UB, CD4050B
www.ti.com SCHS046J – AUGUST 1998 – REVISED SEPTEMBER 2016

5 Pin Configuration and Functions

CD4049UB CD4050B
D, DW, N, NS, and PW Packages D, DW, N, NS, and PW Packages
16-Pin SOIC, PDIP, SO, and TSSOP 1G6-Pin SOIC, PDIP, SO, and TSSOP
Top View Top View

VCC 1 16 NC VCC 1 16 NC

G 2 15 L G 2 15 L

A 3 14 F A 3 14 F

H 4 13 NC H 4 13 NC

B 5 12 K B 5 12 K

I 6 11 E I 6 11 E

C 7 10 J C 7 10 J

VSS 8 9 D VSS 8 9 D

Not to scale Not to scale

Pin Functions: CD4049UB

PIN
I/O DESCRIPTION
NAME NO.
A 3 I Input 1
B 5 I Input 2
C 7 I Input 3
D 9 I Input 4
E 11 I Input 5
F 14 I Input 6
G 2 O Inverting output 1. G = A
H 4 O Inverting output 2. H = B
I 6 O Inverting output 3. I = C
J 10 O Inverting output 4. J = D
K 12 O Inverting output 5. K = E
L 15 O Inverting output 6. L = F
NC 13, 16 — No connection
VCC 1 — Power pin
VSS 8 — Negative supply

Copyright © 1998–2016, Texas Instruments Incorporated Submit Documentation Feedback 3

Product Folder Links: CD4049UB CD4050B
 Product Order Technical Tools & Support &
Folder Now Documents Software Community

TL494
SLVS074H – JANUARY 1983 – REVISED MARCH 2017

TL494 Pulse-Width-Modulation Control Circuits

1 Features The TL494 device contains two error amplifiers, an
on-chip adjustable oscillator, a dead-time control
•
1 Complete PWM Power-Control Circuitry (DTC) comparator, a pulse-steering control flip-flop, a
• Uncommitted Outputs for 200-mA Sink or 5-V, 5%-precision regulator, and output-control
Source Current circuits.
• Output Control Selects Single-Ended or The error amplifiers exhibit a common-mode voltage
Push-Pull Operation range from –0.3 V to VCC – 2 V. The dead-time
• Internal Circuitry Prohibits Double Pulse at control comparator has a fixed offset that provides
Either Output approximately 5% dead time. The on-chip oscillator
can be bypassed by terminating RT to the reference
• Variable Dead Time Provides Control Over
output and providing a sawtooth input to CT, or it can
Total Range drive the common circuits in synchronous multiple-rail
• Internal Regulator Provides a Stable 5-V power supplies.
Reference Supply With 5% Tolerance
The uncommitted output transistors provide either
• Circuit Architecture Allows Easy Synchronization common-emitter or emitter-follower output capability.
The TL494 device provides for push-pull or single-
2 Applications ended output operation, which can be selected
• Desktop PCs through the output-control function. The architecture
of this device prohibits the possibility of either output
• Microwave Ovens being pulsed twice during push-pull operation.
• Power Supplies: AC/DC, Isolated,
The TL494C device is characterized for operation
With PFC, > 90 W
from 0°C to 70°C. The TL494I device is characterized
• Server PSUs for operation from –40°C to 85°C.
• Solar Micro-Inverters
• Washing Machines: Low-End and High-End Device Information(1)
PART NUMBER PACKAGE (PIN) BODY SIZE
• E-Bikes
SOIC (16) 9.90 mm × 3.91 mm
• Power Supplies: AC/DC, Isolated, PDIP (16) 19.30 mm × 6.35 mm
No PFC, < 90 W TL494
SOP (16) 10.30 mm × 5.30 mm
• Power: Telecom/Server AC/DC Supplies: TSSOP (16) 5.00 mm × 4.40 mm
Dual Controller: Analog
(1) For all available packages, see the orderable addendum at
• Smoke Detectors the end of the data sheet.
• Solar Power Inverters
4 Simplified Block Diagram
3 Description
The TL494 device incorporates all the functions TL494
1 + 16
required in the construction of a pulse-width- +
modulation (PWM) control circuit on a single chip.
2 15
Designed primarily for power-supply control, this
device offers the flexibility to tailor the power-supply 3 14
control circuitry to a specific application. 13
4 VREF

12

5
Osc
6 11
Control
10
7

8 9

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
 TL494
www.ti.com SLVS074H – JANUARY 1983 – REVISED MARCH 2017

6 Pin Configuration and Functions

D, DB, N, NS, OR PW PACKAGE
(TOP VIEW)

1IN+ 1 16 2IN+
1IN− 2 15 2IN−
FEEDBACK 3 14 REF
DTC 4 13 OUTPUT CTRL
CT 5 12 VCC
RT 6 11 C2
GND 7 10 E2
C1 8 9 E1

Pin Functions
PIN
TYPE DESCRIPTION
NAME NO.
1IN+ 1 I Noninverting input to error amplifier 1
1IN- 2 I Inverting input to error amplifier 1
2IN+ 16 I Noninverting input to error amplifier 2
2IN- 15 I Inverting input to error amplifier 2
C1 8 O Collector terminal of BJT output 1
C2 11 O Collector terminal of BJT output 2
CT 5 — Capacitor terminal used to set oscillator frequency
DTC 4 I Dead-time control comparator input
E1 9 O Emitter terminal of BJT output 1
E2 10 O Emitter terminal of BJT output 2
FEEDBACK 3 I Input pin for feedback
GND 7 — Ground
OUTPUT
13 I Selects single-ended/parallel output or push-pull operation
CTRL
REF 14 O 5-V reference regulator output
RT 6 — Resistor terminal used to set oscillator frequency
VCC 12 — Positive Supply

Copyright © 1983–2017, Texas Instruments Incorporated Submit Documentation Feedback 3

Product Folder Links: TL494
 6N135, 6N136
www.vishay.com
Vishay Semiconductors
High Speed Optocoupler, 1 MBd,
Photodiode with Transistor Output
FEATURES
• Isolation test voltages: 5300 VRMS
• TTL compatible
• High bit rates: 1 Mbit/s
NC 1 8 C (VCC)
• High common-mode interference immunity
A 2 7 B (VB)
• Bandwidth 2 MHz
C 3 6 C (VO)
• Open-collector output
NC 4 5 E (GND)
• External base wiring possible
• Material categorization:
for definitions of compliance please see
www.vishay.com/doc?99912

AGENCY APPROVALS
• UL1577 file no. E52744, double protection
• DIN EN 60747-5-5 (VDE0884-5) available with option 1
DESCRIPTION
• cUL components acceptance service no. 5A
The 6N135 and 6N136 are optocouplers with a GaAIAs
• CQC GB8898-2011, GB4943.1-2011
infrared emitting diode, optically coupled with an integrated
photo detector which consists of a photo diode and a
high-speed transistor in a DIP-8 plastic package.
Signals can be transmitted between two electrically
separated circuits up to frequencies of 2 MHz. The potential
difference between the circuits to be coupled should not
exceed the maximum permissible reference voltages.

ORDERING INFORMATION
DIP-8 Option 6

6 N 1 3 # - X 0 # # T

PART NUMBER PACKAGE OPTION TAPE 7.62 mm 10.16 mm

AND
Option 7 Option 9
REEL

> 0.7 mm > 0.1 mm

AGENCY CERTIFIED / PACKAGE CTR (%)

UL, CSA ≥7 ≥ 19
DIP-8 6N135 6N136
DIP-8, 400 mil, option 6 - 6N136-X006
SMD-8, option 7 6N135-X007T (1) 6N136-X007T (1)
SMD-8, option 9 - 6N136-X009T (1)
VDE, UL, CSA ≥7 ≥ 19
DIP-8 - 6N136-X001
SMD-8, option 7 6N135-X017T (1) 6N136-X017T
SMD-8, option 9 - 6N136-X019T
Note
(1) Also available in tubes; do not add T to end

Rev. 1.9, 02-Nov-15 1 Document Number: 83604

For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
 6N135, 6N136
www.vishay.com
Vishay Semiconductors

ABSOLUTE MAXIMUM RATINGS (Tamb = 25 °C, unless otherwise specified)

PARAMETER CONDITION SYMBOL VALUE UNIT
INPUT
Reverse voltage VR 5 V
Forward current IF 25 mA
Peak forward current t = 1 ms, duty cycle 50 % IFSM 50 mA
Maximum surge forward current t ≤ 1 μs, 300 pulses/s 1 A
Thermal resistance Rth 700 K/W
Power dissipation Tamb = 70 °C Pdiss 45 mW
OUTPUT
Supply voltage VS -0.5 to 15 V
Output voltage VO -0.5 to 15 V
Emitter base voltage VEBO 5 V
Output current IO 8 mA
Maximum output current 16 mA
Base current IB 5 mA
Thermal resistance 300 K/W
Power dissipation Tamb = 70 °C Pdiss 100 mW
COUPLER
Storage temperature range Tstg -55 to +150 °C
Ambient temperature range Tamb -55 to +100 °C
max. ≤ 10 s, dip soldering
Soldering temperature Tsld 260 °C
≥ 0.5 mm from case bottom
Note
• Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. Functional operation of the device is not
implied at these or any other conditions in excess of those given in the operational sections of this document. Exposure to absolute
maximum ratings for extended periods of the time can adversely affect reliability.

ELECTRICAL CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)

PARAMETER TEST CONDITION PART SYMBOL MIN. TYP. MAX. UNIT
INPUT
Forward voltage IF = 16 mA VF - 1.33 1.9 V
Breakdown voltage IR = 10 μA VBR 5 - - V
Reverse current VR = 5 V IR - 0.5 10 μA
Capacitance VR = 0 V, f = 1 MHz CO - 30 - pF
Temperature coefficient, forward voltage IF = 16 mA ΔVF/ΔTA - -1.7 - mV/°C
OUTPUT
Logic low supply current IF = 16 mA, VO = open, VCC = 15 V ICCL - 150 - μA
Logic high supply current IF = 0 mA, VO = open, VCC = 15 V ICCH - 0.01 1 μA
IF = 16 mA, IO = 1.1 mA, VCC = 4.5 V 6N135 VOL - 0.1 0.4 V
Output voltage, output low
IF = 16 mA, IO = 3.0 mA, VCC = 4.5 V 6N136 VOL - 0.1 0.4 V
IF = 0 mA, VO = VCC = 5.5 V IOH - 3 500 nA
Output current, output high
IF = 0 mA, VO = VCC = 15 V IOH - 0.01 1 μA
COUPLER
Capacitance (input to output) f = 1 MHz CIO - 0.6 - pF
Note
• Minimum and maximum values are testing requirements. Typical values are characteristics of the device and are the result of engineering
evaluation. Typical values are for information only and are not part of the testing requirements.

Rev. 1.9, 02-Nov-15 2 Document Number: 83604

For technical questions, contact: [email protected]
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
 Data Sheet No. PD60043 Rev.O

IR2101(S)/IR2102(S) &(PbF)
HIGH AND LOW SIDE DRIVER
Features Product Summary
• Floating channel designed for bootstrap operation
Fully operational to +600V VOFFSET 600V max.
Tolerant to negative transient voltage
dV/dt immune
IO+/- 130 mA / 270 mA
• Gate drive supply range from 10 to 20V
VOUT 10 - 20V
• Undervoltage lockout
• 3.3V, 5V, and 15V logic input compatible ton/off (typ.) 160 & 150 ns
• Matched propagation delay for both channels
• Outputs in phase with inputs (IR2101) or out of Delay Matching 50 ns
phase with inputs (IR2102)
• Also available LEAD-FREE
Packages
Description
The IR2101(S)/IR2102(S) are high voltage, high speed
power MOSFET and IGBT drivers with independent
high and low side referenced output channels. Pro-
prietary HVIC and latch immune CMOS technologies 8-Lead SOIC 8-Lead PDIP
IR2101S/IR2102S IR2101/IR2102
enable ruggedized monolithic construction. The logic
input is compatible with standard CMOS or LSTTL
output, down to 3.3V logic. The output drivers feature a high pulse current buffer stage designed for minimum
driver cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in
the high side configuration which operates up to 600 volts.

Typical Connection
up to 600V

VCC

VCC VB
HIN HIN HO
LIN LIN VS TO
LOAD

COM LO

IR2101 up to 600V

VCC

VCC VB
HIN HIN HO

(Refer to Lead Assignments for correct pin LIN LIN VS TO

LOAD
configuration). This/These diagram(s) show COM LO
electrical connections only. Please refer to
our Application Notes and DesignTips for IR2102
proper circuit board layout.

www.irf.com 1
IR2101(S)/IR2102(S) & (PbF)

Absolute Maximum Ratings

Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.

Symbol Definition Min. Max. Units

VB High side floating supply voltage -0.3 625
VS High side floating supply offset voltage VB - 25 VB + 0.3
VHO High side floating output voltage VS - 0.3 VB + 0.3
V
VCC Low side and logic fixed supply voltage -0.3 25
VLO Low side output voltage -0.3 VCC + 0.3
VIN Logic input voltage (HIN & LIN) -0.3 VCC + 0.3
dVS/dt Allowable offset supply voltage transient — 50 V/ns
PD Package power dissipation @ TA ≤ +25°C (8 lead PDIP) — 1.0
W
(8 lead SOIC) — 0.625
RthJA Thermal resistance, junction to ambient (8 lead PDIP) — 125
°C/W
(8 lead SOIC) — 200
TJ Junction temperature — 150
TS Storage temperature -55 150 °C
TL Lead temperature (soldering, 10 seconds) — 300

Recommended Operating Conditions

The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The VS offset rating is tested with all supplies biased at 15V differential.

Symbol Definition Min. Max. Units

VB High side floating supply absolute voltage VS + 10 VS + 20
VS High side floating supply offset voltage Note 1 600
VHO High side floating output voltage VS VB
V
VCC Low side and logic fixed supply voltage 10 20
VLO Low side output voltage 0 VCC
VIN Logic input voltage (HIN & LIN) (IR2101) & (HIN & LIN) (IR2102) 0 VCC
TA Ambient temperature -40 125 °C

Note 1: Logic operational for VS of -5 to +600V. Logic state held for VS of -5V to -VBS. (Please refer to the Design Tip
DT97-3 for more details).

2 www.irf.com
 Appendix B

TOROIDAL CORE DETAILS

46
 03/06/2019 Magnetics - Ferrite Toroids

HOM | PRODUCT | FRRIT COR | FRRIT TOROID

Ferrite Toroid
Ferrite toroid o er high magnetic e cienc a there i no air gap and the cro-ectional area i uniform.
Magnetic®toroid are availale in man ize (outide diameter ranging from 2 mm to 140 mm)
and material (permeailitie ranging from 900µ to 15,000µ). Di erent coating can e applied to ferrite
toroid to increae winding eae and improve voltage reakdown. Hardware, uch a toroid mount and
header, i availale.

LARN MOR

Ke Characteritic

Compoition: Mn • Zn • Fe

hape: Toroid

ize: 3 mm to 140 mm

Permeailit: M=15,000µ,
W=10,000µ, J=5,000µ,
T=3,000µ, F=3,000µ,
P=2,500µ, R=2,300µ,
L=900µ, C= 900µ

Coating Color: Gre

Tpical application for high permeailit ferrite toroid, 5,000µ J material, 10,000µ W material, and 15,000µ M
material include common mode choke, MI lter, roadand tranformer, pule tranformer and current
tranformer. pecial ize of ferrite toroid are availale in 5,000 J material for Ground Fault Interrupter (GFCI)
application. 900µ L material, 2,300µ R material, 2,500µ P material, and 3,000µ F material toroid are excellent
choice for high frequenc tranformer.

Material Characteritic
Nine di erent material for Magnetic Ferrite Toroid (L, R, P, F, T, J, W, C, M) exit.

VIW MATRIAL UMMARY

Ferrite Toroid Part Numer Identi cation

HOW TO ORDR: MAGNTIC FRRIT COR

https://www.mag-inc.com/products/ferrite-cores/ferrite-toroids 1/3
03/06/2019 Ae
AL nH/T2 (nominal) Magnetics - Ferrite L
Toroids
e
Path Cro Ve
L R P F J W M C Length ection Volume WaAc OD ID Height
Part # 900µ 2300µ 2500µ 3000µ 5000µ 10000µ 15000µ 900µ mm mm2 mm3 cm4 mm mm mm
8626 18,760 215 377 81,165 91.2 85.7 55.5 25.24
9715 3,025 3,464 6,575 11,178 255.3 267.2 68,281 90.8 102 65.8 15
9718 4,127 4,486 8,972 15,252 259 370 96,000 106 107 65 18
9725 5,732 6,230 9,346 21,184 259.31 514.3 133,351 171 107 65 25
9740 3,200 3,477 6,955 11,823 381.5 422.3 161,086 372 140 106 25

https://www.mag-inc.com/products/ferrite-cores/ferrite-toroids 3/3
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