Digital Signal Processing

(KEC 503)
Unit-1
Introduction to Digital Signal Processing
Dr. Neelesh Kumar Gupta
Professor
Department of Electronics and Communication Engineering
Ajay Kumar Garg Engineering College, Ghaziabad
Syllabus
Unit-1

Introduction to Digital Signal Processing: Basic elements of digital signal processing,

advantages and disadvantages of digital signal processing, Technology used for DSP.
Realization of Digital Systems: Introduction- basic building blocks to represent a digital system,
recursive and non-recursive systems, basic structures of a digital system: Canonic and Non-Canonic
structures.
IIR Filter Realization: Direct form, cascade realization, parallel form realization, Ladder
structures- continued fraction expansion of H (z), example of continued fraction, realization of a ladder
structure, design examples.
FIR Filter Realization: Direct, Cascade, FIR Linear Phase Realization and design examples.
DSP

Analog Signal Processing

DSP

Introduction to Digital Signal Processing (DSP)

Basic Elements of Digital Signal Processing

Advantages of DSP

Disadvantages of DSP

Technology used for DSP

Basic Elements of DSP

Most of the signals encountered in science and engineering are analog in nature.
Signals are functions of a continuous variable, such as time or space and
usually take on values in a continuous range.
Such signals may be processed directly by appropriate analog systems (such
as filters or frequency analyzers) or frequency multipliers for the purpose of
changing their characteristics or extracting some desired information.

Block Diagram of Digital Signal Processing

Contd:
Generally signals are analog in nature (eg: speech, weather signals). To process
the analog signal by digital means, it is essential to convert them to discrete-
time signal , and then convert them to a sequence of numbers.
The process of converting an analog to digital ‘Analog-to-Digital Conversion’.

A/D Conversion:
1) Sampling
2) Quantization
3) Coding
Contd:
• Digital signal processing provides an alternative method for processing the analog signal.
To perform the processing digitally, there is a need for an interface between the analog
signal and the digital processor by This interface is called an Analog-to-Digital (A/D)
converter.

• The output of the A/D converter is a digital signal that is appropriate as an input to the
digital processor.

• The digital signal processor may be a large programmable digital computer or a small
microprocessor programmed to perform the desired operations on the input signal.
On the other hand, when signal processing operations are well defined, a hardwired
implementation of the operations can be optimized, resulting in a cheaper signal processor
and, usually, one that runs faster than its programmable counterpart.
Analog and Digital Filter
Advantages of DSP over ASP
▪ Flexibility and Accuracy is more in DSP over ASP.

▪ Digital signal are easily stored on magnetic media (tape or disk) without deterioration.

▪ Most of the cases digital implementation of signal is cheaper than analog counterpart
such as lower cost due to cheaper hardware and flexibility of modifications

▪ With digital filters linear phase characteristics can be achieved.

▪ At low frequencies in ASP large sizes of capacitor and inductors are required, but DSP
can be used for processing of low frequency signals such as seismic signals.
.
 Limitations of DSP
▪ In DSP pre (A/D) and post processing (D/A) is required which increases complexity of
the digital system.

▪ DSP suffers from frequency limitations i.e. dependent upon the sample and hold
circuit and analog to digital converter frequency of operation.

▪ Bandwidth Restrictions

▪ Speed Limitation
.
Technology used in DSP
• Telecommunications
• Military
• Consumer electronics
• Instrumentation and Control
• Digital Image Processing
• Speech processing
• Medicine
• Seismology
• Signal filtering and so on.

Example: Texas Instruments 66AK2G1x KeyStone II System-on-Chip (SoC),

addresses applications that require both DSP and ARM performance, with the
integration of high-speed peripherals and memory interfaces.
Differences between Microprocessor and Digital Signal Processor

• A microprocessor with its limited speed is meant for low speed applications,
whereas, the DSP is meant for fast real time applications.

• Generally, microprocessors use Von-Nuemann architecture, whereas, most of the

DSP processors use a modified Harvard architecture with two or three memory
buses.
Digital Signal Processers
A Digital Signal Processor is a specialized microprocessor chip and fabricated on MOS Integrated
Circuit Chips. They are widely used in audio signal processing, telecommunications, digital image
processing, RADAR, SONAR and speech recognition systems and in common consumer
electronic devices such as mobile phones, disk drives and High-definition Television (HDTV) products
Various DSP Processors Texas DSP Processors:
16-bit Fixed point arithmetic processors
• TMS320C1X
• TMS320C2X
• TMS320C5X
• TMS320C8X
32-bit floating point arithmetic processors:
• TMS320C3X
• TMS320C4X
 How a DSP is used in an MP3 audio player

During the recording phase, analog audio is input through a receiver or other source. This analog
signal is then converted to a digital signal by an analog-to-digital converter and passed to the
DSP.

The DSP performs the MP3 encoding and saves the file to memory.

During the playback phase, the file is taken from memory, decoded by the DSP and then
converted back to an analog signal through the digital-to-analog converter, so that, it can be
output through the speaker system.

In a more complex example, the DSP would perform other functions such as volume control,
equalization and user interface.
 Digital Signal Processing
(KEC 503)
Unit-1
Realization of Digital Systems

Dr. Neelesh Kumar Gupta

Professor
Department of Electronics and Communication Engineering
Ajay Kumar Garg Engineering College, Ghaziabad
Realization of Digital Systems
For the design of digital filters, the system function H(z) or the impulse response h(n)
must be specified. Then the digital filter structure can be implemented or synthesized
in hardware/software form by its difference equation obtained directly from H(z) or
h(n).

Each difference equation or computational algorithm can be implemented by using a

digital computer or special purpose digital hardware or special programmable
integrated circuit.

y (n) = 3x (n-1)

y (n) = 3x (n-1) + 4 x (n-2)

Basic Building Blocks

The computational algorithm of an LTI digital filter can be conveniently

represented as a block diagram using basic building blocks representing:
❖ An adder

❖ The multiplier

❖ The unit delay (z -1) or storage element

Contd:
Types of Causal Systems

Recursive and Non-recursive Realization

Recursive Realization
• Present output of the system depends on present input, past input and past
output values.

y(n) = F [ y(n-1), y(n-2), x(n), x(n-1), ………….]

• Involves feedback
Contd:
Non- Recursive Realization:

• Present output of the system depends on present input and past input
values only.

y(n) = F[x(n), x(n-1), ……………...]

• Doesn't involve feedback

Basic Realization of IIR Systems

The output of a finite order linear time invariant system at time n can be expressed as a linear
combination of the inputs and outputs,

where ak and bk are constants with a0 is not equal to zero and

Taking the z-transform of the output sequence y(n)

Contd:
Changing the order of summation

Therefore,
Contd:

Similarly FIR systems are characterized by the constant coefficient

difference equation
IIR Filters

Infinite Impulse Response Filter (IIR):

• Output of the system depends upon infinite no. of impulse response values.

• Involve feedback.

• Contains both poles and zeros.

• Can be realized using recursive realization techniques.

FIR Filters

Finite Impulse Response Filter (FIR):

• Output of the system depends upon finite no. of impulse response values.

• Doesn’t involve feedback.

• Contains only zeros.

• Can be realized using non-recursive realization techniques.

 Digital Signal Processing
(KEC 503)
Unit-1
IIR Filter Realization
Dr. Neelesh Kumar Gupta
Professor
Department of Electronics and Communication Engineering
Ajay Kumar Garg Engineering College, Ghaziabad
Methods of Realization

IIR Filter Realization:

❖ Direct-form I and Direct-form II Realization

❖ Cascade Realization

❖ Parallel Realization

❖ Ladder Realization
Direct Form-I (Non-Recurs. + Recurs.) Realization

• The system function is divided into two parts connected in cascade.

• The first part containing only the zeros
• Followed by the part containing only the poles.
• An intermediate sequence w(n) is introduced.
Direct Form-I
Example 1:
Develop a direct form I realization of the difference
equation

Solution: Taking z-transform of the given difference equation and simplifying,

we get the transfer function
Contd:
The corresponding direct form I realization structure is
Direct Form-II
• Since we are dealing with linear systems, the order of these parts can be
interchanged.
• This property yields a second direct form realization.
• In direct Form II, the poles of H(z) are realized first and the zeros second.
• Here, the transfer function H(z) is broken into a product of two transfer
functions H1(z) and H2(z),
• where H1(z) has only poles and H2(z) contains only the zeros as given below
Contd :
Example 2 :

Determine the Direct Form I structure of the IIR Filter described by the following
difference equation;
Contd:
Example 3:
Determine the direct Form I and II realizations for a third-order IIR
transfer function

Solution Multiplying the transfer function numerator and denominator by 2 Z -3

we obtain the standard form of the transfer function.
The direct Forms I The direct Forms II
realization realization
Canonic and Non-Canonic Structures

If the number of delays in the realization block diagram is equal to the order of the
difference equation or the order of the transfer function of a digital filter, then the
realization structure is called canonic. Otherwise, it is a non-canonic structure.

Direct form-I- Non- Canonic Structure

Direct form-II- Canonic Structure

 Direct Form-I

The direct form I structure is non-canonic as it employs 6 delays to realize a 3rd-

order transfer function
DRAW DIRECT FORM-II REALISATION
 Advantages of Direct form II

• The direct Form II realization requires only the larger of M or N storage elements.

• When compared to direct Form I realization, the direct Form II uses the minimum
number of storage elements and hence said to be a canonic structure.
Direct Form-II
Contd :
 Cascade Realization

Direct Form II is no the only form of realization. There are several other forms.
Two other important forms are the cascade and the parallel form.

In cascade realization, the transfer function H(z) is broken into a product of transfer
functions H1(z), H2(z), ... , Hk(z).

Factoring the numerator and denominator polynomials of the transfer function H(z),
Cascade Realization

Each individual factor is realized as a small Direct Form II subsystem and then cascaded.
 Example 4

H (z ) =
1 + 2 z −1 + z − 2
=
(
1 + z −1 1 + z −1 )( )
−1
1 − 0.75 z + 0.125 z −2
( )(
1 − 0.5 z −1 1 − 0.25 z −1 )
=
(1 + z )
−1
(1 + z ) −1

(1 − 0.5 z ) (1 − 0.25 z )
−1 −1

Direct Form I
H (z ) =
1+ 2z + z −1 −2
=
1+ z 1+ z ( −1
)( −1
)
−1
1 − 0.75 z + 0.125 z −2 −1
(
1 − 0.5 z 1 − 0.25 z −1
)( )
=
(1 + z )
−1
(1 + z )
−1

(1 − 0.5 z ) (1 − 0.25 z )
−1 −1

Direct Form II
Example 5: Obtain the cascade realisation for the following transfer function:
Example 6
 Example 7

Direct form II and cascade form realization

−1 −2 −3
0.44 z + 0.362 z + 0.02 z
H ( z) = −1 −2 −3
1+ 0.4 z + 0.18 z − 0 .2 z

−1 −2 −1

=
0.44 + 0.362 z + 0.02 z  z 
−1 −2  −1 
 1+ 0.8 z + 0.5 z  1−0.4 z 
 −1 −2 −3
0.44 z + 0.362 z + 0.02 z
H ( z) = −1 −2 −3
1+ 0.4 z + 0.18 z − 0 .2 z

Direct form II
 −1 −2 −1

=
0.44+ 0.362 z + 0.02 z  z 
−1 −2  −1 
 1+ 0.8 z + 0.5 z  1−0.4 z 

Cascade form
 Parallel Realization
Parallel Form is realized by first expressing the transfer function in partial fraction form

Each individual term is realized as a small Direct Form II/I subsystem and then paralleled.

The parallel form realization is useful for high speed filtering applications since the filter
operation is performed in parallel, i.e. the processing is performed simultaneously.
Contd:
Example 8

1 + 2 z −1 + z −2
H (z ) =
18 25
= 8+ −
−1
1 − 0.75 z + 0.125 z −2
(
1 − 0 .5 z ) (
−1
1 − 0.25 z −1
)
−1
− 7 + 8z
H(z ) = 8 + −1 −2
1 − 0.75z + 0.125z
Contd:
Example 9: Draw the block diagram using parallel form for a LTI system whose
transfer function is;

Following the long division

Example 10
Parallel Realization Structure
Parallel Realization Structure
Ladder Structures
Contd:
 Digital Signal Processing
(KEC 503)
Unit-1
FIR Filter Realization
Dr. Neelesh Kumar Gupta
Professor
Department of Electronics and Communication Engineering
Ajay Kumar Garg Engineering College, Ghaziabad
Direct Form FIR Realization
 Cascaded Form FIR Realization
As an alternative to the Direct-Form, we factor the FIR transfer function
H(z) as a product of second order factors given by
Cascaded Form FIR Realization
Cascaded Form FIR Realization
Contd:
 Realization of Linear Phase FIR Systems
• If the impulse response is symmetric about its origin, linear phase results.
• If all zero filter has a linear phase response, a special non-recursive structure that
reduces the number of multiplications by approximately one-half can be
implemented.
• The impulse response for a causal filter begins at zero and ends at M-1.

h(n) = ±h(M-1-n)
The symmetry property of a linear phase FIR filter is used to
reduce the multipliers required in these realizations.
The symmetry (or anti- symmetry) property of a linear-phase FIR filter can be
exploited to reduce the number of multipliers into almost half of that in the
direct form implementations.
Consider a length-7 Type 1 FIR transfer function with a symmetric impulse
response

−1 −2 −3
H ( z ) = h[0] + h[1]z + h[2]z + h[3]z

−4 −5 −6
+ h[2]z + h[1]z + h[0]z
 Contd:
Rewriting H(z) in the form

−6 −1 −5
H ( z ) = h[0](1 + z ) + h[1]( z +z )

−2 −4 −3
+ h[2]( z + z ) + h[3]z
Contd:
 Contd:
A similar decomposition can be applied to a Type 2 FIR transfer function
For example, a length-8 Type 2 FIR transfer function can be expressed as:

−7 −1 −6
H ( z ) = h[0](1 + z ) + h[1]( z +z )

−2 −5 −3 −4
+ h[2]( z + z ) + h[3]( z +z )
 Contd:

Note: The Type 1 linear-phase structure for a length-7 FIR filter requires 4
multipliers, whereas a direct form realization requires 7 multipliers
Transposed Forms

Linear signal flow graph property:

• Transposing doesn’t change the input-output relation

Transposing:

• Reverse directions of all branches

• Interchange input and output nodes
Contd:
Example: 1
H(z ) =
1 − az −1
Reverse directions of branches and interchange input and output
 Example
In the case of FIR filters the second-order subsystems take this form.

2 delays
3 multiplications
2 additions
Compare this two first-order cascaded stages.

2 delays
4 multiplications
2 additions
THANK YOU