Analogue

Electronics
(15B11EC411)
Lecture 10: MOSFET Introduction
Dr. Rishibrind Upadhyay
Table of Contents
• MOSFET - Introduction
• MOSFET Structure
• Device Operation - Zero Voltage
• Device Operation – Channel Creation
• Device Operation – with 𝑉𝐷𝑆
• Example –Part A
• Device Operation - Increased 𝑉𝐷𝑆
• Device Operation - 𝑉𝐷𝑆 ≥ 𝑉𝑂𝑉
• Example –Part B
• Example –Part C
MOSFET - Introduction
MOSFET is upgradation over the discrete BJT

It is a voltage controlled device which comes with four terminals named as drain, source, gate, and body.
The voltage at the gate terminal mostly controls the conductivity between drain and source.

MOSFET is a unipolar device i.e. conduction of current is either carried out by the movement of electrons or
holes. The conduction path between source and drain is normally called as channel

Voltage at the gate side is used to control the width of the channel. In MOSFET gate is practically separated
from the entire body by insulating layer.

Enhancement type MOSFET is the most widely used field-effect transistor

MOSFET Structure
The transistor is fabricated on a p-type substrate, which is a single crystalline silicon wafer that provides
physical support for the device.

Two heavily doped region n+ source and n+ drain are created in the substrate
MOSFET Structure
A thin layer of 𝑆𝑖𝑂2 of thickness 𝑡𝑜𝑥 typically (1 to 10 nm), which is excellent electrical insulator, grown on
the surface of the substrate between source and drain.

Metal is deposited over the oxide region to form electrode of the device called gate
MOSFET Structure
Metal is also deposited over the source, drain, and substrate region.

Another name of MOSFET is Insulated gate FET

Substrate forms PN Junction with source and Drain

MOSFET Structure
Voltage applied at gate terminal control the current flow
between source and drain

Current will flow in longitudinal direction from

drain to source as electron will flow from
source to drain

Current will flow in the region called channel region

with length L and width W

MOSFET is symmetrical device with source and drain can be interchanged

Device Operation - Zero Voltage
Zero Voltage Operation

For zero gate voltage two back to back diode exist between source to
body and body to drain

These back to back diodes will stop any flow of charge carriers.

The path between source to drain have very high resistance in terms of 1012 Ω
Device Operation – Channel Creation
Creating Channel for Current Flow
Consider the situation:
1. Source and drain is grounded
2. Apply a positive voltage at the Gate terminal
3. As source is grounded voltage appear between gate and
source is 𝑉𝐺𝑆

Positive voltage at the gate repels the positive charge present

in the channel.

The holes are pushed back into the substrate leaving behind
carrier depletion region.

The depletion region is populated with negative charges bounded to acceptor ions.

These charges are uncovered as the positive charges are pushed back in the substrate.
Device Operation – Channel Creation
Creating Channel for Current Flow
Positive gate voltage attracts electrons from source and drain
where these charges are in abundance.

When sufficient no. of electrons are accumulated a n-channel

region is created below the gate and between the source,
drain region.

Now, applying a potential between Drain and Source, current

will start flowing between source to drain through induced n-
region.

This induced n-region will act as a current transport channel between source and drain.
The MOSFET is called n-channel MOSFET or NMOS Transistor
Device Operation – Channel Creation
Creating Channel for Current Flow
The NMOS transistor is fabricated over p-type substrate and
the channel is created by inducing the n-type region into the p-
type substrate.

So the induced channel is called inversion layer.

The value of 𝑉𝐺𝑆 for which sufficient number of mobile

electrons accumulate in the channel region to form a
conducting channel is called the threshold voltage 𝑉𝑡

𝑉𝑡 for n-channel MOSFET is positive and values depends upon fabrication process usually lies from 0.3 V
to 1 V.

The field in channel region is in vertical direction as the gate separated by oxide act as a capacitor,
positive charges accumulated at the top of the channel and corresponding negative charge at the bottom
of the plate.
Device Operation – Channel Creation
Creating Channel for Current Flow
The electric field defines the channel conductivity and in turn the
current that will flow through the channel when voltage 𝑉𝐷𝑆 is
applied

This gives the name Field Effect Transistor

Gate voltage 𝑉𝐺𝑆 > 𝑉𝑡 to from channel

For 𝑉𝐷𝑆 = 0 voltage at every point along the channel is zero and
the voltage across the oxide is constant equal to 𝑉𝐺𝑆

Extra applied 𝑉𝐺𝑆 over 𝑉𝑡 is called effective voltage or the overdrive voltage.

This voltage defines the charge in the channel denoted as 𝑉𝐺𝑆 − 𝑉𝑡 = 𝑉𝑜𝑉 called overdrive voltage
Device Operation – Channel Creation
Creating Channel for Current Flow
Now, we can express charge in the channel as

𝑄 = 𝐶𝑜𝑥 𝑊𝐿 𝑉𝑜𝑉

Where, 𝐶𝑜𝑥 is the oxide capacitance, capacitance of parallel

plate capacitor per unit area (𝐹/𝑚2 )

𝜖𝑜𝑥
𝑊 → width of the channel And, 𝐶𝑜𝑥 = 𝑡𝑜𝑥
𝐿 → Length of the channel

𝜖𝑜𝑥 is the permittivity of 𝑆𝑖𝑂2 , = 3.9𝜖𝑜 = 3.45 × 10−11 𝐹/𝑚

𝑡𝑜𝑥 is thickness of the 𝑆𝑖𝑂2 in general it is = 4 𝑛𝑚
3.45 × 10−11 −3 𝐹/𝑚2
𝐶𝑜𝑥 = = 8.6 × 10
4 × 10−9
For MOSFET with 𝐿 = 0.18𝜇𝑚 and 𝑊 = 0.72𝜇𝑚
𝐶𝑜𝑥 = 8.6𝑓𝐹/𝜇𝑚2 𝐶 = 𝐶𝑜𝑥 𝑊𝐿 = 1.1𝑓𝐹
Device Operation – with 𝑉𝐷𝑆
Applying Small 𝑽𝑫𝑺
We know, channel is already induced i.e. 𝑉𝐺𝑆 > 𝑉𝑡

Positive 𝑉𝐷𝑆 is applied between drain and source

At the starting point 𝑉𝐷𝑆 is small < 50 𝑚𝑉 or less

𝑉𝐷𝑆 will allow current to flow through the channel

As 𝑉𝐷𝑆 is very small we will assume value of 𝑉𝐺𝑆 is constant

throughout the channel

i.e. 𝑉𝑜𝑉 = 𝑉𝐺𝑆 − 𝑉𝑡 is the effective voltage between the gate and the various points in the channel

Now, we already know 𝑄 = 𝐶𝑜𝑥 𝑊𝐿 𝑉𝑜𝑉 then 𝑄

= 𝐶𝑜𝑥 𝑊𝑉𝑜𝑉
𝑢𝑛𝑖𝑡 𝑐ℎ𝑎𝑛𝑛𝑒𝑙 𝑙𝑒𝑛𝑔𝑡ℎ
Device Operation – with 𝑉𝐷𝑆
Applying Small 𝑽𝑫𝑺
Introduction of 𝑉𝐷𝑆 will cause electric filed between source and
drain
𝑉𝐷𝑆
𝐸 =
𝐿
Now, the electric field will drift channel electrons towards the
drain region with the velocity
𝜇𝑛 𝑉𝐷𝑆
𝑒𝑙𝑒𝑐𝑡𝑟𝑜𝑛 𝑑𝑟𝑖𝑓𝑡 𝑣𝑒𝑙𝑜𝑐𝑖𝑡𝑦 = 𝜇𝑛 𝐸 =
𝐿
Where 𝜇𝑛 is the mobility of the electrons at the surface of the
channel

Now, current in the channel can be calculated using

𝑄 𝜇 𝑉 𝑊
𝐼𝐷 = × 𝑒𝑙𝑒𝑐𝑡𝑟𝑜𝑛 𝑑𝑟𝑖𝑓𝑡 𝑣𝑒𝑙𝑜𝑐𝑖𝑡𝑦 = 𝐶𝑜𝑥 𝑊𝑉𝑂𝑉 × 𝑛 𝐷𝑆 = 𝜇𝑛 𝐶𝑜𝑥 𝑉 𝑉
𝑢𝑛𝑖𝑡 𝑐ℎ𝑎𝑛𝑛𝑒𝑙 𝑙𝑒𝑛𝑔𝑡ℎ 𝐿 𝐿 𝑂𝑉 𝐷𝑆
Device Operation - with 𝑉𝐷𝑆
Applying Small 𝑽𝑫𝑺
𝑊
𝐼𝐷 = 𝜇𝑛 𝐶𝑜𝑥 𝑉 𝑉
𝐿 𝑂𝑉 𝐷𝑆
Now, comparing the equation with 𝑉 = 𝐼𝑅

Then, one can say for very small 𝑉𝐷𝑆 channel behave as linear
resistor with value
1
𝑟𝐷𝑆 =
𝑊
𝜇𝑛 𝐶𝑜𝑥 𝐿 𝑉𝑂𝑉

Which is governed by 𝑉𝑂𝑉 which is also a function of 𝑉𝐺𝑆

Now, conductance of the channel can be determined using

1 𝑊 𝑊
𝑔𝑑𝑠 = 𝑟 = 𝜇𝑛 𝐶𝑜𝑥 𝑉𝑂𝑉 = 𝜇𝑛 𝐶𝑜𝑥 (𝑉𝐺𝑆 −𝑉𝑡 )
𝐷𝑆 𝐿 𝐿
Device Operation - with 𝑉𝐷𝑆
𝑊
Applying Small 𝑽𝑫𝑺 g ds = 𝜇𝑛 𝐶𝑜𝑥 (𝑉𝐺𝑆 −𝑉𝑡 )
𝐿

Now, conductance depends upon three factors

1. 𝜇𝑛 𝐶𝑜𝑥 → defined by the process technology and the

product defined as process transconductance parameter
𝐴 𝑚2 𝐹
given as 𝑘𝑛′ = 𝜇𝑛 𝐶𝑜𝑥 = = × 𝑚2
𝑉2 𝑉.𝑠

𝑊
2. 𝐿 → it is transistor aspect ratio, as ,channel
conductance is proportional to 𝑊 and inversely
proportional to 𝐿

3. 𝑉𝑂𝑉 = 𝑉𝐺𝑆 − 𝑉𝑡 → is the overdrive voltage

Device Operation - with 𝑉𝐷𝑆
Applying Small 𝑽𝑫𝑺

Now, that the increasing 𝑉𝐺𝑆 above the threshold voltage 𝑉𝑡

enhances the channel, hence the names as enhancement-mode
operation and enhancement-type MOSFET

Finally, 𝐼𝑆 → is the total leaving current (Source Current)

𝐼𝐷 → is the total entering current (Drain Current)

𝐼𝐺 → is the gate current = 0

Example – Part A
Consider a process technology for which 𝐿𝑚𝑖𝑛 = 0.4 𝜇𝑚, 𝑡𝑜𝑥 = 8 𝑛𝑚, 𝜇𝑛 = 450 𝑐𝑚2 /𝑉. 𝑠, and 𝑉𝑡 = 0.7 𝑉
(𝑎) find 𝐶𝑜𝑥 and 𝑘𝑛′

𝜖𝑜𝑥 3.45 × 10−11

𝐶𝑜𝑥 = = = 4.32 × 10−3 F/m2 = 4.32 × 10−3 F/m2
𝑡𝑜𝑥 8 × 10−9

= 4.32 × 10−3 × 10−6×2 F/𝜇m2 = 4.32 𝑓𝐹/𝜇𝑚2

𝑘𝑛′ = 𝜇𝑛 𝐶𝑜𝑥 = 450 𝑐𝑚2 /𝑉. 𝑠 × 4.32 (𝑓𝐹/𝜇𝑚2 )

= 450 104×2 𝜇𝑚2 /𝑉. 𝑠 × 4.32 (10−15 𝐹/𝜇𝑚2 )

= 450 108 × 4.32 × 10−15 (𝐹/𝑉. 𝑠) = 1944 × 10−7 𝐹/𝑉. 𝑠

= 194.4 𝜇𝐹/𝑉. 𝑠
Device Operation - Increased 𝑉𝐷𝑆
Operation of MOSFET as 𝑽𝑫𝑺 is Increased

Now, assuming 𝑉𝑂𝑉 is constant, and 𝑉𝐷𝑆 appears between

Drain and Source

Now, voltage between gate and points along the channel

decreases from:

𝑉𝐺𝑆 = 𝑉𝑡 + 𝑉𝑂𝑉 at the source end to

𝑉𝐺𝐷 = 𝑉𝐺𝑆 − 𝑉𝐷𝑆 = Vt + VOV − VDS at the drain end

Channel length is dependent upon voltage between gate

and channel, now the potential is not constant so the
channel is no more uniform in depth
Device Operation - Increased 𝑉𝐷𝑆
Operation of MOSFET as 𝑽𝑫𝑺 is Increased

Channel is deepest at source end where 𝑉𝑂𝑉 = 𝑉𝐺𝑆 − 𝑉𝑡

Channel is shallowest at the drain where depth is proportional

to 𝑉𝑂𝑉 − 𝑉𝐷𝑆

Now, as 𝑉𝐷𝑆 is increased the channel become more tapered

1
As, 𝑟𝐷𝑆 = 𝑘
𝑛 𝑉𝑂𝑉

And, 𝑉𝑂𝑉 = 𝑉𝐺𝑆 − 𝑉𝑡 as 𝑉𝐷𝑆 increases 𝑉𝐺𝑆 decreases so 𝑉𝑂𝑉

decreases, hence 𝑟𝐷𝑆 incresaes
𝑊
Where, 𝑘𝑛 = 𝜇𝑛 𝐶
𝐿 𝑜𝑥
Device Operation - Increased 𝑉𝐷𝑆
Operation of MOSFET as 𝑽𝑫𝑺 is Increased

Charge tapered region is proportional to the channel cross-sectional

area
1
This area can be seen as proportional to 𝑉𝑂𝑉 − 2 𝑉𝐷𝑆
Device Operation - Increased 𝑉𝐷𝑆
Operation of MOSFET as 𝑽𝑫𝑺 is Increased

1
This area can be seen as proportional to 𝑉𝑂𝑉 − 𝑉𝐷𝑆
2

1
Then, current is also multiplied by the factor 𝑉𝑂𝑉 − 2 𝑉𝐷𝑆

𝑊 1
𝐼𝐷 = 𝑘𝑛′ 𝑉𝑂𝑉 − 𝑉𝐷𝑆 𝑉𝐷𝑆
𝐿 2

𝑊 1 2
𝐼𝐷 = 𝑘𝑛′ 𝑉𝑂𝑉 𝑉𝐷𝑆 − 𝑉𝐷𝑆
𝐿 2

𝑊 1 2
𝐼𝐷 = 𝑘𝑛′ (𝑉𝐺𝑆 − 𝑉𝑡 )𝑉𝐷𝑆 − 𝑉𝐷𝑆
𝐿 2
Device Operation - Increased 𝑉𝐷𝑆
Operation of MOSFET as 𝑽𝑫𝑺 is Increased

𝑊 1
𝐼𝐷 = 𝑘𝑛′ 𝑉 − 𝑉 𝑉
𝐿 𝑂𝑉 2 𝐷𝑆 𝐷𝑆
𝑊 1 2
𝐼𝐷 = 𝑘𝑛′ (𝑉𝐺𝑆 − 𝑉𝑡 )𝑉𝐷𝑆 − 𝑉𝐷𝑆
𝐿 2

𝑉𝑂𝑉
Device Operation - 𝑉𝐷𝑆 ≥ 𝑉𝑂𝑉
Operation of MOSFET as 𝑽𝑫𝑺 ≥ 𝑽𝑶𝑽
Now, 𝑉𝐷𝑆 must not exceed 𝑉𝑂𝑉 as 𝑉𝐷𝑆 = 𝑉𝑂𝑉 , then 𝑉𝐺𝐷 = 𝑉𝑡

Then, depth of channel at drain region reduces to zero

The zero depth of the channel at the drain give rise to term
channel pinch-off

Now, increasing 𝑉𝐷𝑆 beyond this point does not effect the
channel shape and charge, and the current through the channel
remains constant at the value reached for 𝑉𝐷𝑆 = 𝑉𝑂𝑉

Drain current 𝐼𝐷 saturates for 𝑉𝐷𝑆 = 𝑉𝑂𝑉 , then

𝑊 2 1 2 1 ′𝑊 2 1 ′𝑊 2
𝐼𝐷 = 𝑘𝑛′ (𝑉𝐷𝑆 − 𝑉𝐷𝑆 ) = 𝑘𝑛 𝑉𝐷𝑆 = 𝑘𝑛 𝑉𝑂𝑉
𝐿 2 2 𝐿 2 𝐿
Device Operation - 𝑉𝐷𝑆 ≥ 𝑉𝑂𝑉
Operation of MOSFET as 𝑽𝑫𝑺 ≥ 𝑽𝑶𝑽
Then, 𝑉𝐷𝑠𝑎𝑡 = 𝑉𝑂𝑉 = 𝑉𝐺𝑆 − 𝑉𝑡

Channel pinch-off does not mean channel blockage

1 𝑊 2
Now, 𝐼𝐷 = 2 𝑘𝑛′ 𝑉𝑂𝑉 And, 𝑉𝑂𝑉 = 𝑉𝐺𝑆 − 𝑉𝑡
𝐿
Then,
1 𝑊
𝐼𝐷 = 𝑘𝑛′ 𝑉𝐺𝑆 − 𝑉𝑡 2
2 𝐿
Example – Part B
Consider a process technology for which 𝐿𝑚𝑖𝑛 = 0.4 𝜇𝑚, 𝑡𝑜𝑥 = 8 𝑛𝑚, 𝜇𝑛 = 450 𝑐𝑚2 /𝑉. 𝑠, and 𝑉𝑡 = 0.7 𝑉
𝑊
(𝑏) for a MOSFET with 𝐿 = 8𝜇𝑚/0.8𝜇𝑚, calculate the values of 𝑉𝑂𝑉 , 𝑉𝐺𝑆 , and 𝑉𝐷𝑠𝑚𝑖𝑛 needed to operate
the transistor in saturation region with a dc current 𝐼𝐷 = 100 𝜇𝐴

1 ′ 𝑊 2
For operation in saturation region 𝐼𝐷 = 𝑘 𝑉
2 𝑛 𝐿 𝑂𝑉

2
2 × 100 × 10−6
𝑉𝑂𝑉 = = 0.1030
8
194 × 10−6 × 0.8

𝑉𝑂𝑉 = 0.32 𝑉

𝑉𝑂𝑉 = 𝑉𝐺𝑆 − 𝑉𝑡 𝑉𝐺𝑆 = 𝑉𝑡 + 𝑉𝑂𝑉 = 0.7 + 0.32 = 1.02 𝑉

𝑉𝐷𝑆𝑚𝑖𝑛 is the minimum required voltage across 𝑉𝐷𝑆 to achieve saturation 𝑉𝐷𝑠𝑎𝑡
𝑉𝐷𝑠𝑚𝑖𝑛 = 𝑉𝑂𝑉 = 0.32 𝑉
Example – Part C
Consider a process technology for which 𝐿𝑚𝑖𝑛 = 0.4 𝜇𝑚, 𝑡𝑜𝑥 = 8 𝑛𝑚, 𝜇𝑛 = 450 𝑐𝑚2 /𝑉. 𝑠, and 𝑉𝑡 = 0.7 𝑉
(𝑐) for the device in (b), find the values of 𝑉𝑂𝑉 and 𝑉𝐺𝑆 required to cause the device to operate as a
1000 Ω resistor for very small 𝑣𝐷𝑆
1
𝑟𝐷𝑆 =
𝑊
𝜇𝑛 𝐶𝑜𝑥 𝐿 𝑉𝑂𝑉

1
𝑉𝑂𝑉 = = 0.515 𝑉
1000 × 194 × 10−6 × 10

Then by using 𝑉𝑂𝑉 = 𝑉𝐺𝑆 − 𝑉𝑡

𝑉𝐺𝑆 = 0.515 + 0.7 = 1.215 𝑉

Reference
1. Sedra, Smith, Microelectronics Circuits, Sixth Edition, Oxford.
 Analogue
Electronics
(15B11EC411)
Lecture 11: MOSFET Characteristics
Dr. Rishibrind Upadhyay
Table of Contents
• Circuit Symbol
• Current Voltage Characteristics - 𝐼𝐷 vs 𝑉𝐷𝑆
• Current Voltage Characteristics - 𝐼𝐷 vs 𝑉𝐺𝑆
• Current Voltage Characteristics – Saturation
• MOSFET in amplifier design
• MOSFET voltage transfer characteristics
• Biasing MOSFET to obtain linear Amplification
Circuit Symbol
Current Voltage Characteristics - 𝐼𝐷 vs 𝑉𝐷𝑆
The 𝑰𝑫 vs 𝑽𝑫𝑺 characterstics

NMOS work as switch when operated in triode and cut-off region

NMOS is used in saturation region for application in amplification

Current Voltage Characteristics - 𝐼𝐷 vs 𝑉𝐷𝑆
The 𝑰𝑫 vs 𝑽𝑫𝑺 characterstics
In saturation 𝐼𝐷 is independent of 𝑉𝐷𝑆

That is MOSFET will work as a constant current source where the value of
current determined by gate to source voltage 𝑉𝐺𝑆

1 ′𝑊 2 1 ′𝑊 2
𝐼𝐷 = 𝑘 𝑉 = 𝑘 𝑉𝐺𝑆 − 𝑉𝑡
2 𝑛 𝐿 𝑂𝑉 2 𝑛 𝐿

Non-linear behaviour

And this equation provide non-linear amplification

Current Voltage Characteristics - 𝐼𝐷 vs 𝑉𝐷𝑆
The 𝑰𝑫 vs 𝑽𝑫𝑺 characterstics

1 ′𝑊 2 1 ′𝑊 2
𝐼𝐷 = 𝑘 𝑉 = 𝑘𝑛 𝑉𝐺𝑆 − 𝑉𝑡
2 𝑛 𝐿 𝑂𝑉 2 𝐿
Current Voltage Characteristics - 𝐼𝐷 vs 𝑉𝐺𝑆
The 𝑰𝑫 vs 𝑽𝑮𝑺 characterstics

1 ′𝑊 2 1 ′𝑊
𝐼𝐷 = 𝑘 𝑉 = 𝑘 𝑉𝐺𝑆 − 𝑉𝑡 2
2 𝑛 𝐿 𝑂𝑉 2 𝑛 𝐿
Current Voltage Characteristics - Saturation
Finite output resistance in saturation

The O/P characteristics 𝐼𝐷 vs 𝑉𝐷𝑆 indicate 𝐼𝐷 is independent of 𝑉𝐷𝑆 in

saturation region

i.e. incremental resistance of MOSFET in saturation is infinite

This is an ideal case assuming once the channel is pinched off, increment
in 𝑉𝐷𝑆 doesn’t have any effect in 𝐼𝐷

But in practice increasing 𝑉𝐷𝑆 beyond 𝑉𝑂𝑉 affects the value of 𝐼𝐷

As 𝑉𝐷𝑆 increased pinch off point move towards source and away from
drain
Current Voltage Characteristics - Saturation
Finite output resistance in saturation

The additional voltage applied as 𝑉𝐷𝑆 appears across the narrow

depletion region between the end of the channel and the drain region.

The additional voltage sweeps the electron from the edge of the
channel to drain region via depletion region

Increase in depletion layer modifies the length of the channel and the
effective length is reduced to 𝐿 − Δ𝐿 this phenomenon is called
channel length modulation

1
As, 𝐼𝐷 ∝ 𝐿 so 𝐼𝐷 increases with decrement in 𝐿

This effect can be introduced in 𝐼𝐷 by using a factor 1 + 𝜆(𝑉𝐷𝑆 − 𝑉𝑂𝑉 )

Current Voltage Characteristics - Saturation
Finite output resistance in saturation

As, 𝑉𝐷𝑆 > 𝑉𝑂𝑉 one can write as: 1 + 𝜆𝑉𝐷𝑆

1 𝑊
Then, 𝐼𝐷 = 2 𝑘𝑛′ 𝑉𝐺𝑆 − 𝑉𝑡𝑛 2 (1 + 𝜆𝑉𝐷𝑆 )
𝐿

Where, 𝜆 is device parameter having unit (𝑉 −1 )

The value of 𝜆 depends upon both process technology and 𝐿 of the

MOSFET

𝜆 has higher impact for lower value of 𝐿 i.e. for newer technologies, they are greatly affected by
channel-length modulation effect
1
And 𝜆 ∝
𝐿
Current Voltage Characteristics - Saturation
Finite output resistance in saturation

The observed linear dependence can be represented by a factor 1 + 𝜆𝑉𝐷𝑆

Now, as extrapolating the curve 𝑉𝐷𝑆 = −𝑉𝐴

For 𝐼𝐷 = 0 i.e. 1 + 𝜆𝑉𝐷𝑆 = 0

Where, 𝑉𝐴 is the early voltage

1 1
Hence, 𝑉𝐷𝑆 = − 𝜆 = −𝑉𝐴 i.e. 𝑉𝐴 = 𝜆

1
Now, 𝑉𝐴 ∝ 𝐿 as 𝜆 ∝ Then, we can write 𝑉𝐴 = 𝑉𝐴′ 𝐿
𝐿

Where 𝑉𝐴′ is entirely process technology dependent dimensions in 𝑉/𝑚𝑖𝑐𝑟𝑜𝑛

Current Voltage Characteristics - Saturation
Finite output resistance in saturation

Now, the incremental change in the characteristics can be expressed as:

−1 −1
𝜕𝐼𝐷 𝑘𝑛′ 𝑊 2
𝑟𝑜 = 𝑟𝑜 = 𝜆 𝑉𝐺𝑆 − 𝑉𝑡𝑛
𝜕𝑉𝐷𝑆 2 𝐿
𝑉𝐺𝑆 =𝑐𝑜𝑛𝑠𝑡𝑎𝑛𝑡

1 𝑉𝐴
𝑟𝑜 = 𝑟𝑜 =
𝜆𝐼𝐷 𝐼𝐷
MOSFET in amplifier design
MOSFET function as voltage controlled current source in saturation region

𝑉𝐺𝑆 controls 𝐼𝐷 although the relationship is non-linear in nature

1 ′𝑊 2
𝐼𝐷 = 𝑘 𝑉𝐺𝑆 − 𝑉𝑡𝑛
2 𝑛 𝐿

We know voltage controlled current source act as a

transconductance amplifier

i.e. I/P signal is voltage

O/P signal is current

MOSFET in amplifier design
Transconductance amplifier can be converted by using resistance

Such as 𝑅𝐷 which converts 𝑖𝐷 into 𝑉𝐷 = 𝑖𝐷 𝑅𝐷

𝑉𝐷𝐷 is the supply voltage and with 𝑅𝐷 establishes

The operation of MOSFET in saturation region

Now, O/P voltage is

𝑣𝐷𝑆 = 𝑉𝐷𝐷 − 𝑖𝐷 𝑅𝐷
MOSFET voltage transfer characteristics
Voltage transfer characteristics

This is a plot of 𝑉𝐷𝑆 vs 𝑉𝐺𝑆 now we have

1. 𝑣𝐺𝑆 < 𝑉𝑡𝑛 → cut-off region then 𝑖𝐷 = 0, then

𝑣𝐷𝑆 = 𝑉𝐷𝐷 as 𝑣𝐷𝑆 = 𝑉𝐷𝐷 − 𝑖𝐷 𝑅𝐷

2. 𝑣𝐺𝑆 > 𝑉𝑡𝑛 → Transistor turns on and 𝑣𝐷𝑆 decreases

initially and as 𝑣𝐷𝑠 is higher than (𝑣𝐺𝑆 −𝑉𝑡 ) MOSFET
works in saturation region

3. 𝑣𝐺𝑆 ≫> 𝑉𝑡𝑛 →for this region MOSFET is in

triode region as 𝑣𝐷𝑆 < 𝑣𝐺𝑆 by 𝑉𝑡𝑛 volts
MOSFET voltage transfer characteristics
Voltage transfer characteristics
Now, we know 𝑖𝐷 in saturation region is

1 ′𝑊 2
𝑖𝐷 = 𝑘 𝑉 − 𝑉𝑡
2 𝑛 𝐿 𝐺𝑠

And, 𝑣𝐷𝑠 = 𝑉𝐷𝐷 − 𝑖𝐷 𝑅𝐷

1 2
Then, 𝑣𝐷𝑆 = 𝑉𝐷𝐷 − 2 𝑘𝑛 𝑅𝐷 𝑣𝐺𝑆 − 𝑉𝑡

This is non-linear relationship

Biasing MOSFET to obtain linear
Amplification
A DC voltage 𝑉𝐺𝑆 is selected to obtain operation at a point Q on the segment AB of VTC

Now, Q point has coordinate DC 𝑉𝐺𝑆 and DC 𝑉𝐷𝑆

1 2
Related by: 𝑉𝐷𝑆 = 𝑉𝐷𝐷 − 2 𝑘𝑛 𝑅𝐷 𝑉𝐺𝑆 − 𝑉𝑡

Q point is called bias point, or DC operating point or Quiescent

point

Now taking a signal 𝑣𝑔𝑠 (𝑡) to be superimposed over 𝑉𝐺𝑆 then,

𝑣𝐺𝑆 𝑡 = 𝑉𝐺𝑆 + 𝑣𝑔𝑠 (𝑡)

Biasing MOSFET to obtain linear
Amplification
Now, we can write
1 2
𝑣𝐷𝑆 = 𝑉𝐷𝐷 − 𝑘𝑛 𝑅𝐷 𝑣𝐺𝑆 − 𝑉𝑡
2

For 𝑣𝑔𝑠 𝑡 to be a triangular wave of

small amplitude

The magnitude of 𝑣𝑔𝑠 (𝑡) is small

that it varies for a liner segment of
VTC around the bias point Q.

Small signal voltage gain

𝑣𝑔𝑠 (𝑡) is kept very small in magnitude
𝑣𝑑𝑠 is proportional to 𝑣𝑔𝑠
Biasing MOSFET to obtain linear
Amplification
The constant of proportionality being the slope of the almost linear
segment of the VTC curve around Q is voltage gain

𝜕𝑣
Voltage gain 𝐴𝑣 = 𝜕𝑣𝐷𝑆 ȁ(𝑣𝐺𝑆 =𝑉𝐺𝑆)
𝐺𝑆

1 2
And 𝑣𝐷𝑆 = 𝑉𝐷𝐷 − 𝑘𝑛 𝑅𝐷 𝑣𝐺𝑆 − 𝑉𝑡
2

Now,
𝐴𝑣 = −𝑘𝑛 𝑅𝐷 𝑣𝐺𝑆 − 𝑉𝑡 = −𝑘𝑛 𝑅𝐷 𝑉𝑂𝑉

Observations
The gain is negative i.e. amplifier is inverting

Gain is proportional to load resistance 𝑅𝐷 , to the

transconductance parameter 𝑘𝑛 and overdrive voltage 𝑉𝑜𝑉
Biasing MOSFET to obtain linear
Amplification
Observations

The gain is negative i.e. amplifier is inverting

Gain is proportional to load resistance 𝑅𝐷 , to the transconductance parameter 𝑘𝑛 and overdrive voltage 𝑉𝑜𝑉

1 2
Now, drain current in saturation is: 𝐼𝐷 = 2 𝑘𝑛 𝑉𝑂𝑉

Then
Numerator is drop across 𝑅𝐷
2𝐼𝐷 𝐼𝐷 𝑅𝐷
𝐴𝑣 = − 2 × 𝑅 𝑉
𝐷 𝑂𝑉 = −
𝑉𝑜𝑉 𝑉𝑂𝑉 /2
Denominator is half of overdrive voltage
Biasing MOSFET to obtain linear
Amplification
Observations

This relationship provides the absolute upper limit of the gain achieved by this amplifier circuit
𝑉𝐷𝐷
Now, 𝐼𝐷 𝑅𝐷 ≤ 𝑉𝐷𝐷 And, max value of 𝐼𝐷 𝑅𝐷 = 𝑉𝐷𝐷 Then, 𝑉
𝐴𝑣𝑚𝑎𝑥 = 𝑂𝑉
2

For modern CMOS technology 𝑉𝑂𝑉 is usually 0.2 V then 𝐴𝑚𝑎𝑥 = 10𝑉𝐷𝐷

For 0.13 𝜇𝑚 CMOS technology 𝑉𝐷𝐷 = 1.3𝑉, then ȁ𝐴𝑚𝑎𝑥 ȁ ≈ 13

Reference
1. Sedra, Smith, Microelectronics Circuits, Sixth Edition, Oxford.