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Unit 3.pptx

The document provides an overview of interrupts and timers in the 8051 microcontroller, detailing how interrupts allow the CPU to respond to events without polling. It explains the types of interrupts, the process of handling them, and the configuration of timers using TMOD registers. Additionally, it covers the operation modes of timers, programming methods, and the significance of the prescaler in generating time delays.

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0% found this document useful (0 votes)
14 views43 pages

Unit 3.pptx

The document provides an overview of interrupts and timers in the 8051 microcontroller, detailing how interrupts allow the CPU to respond to events without polling. It explains the types of interrupts, the process of handling them, and the configuration of timers using TMOD registers. Additionally, it covers the operation modes of timers, programming methods, and the significance of the prescaler in generating time delays.

Uploaded by

ramolabhamare19
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Unit 3

Different Peripherals (I/O ,


Timers )
Interrupt
•An interrupt is a signal that temporarily halts the normal
execution of a program in the microcontroller to execute a
specific task and then returns to the main program.
•It allows the microcontroller to respond quickly to external
events (like a button press) or internal events (like a timer
overflow) without continuously checking for them (polling).
•In polling, the microcontroller keeps running a loop to check a
flag .
•In interrupts, the microcontroller does its work and only stops
when an event happens, saving processing time.
•A vectored interrupt is an interrupt that, when triggered,
automatically jumps to a predefined memory address
(Interrupt Vector Address) where the Interrupt Service
Routine (ISR) is stored.
Types of Interrupts in 8051
• Main Program Execution
The CPU is running the main program normally.
It executes instructions sequentially.
• Interrupt Occurs
An I/O device (e.g., sensor, UART, timer) signals that it is ready for data
transfer.
The CPU pauses the main program to handle this event.
• Push PC (Program Counter) to Stack
Before jumping to the ISR, the current address (PC) of the main
program is saved (pushed) onto the stack.
This ensures that after handling the interrupt, the CPU can resume
execution from where it left off.
• Jump to ISR (Interrupt Service Routine)
• The CPU loads the ISR address and executes the instructions inside
ISR.
• Example: Transferring data from an I/O device.
• Interrupt Handling in ISR
The ISR performs the necessary operations, like reading sensor data or
sending a byte over UART.
Return from ISR (RETI Instruction)
• After completing the ISR, the CPU retrieves the saved PC from the
stack (POP PC).
• This allows the main program to resume execution from the exact
point where it was interrupted.
Interrupt Enable Register (IE)
Interrupt Priority Register (IP)
•Show the instructions to a) enable the serial interrupt, timer
0 interrupt, and external hardware interrupt EX1, and
•b) Disable the timer zero interrupt then
•c) So how to disable all the interrupt with single instruction
• MOV IE, #8AH ; 1000 1010 in binary
• Explanation
• EA (IE.7) = 1 → Enables global interrupt enable.
• ES (IE.4) = 1 → Enables serial interrupt.
• ET0 (IE.1) = 1 → Enables Timer 0 interrupt.
• EX1 (IE.2) = 1 → Enables External Interrupt 1 (INT1).
Disable the Timer 0 Interrupt
To disable Timer 0 Interrupt, we need to clear the ET0 bit (IE.1).
assembly
CLR IE.1 ; Clears ET0 (Disables Timer 0 Interrupt)
c) Disable All Interrupts with a Single Instruction
To disable all interrupts, we clear the EA (Enable All) bit (IE.7).
assembly
CLR IE.7 ; Disables all interrupts
Programming Timers
❑ The 8051 has two timers/counters, they can be used
either as
Timers to generate a time delay or
Event counters to count events happening outside the
microcontroller
❑ Both Timer 0 and Timer 1 are 16 bits wide
Since 8051 has an 8-bit architecture, each 16-bits timer
is accessed as two separate registers of low byte and
high byte
March 28, 2025 17
Timers 0 and 1 Registers
❑ Accessed as low byte and high byte
The low byte register is called TL0/TL1 and
The high byte register is called TH0/TH1
Accessed like any other register
▪ MOV TL0,#4FH
▪ MOV R5,TH0
TH0 TL0
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

TH1 TL1

D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

March 28, 2025 18


TMOD Registers
❑ Both timers 0 and 1 use the same register, called TMOD
(timer mode), to set the various timer operation modes
❑ TMOD is a 8-bit register
The lower 4 bits are for Timer 0
The upper 4 bits are for Timer 1
In each case,
▪ The lower 2 bits are used to set the timer mode
▪ The upper 2 bits to specify the operation
MSB LSB
GATE C/T M1 M0 GATE C/T M1 M0

Timer1 Timer0
March 28, 2025 19
These are I/P signals to internal timer-0 / 1 circuit.
External clock pulses can be connected to
8051 Pin Diagram
timer-0 /1 through these I/P signals.
Port3 (Pin 10 to 17): Dual Functions
15 (T0):
Pin 14 (T1):
Timer/ Counter 01 external input
P3 Bit Function Pin
P3.0 RxD 10
P3.1 TxD 11
P3.2 INT0 12
P3.3 INT1 13
P3.4 T0 14
P3.5 T1 15
P3.6 WR 16
P3.7 RD 17
TMOD Registers
MSB LSB
GATE C/T M1 M0 GATE C/T M1 M0

Timer1 Timer0

Gating control when set.


Timer/counter is enabled
only while the INTx pin is Timer or counter selected
high and the TRx control Cleared for timer operation (input from
pin is set
When cleared, the timer is
internal system clock)
enabled whenever the TRx Set for counter operation (input from Tx input
control bit is set pin)
March 28, 2025 21
TMOD Registers
MSB LSB
GATE C/T M1 M0 GATE C/T M1 M0

Timer1 Timer0
M1 M0 Mode Operating Mode
0 0 0 13-bit timer mode
8-bit timer/counter THx with TLx as 5-bit prescaler
0 1 1 16-bit timer mode
16-bit timer/counter THx and TLx are cascaded; there is no prescaler
1 0 2 8-bit auto reload
8-bit auto reload timer/counter; THx holds a value which is to be
reloaded TLx each time it overflows
1 1 3 Split timer mode
March 28, 2025 22
March 28, 2025 23
Prescaler
• A prescaler is a divider circuit that reduces the frequency of the input
clock signal before passing it to the timer/counter.
• Function:
• It divides the clock frequency by a fixed factor (e.g., 2, 4, 8, 32, etc.).
• This allows the timer to count slower, which helps in generating
longer delays without needing an extremely high timer count.
•Since TLx counts 32 ticks before updating THx, the effective
timer input frequency becomes:
•1MHz/32=31.25kHz
•For 31.25 kHz:
•T=1/31.25 kHz=1/31250≈32 microseconds
•Every 32 microseconds, TLx overflows and increments THx by
1.
TMOD Registers
Indicate which mode and which timer are selected for each of the
following.
(a) MOV TMOD, #01H GATE C/T M1 M0 GATE C/T M1 M0
(b) MOV TMOD, #20H Timer1 Timer0
(c) MOV TMOD, #12H
Solution:
We convert the value from hex to binary.
a) TMOD = 00000001, mode 1 of timer 0, mode 0 of timer 1 is selected.
b) TMOD = 00100000, mode 0 of timer 0, mode 2 of timer 1 is selected.
c) TMOD = 00010010, mode 2 of timer 0, mode 1 of timer 1 is
selected
March 28, 2025 26
TMOD Registers
Find the timer’s clock frequency and its period for various
8051-based systems, with the crystal frequency 11.0592 MHz when
C/T bit of TMOD is 0.
If C/T = 0, it is used
as a timer for time
delay generation.
The clock source for
If C/T = 0, it is used XTAL
the time delay is the
as a timer for time
÷12
crystal frequency of oscillator
delay generation.
the 8051 1/12 × 11.0529 MHz = 921.6 MHz;
The clock source for
the time delay is the T = 1/921.6 kHz = 1.085 us
crystal frequency of
the 8051

March 28, 2025 27


Timers / Counter Control Register (TCON)
IT0 = 1 (Edge-Triggered Mode)
•The interrupt triggers only when a falling edge (HIGH to LOW
transition) occurs on the INT0 pin.
•If the signal remains LOW, the interrupt does not trigger again
until it first goes HIGH and then LOW again.
•This is useful when you only need to detect a single event, such
as a button released and pressed.
• IT0 = 0 (Level-Triggered Mode)
• The interrupt remains active as long as the INT0 pin stays LOW.
• If the pin is LOW for a long time, the interrupt keeps triggering
repeatedly until the pin goes HIGH.
• This is useful when you want to keep responding as long as a
condition is present, such as holding down a key.
Starting and Stopping Timers
❑ Timers of 8051 do starting and stopping by either software or
hardware control
In using software to start and stop the timer where GATE=0
▪ The start and stop of the timer are controlled by way of software
by the TR (timer start) bits TR0 and TR1
– The SETB instruction starts it, and it is stopped by the CLR
If C/T = 0, it is used
instruction
as a timer for time
– These instructions start and stop the timers as long as
delay generation.
The clock source for
the time delay GATE=0
is the in the TMOD register
The
crystal hardware
frequency of way of starting and stopping the timer by an external
the 8051
source is achieved by making GATE=1 in the TMOD register

March 28, 2025 32


TMOD Registers: GATE
Find the value for TMOD if we want to program timer 0 in mode 2, use
8051 XTAL for the clock source, and use instructions to start and stop
the timer.
• Timer 0, mode 2
• C/T = 0 to use
XTAL clock source
• gate = 0 to use
If C/T = 0, it is used
internal (software) start
as a timer for time
and stop method.
delay generation.
The clock source for TMOD = 0000 0010
the time delay is the
crystal frequency of
the 8051

March 28, 2025 33


Mode 1 Programming
❑ The following are the characteristics and operations of Mode1:
1. It is a 16-bit timer; therefore, it allows value of 0000 to FFFFH to
be loaded into the timer’s register TL and TH
2. After TH and TL are loaded with a 16-bit initial value, the timer
must be started
▪ This is done by SETB TR0 for timer 0 and
SETB TR1 for timer 1

XTAL TH TL TF
÷12
oscillator
TF goes high Overflow
TR
C/T = 0 when FFFF → 0 flag

March 28, 2025 34


Mode 1 Programming
3. After the timer is started, it starts to count up
▪ It counts up until it reaches its limit of FFFFH
▪ When it rolls over from FFFFH to 0000, it sets high a flag bit called
TF (timer flag)
– Each timer has its own timer flag: TF0 for timer 0, and TF1 for timer 1
– This timer flag can be monitored
▪ When this timer flag is raised, one option would be to stop the timer
with the instructions CLR TR0 or CLR TR1, for timer 0 and timer 1,
respectively
XTAL TH TL TF
÷12
oscillator
TF goes high Overflow
TR
C/T = 0 when FFFF → 0 flag
March 28, 2025 35
Mode 1 Programming
4. After the timer reaches its limit and rolls over, in order to
repeat the process
▪ TH and TL must be reloaded with the original value, and
▪ TF must be reloaded to 0

XTAL TH TL TF
÷12
oscillator
TF goes high Overflow
TR
C/T = 0 when FFFF → 0 flag
March 28, 2025 36
Mode 1 Programming
❑ To generate a time delay
1. Load the TMOD value register indicating which timer (timer 0 or
timer 1) is to be used and which timer mode (0 or 1) is
selected
2. Load registers TL and TH with initial count value
3. Start the timer
4. Keep monitoring the timer flag (TF) with the JNB TFx,target
instruction to see if it is raised
▪ Get out of the loop when TF becomes high
5. Stop the timer
6. Clear the TF flag for the next round
7. Go back to Step 2 to load TH and TL again
March 28, 2025 37
Mode 0
•13 Bit timer mode
•8 bits THx
•5 bits of TLx
Mode 3
• Mode 3 (Split Mode) is only valid for Timer 0.
• When the Timer0 is working in mode 3.
• THO is controlled by TR1.
• TLO is controlled by TR0.
• The TH0 is used as an 8-bit timer but not the counter. This is
controlled by Timer1 Control bit TR1.
• When the TH0 overflows from FFH to 00H, then TF1 is set to 1.
• When TLO overflows , TF0 is set to 1.
SCON register

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