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DLD(SP25)_LabReport1_223014025

The document is a lab report for a Digital Logic Design Lab course, focusing on the implementation of half-adders and full-adders. It includes problem descriptions, specifications, truth tables, and expression formulations for both types of adders. The report outlines the steps required to create a combinational circuit using Logisim.

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0% found this document useful (0 votes)
14 views5 pages

DLD(SP25)_LabReport1_223014025

The document is a lab report for a Digital Logic Design Lab course, focusing on the implementation of half-adders and full-adders. It includes problem descriptions, specifications, truth tables, and expression formulations for both types of adders. The report outlines the steps required to create a combinational circuit using Logisim.

Uploaded by

shihab.touhid777
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Department of Computer Science and Engineering

Spring 2025

Course Title - Digital Logic Design Lab

Course Code - CSE2102

Section - 02

Room No - PB 104

Submitted To - Raihan Kibria(Senior Lecturer, Dept. of


CSE, ULAB)

Submitted By - Fahim Shihab Touhid (223014025)

Date of Submission - Tuesday, Feb 11, 2025


LAB REPORT-1​

Problem Description

An adder or summer is a combinational circuit that adds binary numbers. There are mainly
two kinds of adders, half adder and full adder. The half adder can add only two single bits of
binary digit and outputs the sum of the bits and a carry which is the overflow of the sum. A
full adder can add two single bit digits and one carry bit which is the overflow of the sum of
the previous stage of addition and outputs the sum and the carry.

Your task is to create a combinational circuit to implement a half-adder and a full-adder.


You must describe the following steps:
1) Specification
2) Truth-table formulation
3) Expression formulation
4) Draw the diagram on paper
5) Implement using Logisim

Problem Solution
1) Specification

Half Adder Full Adder


2) Truth Table Formulation

Half Adder Truth Table:

Input A Input B Sum (S) Carry (C)

0 0 0 0

0 1 1 0

1 0 1 0

1 1 0 1


Full Adder Truth Table:

Input A Input B Carry-In (Cin) Sum (S) Carry-Out (Cout)

0 0 0 0 0

0 0 1 1 0

0 1 0 1 0

0 1 1 0 1

1 0 0 1 0

1 0 1 0 1

1 1 0 0 1

1 1 1 1 1
3) Expression Formulation

Half Adder:

Carry (C) = x · y
Sum (S) = x ⊕ y (XOR operation)

Full Adder:

Carry Out (Cout) = (x · y) + (Cin · (x ⊕ y))


Sum (S) = (x ⊕ y) ⊕ Cin

4) Draw The Diagram On Paper


5) Implement Using Logisim

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