MEMORY ORGANIZATION

OF 8051
PRESENTED BY :
Name ID

Shreya Bavalekar 231061013

Pranjal Bawa 231061014

Sahil Khade 231060036

Soham Kute 231060039

Swanand Patil 231060053

 CONTENTS
Introduction to 8051 and Memory Organization

Internal RAM

Internal ROM

Special Function Registers (SFRs)

External Memory and Memory Interfacing

 INTRODUCTION
What is Microcontroller?
Difference between Microprocessor and
Microcontroller
 Types of Microcontrollers

8-bit 16-bit 32-bit

-used to perform -used to perform -used in automatically
arithmetic and logical arithmetic and logical controlled appliances
operations operations where higher
accuracy is required

8051
Importance of Memory Organization
Efficient memory usage improves performance.

Separates code and data storage areas.

Supports simultaneous code execution and data access.

Crucial for multitasking and real-time applications.

Defines how peripherals and instructions access data.

Types of Memory in 8051
Internal Memory:
On-chip ROM (Program Memory)
On-chip RAM (Data Memory)
External Memory:
External ROM: for larger programs
External RAM: for more data storage
Special Function Registers (SFR):
Control various on-chip functions
INTERNAL ROM
VON-NEUMANN ARCHITECTURE
HARVARD ARCHITECTURE
ALU

Instruction Control Data

memory unit memory

I/O
 INTERNAL ROM
Features:
4 KB on-chip memory

Address: 0000H – 0FFFH

Non-volatile (retains data after power-off)

Stores program code

 INTERNAL ROM
Functioning:
PC starts at 0000H

Fetches code from ROM

Executes from internal memory

INTERNAL V/S EXTERNAL ROM
Feature Internal ROM External ROM

Speed Faster (on-chip access) Slower (external bus)

Power Usage Lower Slightly higher

Cost Economical Adds to component cost

Space Compact (no extra chip) Needs external memory chip

Use Case Small embedded systems Large programs/advanced use

INTERNAL RAM
 INTERNAL RAM
128 bytes (00H to 7FH) - Data memory

On-chip data memory (fast access without external

interface)

Directly accessible

This memory is critical for the 8051's operation, storing

variables, stack data, and register values.
 INTERNAL RAM
The memory is divided into three main regions:

00H - 1FH: Register Banks (32 bytes)

20H - 2FH: Bit-Addressable Area (16 bytes)

30H - 7FH: General Purpose RAM (80 bytes)

 INTERNAL RAM
Register Banks (00H – 1FH):
Four banks: Bank 0 to Bank 3
Each has R0 to R7 registers.
Bank selection via RS0, RS1 bits in PSW.
Default: Bank 0 (00H–07H)

Bit-Addressable RAM (20H – 2FH):

128 bits (16 bytes × 8 bits)
Each bit can be accessed individually: SETB 25H
Used for flags, control bits, toggling I/O states.
 INTERNAL RAM
General Purpose RAM (0x30-0x7F):
80 bytes for variables and data storage
Byte addressable only
Used for arrays, lookup tables, temporary results

Stack:
Grows upward in memory
Stack Pointer (SP) initialized at 07h
Stores return addresses and temporary data
Typically placed in general purpose area
 INTERNAL RAM
Four Addressing Modes:
Direct addressing: MOV A, 30h
Indirect addressing: MOV A, @R0
Register addressing: MOV A, R7
Bit addressing: SETB 24h

Memory Access Applications:

Register banks: Fast variable access, interrupt
context
Bit area: I/O flags, boolean operations
General RAM: Variables, lookup tables
Stack: Function calls, interrupt handling
 INTERNAL RAM
Summary:

128 bytes (0x00-0x7F) organized into:

Register Banks (32 bytes)
Bit-Addressable Area (16 bytes)
General Purpose RAM (80 bytes)

Critical resource requiring efficient management

Foundation for 8051 program execution
SPECIAL FUNCTION
REGISTERS (SFRS)
 SPECIAL FUNCTION REGISTERS
Special Function Registers (SFRs) are dedicated memory locations
within the internal RAM of the 8051 microcontroller that are used to
control specific operations of the microcontroller.

They act as the interface between software and hardware – every time
you want to control a hardware feature (like timers, ports, serial comm,
etc.), you interact with these registers.
 SPECIAL FUNCTION REGISTERS
SFRs are located in the upper 128 bytes of
internal RAM:
➤ Address range: 0x80 to 0xFF
This upper region is not accessible for
general-purpose RAM usage.
Every SFR has a fixed address (you cannot
change them).

Total internal RAM: 256 bytes

0x00 to 0x7F → General-purpose RAM
(registers, stack, bit-addressable space)
0x80 to 0xFF → Reserved for SFRs
So, SFRs occupy the upper half of internal
RAM.
SPECIAL FUNCTION REGISTERS
SPECIAL FUNCTION REGISTERS
 SPECIAL FUNCTION REGISTERS
Some SFRs allow bit-level access – you can set or clear individual bits
using instructions like SETB and CLR.
Examples:
SETB P1.0 → Sets bit 0 of Port 1 to HIGH
CLR IE.7 → Clears the EA (global interrupt enable) bit

Bit-addressable SFRs include:

ACC (0xE0)
PSW (0xD0)
P0–P3 (0x80, 90, A0, B0)
TCON (0x88)
IE (0xA8)
 SPECIAL FUNCTION REGISTERS
Why are SFRs important?
SFRs are tightly integrated with the internal memory of 8051.
They represent how the CPU communicates with internal hardware.

Without SFRs, you can't:

Use I/O ports
Run timers
Handle interrupts
Send/receive data via serial port
Control stack or memory addressing

They are the “control hub” of the microcontroller.

 EXTERNAL
MEMORY
INTERFACING
 NEED OF EXTERNAL MEMORY
RAM AND ROM
ROM stores the program code that the microcontroller runs.
RAM is used for temporary storage during program
execution(Variables, Stack operations, Buffers (data
transfer), Intermediate results)
8051 HAS:
4KB of internal ROM (to store the program)
128 bytes of internal RAM (to store temporary variables,
stacks, etc.)
That’s very limited for real-world applications.
external memory helps us add:
More Program Memory (ROM/Flash) → up to 64KB
More Data Memory (RAM) → up to 64KB
EXTERNAL PROGRAM MEMORY (ROM)

Holds your compiled code (machine instructions).

Used only if the internal ROM is insufficient.
/PSEN (Program Store Enable) signal is used to read from it.
The EA (External Access) pin decides whether to use internal or
external ROM:
EA = 1 → Use internal ROM
EA = 0 → Use external ROM
8051 fetches instructions from external ROM only when EA = 0.
 EXTERNAL DATA MEMORY (RAM)

Used to store variables, buffers, and stack.

Accessed by the MOVX instruction.
/RD (Read) and /WR (Write) control signals are used.
This is data memory and not program memory.
MOVX is short for “Move External” — it moves data to/from
external RAM
 EXTERNAL DATA MEMORY (RAM)
Read from external RAM:

Write to external RAM:

INTERFACING LOGIC

Address and Data Lines

The 8051 has 16-bit addressing capability
It can generate addresses from 0000H to FFFFH → 64KB range
The 8051 has 16 lines but all are not address.
Lower 8-bit address (A0–A7) and Data (D0–D7) — multiplexed (P0)
Upper 8-bit address (A8–A15) — not multiplexed (P2)
Since P0 is shared for both address and data We use a latch (like
74LS373) and the ALE (Address Latch Enable) signal.
On ALE rising edge, the address (A0–A7) is latched and stored in the
latch.
Then, P0 is freed up to carry data (D0–D7).
INTERFACING LOGIC
INTERFACING LOGIC
IMPORTANT POINTS TO REMEMBER
4KB of internal ROM (Read-Only Memory) → to store program code
128 bytes of internal RAM (Random Access Memory)
Maximum external ROM (program memory) = 64KB
Maximum external RAM (data memory) = 64KB
/PSEN (Program Store Enable) is used to enable the external ROM when
8051 wants to fetch program instructions.
Port 0 of 8051 is multiplexed — it carries both lower address (A0–A7)
and data (D0–D7).
We need ALE to latch the address part into a separate chip (like
74LS373) before P0 switches to data mode.
THANK YOU