ds
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July 2011
FDMS8888 NNNN
®
N-Channel PowerTrench MOSFET
30 V, 21 A, 9.5 m:
Features General Description
Max rDS(on) = 9.5 m: at VGS = 10 V, ID = 13.5 A The FDMS8888 has been designed to minimize losses in power
Max rDS(on) = 14.5 m: at VGS = 4.5 V, ID = 10.9 A conversion application. Advancements in both silicon and
package technologies have been combined to offer the lowest
Advanced Package and Silicon combination rDS(on) while maintaining excellent switching performance.
for low rDS(on) and high efficiency
®
RoHS Compliant
Synchronous Buck for Notebook Vcore and Server
Notebook Battery Pack
Load Switch
Top Bottom
Pin 1 D 5 4 G
S
S
S D 6 3 S
G
D 7 2 S
D 8 1 S
D D
D
D
Power 56
Off Characteristics
BVDSS Drain to Source Breakdown Voltage ID = 250 PA, VGS = 0 V 30 V
'BVDSS Breakdown Voltage Temperature
ID = 250 PA, referenced to 25 °C 19 mV/°C
'TJ Coefficient
IDSS Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V 1 PA
IGSS Gate to Source Leakage Current VGS = ±20 V, VDS = 0 V ±100 nA
On Characteristics
VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 PA 1.2 1.9 2.5 V
'VGS(th) Gate to Source Threshold Voltage
ID = 250 PA, referenced to 25 °C -7 mV/°C
'TJ Temperature Coefficient
VGS = 10 V, ID = 13.5 A 8 9.5
rDS(on) Static Drain to Source On Resistance VGS = 4.5 V, ID = 10.9 A 11 14.5 m:
®
VGS = 10 V, ID = 13.5 A, TJ = 125 °C 12 14.5
gFS Forward Transconductance VDD = 10 V, ID = 13.5 A 78 S
Dynamic Characteristics
Ciss Input Capacitance 1195 1585 pF
VDS = 15 V, VGS = 0 V,
Coss Output Capacitance 234 315 pF
f = 1 MHz
Crss Reverse Transfer Capacitance 161 245 pF
Rg Gate Resistance 0.9 2.5 :
Switching Characteristics
td(on) Turn-On Delay Time 9 18 ns
tr Rise Time VDD = 15 V, ID = 13.5 A, 6 12 ns
td(off) Turn-Off Delay Time VGS = 10 V, RGEN = 6 : 23 27 ns
tf Fall Time 4 10 ns
Qg Total Gate Charge VGS = 0 V to 10 V 23 33 nC
Qg Total Gate Charge VGS = 0 V to 5 V VDD = 15 V, 13 18 nC
Qgs Gate to Source Charge ID = 13.5 A 3.5 nC
Qgd Gate to Drain “Miller” Charge 5.1 nC
NOTES:
1. RTJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RTJC is guaranteed by design while RTCA is determined by
the user's board design.
2. Pulse Test: Pulse Width < 300 Ps, Duty cycle < 2.0%.
3. Starting TJ = 25 °C, L = 0.3 mH, IAS = 19 A, VDD = 27 V, VGS = 10 V.
80 4.0
VGS = 6 V 3.0
NORMALIZED
VGS = 4.5 V VGS = 3.5 V
2.5
40 VGS = 3.5 V
2.0
VGS = 4.5 V VGS = 6 V
1.5
20
VGS = 3 V 1.0
VGS = 10 V
0 0.5
0.0 0.5 1.0 1.5 2.0 2.5 3.0 0 20 40 60 80
VDS, DRAIN TO SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)
®
Figure 1. On Region Characteristics Figure 2. Normalized On-Resistance
vs Drain Current and Gate Voltage
1.8 40
ID = 13.5 A
DRAIN TO SOURCE ON-RESISTANCE
PULSE DURATION = 80 Ps
SOURCE ON-RESISTANCE (m:)
VGS = 10 V DUTY CYCLE = 0.5% MAX
1.6
30
rDS(on), DRAIN TO
1.4
ID = 13.5 A
NORMALIZED
1.2 20
1.0 TJ = 150 oC
10
0.8
TJ = 25 oC
0.6 0
-75 -50 -25 0 25 50 75 100 125 150 2 4 6 8 10
TJ, JUNCTION TEMPERATURE (oC) VGS, GATE TO SOURCE VOLTAGE (V)
80 100
IS, REVERSE DRAIN CURRENT (A)
VDS = 5 V
1
TJ = 25 oC
40
0.1 TJ = 175 oC
TJ = 150 oC TJ = 25 oC
20 TJ = -55 oC
0.01
TJ = -55 oC
0 1E-3
0 1 2 3 4 5 0.0 0.2 0.4 0.6 0.8 1.0 1.2
VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V)
10 2000
VGS, GATE TO SOURCE VOLTAGE (V)
ID = 13.5 A Ciss
8 1000
CAPACITANCE (pF)
VDD = 15 V
6
VDD = 10 V
VDD = 20 V
4 Coss
2 f = 1 MHz
VGS = 0 V
Crss
0 100
0 5 10 15 20 25 0.1 1 10 30
Qg, GATE CHARGE (nC) VDS, DRAIN TO SOURCE VOLTAGE (V)
®
Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs Drain
to Source Voltage
20 60
IAS, AVALANCHE CURRENT (A)
50
ID, DRAIN CURRENT (A)
10 VGS = 10 V
TJ = 100 oC
40
TJ = 25 oC
30
VGS = 4.5 V
TJ = 125 oC
20
Limited by Package
10
o
RTJC = 3.3 C/W
1 0
0.01 0.1 1 10 100 25 50 75 100 125 150
tAV, TIME IN AVALANCHE (ms) TC, CASE TEMPERATURE ( C)
o
100 500
P(PK), PEAK TRANSIENT POWER (W)
100 us
2 VGS = 10 V
10
ID, DRAIN CURRENT (A)
10
1 ms
SINGLE PULSE
RTJA = 125 oC/W
1 THIS AREA IS 10 ms 10
LIMITED BY rDS(on) 100 ms TA = 25 oC
1s
SINGLE PULSE
0.1 TJ = MAX RATED
10 s 1
RTJA = 125 oC/W
o DC
TA = 25 C
0.01 0.2
-3 -2 -1
0.01 0.1 1 10 100 10 10 10 1 10 100 1000
VDS, DRAIN to SOURCE VOLTAGE (V) t, PULSE WIDTH (sec)
Figure 11. Forward Bias Safe Figure 12. Single Pulse Maximum
Operating Area Power Dissipation
2
1
DUTY CYCLE-DESCENDING ORDER
NORMALIZED THERMAL
D = 0.5
0.2
IMPEDANCE, ZTJA
0.1
0.05
0.1 PDM
0.02
0.01
t1
t2
SINGLE PULSE NOTES:
0.01 DUTY FACTOR: D = t1/t2
o
RTJA = 125 C/W PEAK TJ = PDM x ZTJA x RTJA + TA
0.003
-3 -2 -1
10 10 10 1 10 100 1000
t, RECTANGULAR PULSE DURATION (sec)
®
Figure 13. Junction-to-Ambient Transient Thermal Response Curve
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