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DTM ASSIGNMENT NO 1 and 2

digital techniques assignments

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7 views

DTM ASSIGNMENT NO 1 and 2

digital techniques assignments

Uploaded by

neelima
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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Amrutvahini Polytechnic, Sangamner

Information Technology Department


Digital Techniques and Microprocessor
Assignment No. 1
Q. no 1 Convert following number systems to each other
i. (128.675)10= (?)2
ii. (BFA9) H= (?)2= (?)8
iii. (11011010)B = (?)H.

Q no 2. Perform following binary subtraction using 2’s complement


method
(11 0 0 0 1 1 1)2 - (1 0 0 0 1 1 10 )2

Q. No.3 . Add ( 87 )10 and ( 34 )10 in BCD.


Q. No. 4. Convert (174))10 to binary number.
Convert (87)10 to binary number.
Convert (174)10 to Octal number .
Convert (174)10 to Hexadecimal number.

Q. No.5 Draw logic symbol, truth table and logic equation of


i. AND Gate ii. OR Gate iii) NOT gate

Q. No. 6. Draw logic symbol, truth table and logic equation of


i. X-OR Gate ii. X-NOR Gate

Q. No. 7 Draw logic symbol, truth table and logic equation of


i. NAND Gate ii. NOR Gate

Q. No. 8. Draw logic circuit for equation


_ _ _ _ _ _
Y=A + A B C + A B C + A B C + A B

Q. No. 9. Find logical equation from following circuit.


Q. No. 10. Find logical equation from following circuit.

Q. No.11. Implement AND gate & OR gate using NOR universal gates.
Q. No. 12. State De-Morgan’s first and second law and and prove any one.

Q. No. 8. Implement the following logical expression using NAND gates only.

i) Y = A B+ A ⋅B + A⋅B
_ _ _ _ _
ii) Y = A B C+ A C .

Q. No. 9Design Half Subtracter circuit using K-Map technique.


a. Obtain logical expression for output A = ? from following K ‘map.

b. Convert the Boolean expression into standard POS form


Y = (A+B+C) + (B +D ) .
Amrutvahini Polytechnic, Sangamner
Information Technology Department
Digital Techniques and Microprocessor
Assignment No 2

Q No. 1. Design Half Adder using K Map.


Q. No. 2. Design Full Adder using K Map.
Q. No 3. State and prove De’Morgans First theorem.
Q. No. 4 State and prove De’Morgans Second theorem.
Q. No. 5. State associative law and distributive law.

Q. No 6. Simplify following Boolean expressions using Boolean algebra


_ _ _ _ _ _ _
Y=A + A B C + A B C + A B C + A B

Q. No 7. Reduce the following Boolean expression using laws of Boolean algebra


and realize using logic gates. _
Y = (A + BC) (B + A)
_ _ _
Q. No 13. Prove 𝑨 (𝑨 + 𝑪) (𝑨 𝑩 + C ) (𝑨 𝑩 𝑪 + 𝑪) = 𝟎

Q. No. 14. Write truth table and output “A”,

P q R A(Output)
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1

Q. No. . Simplify following expression using K Map and draw logic


circuit.
f(ABCD)=∑ m( 0,2,5,7,9) + d(4,12,15)
g. Convert in to standard SOP equation. Y=AB+AC

Q. No.8 Attempt any four 4 X 4=16 Marks


a. State any four Boolean Laws.
b. Simplify following equation using K map
i. f(ABCD)=∑ m(1,4,5,7,11,12,13,15)
ii. f(ABCD)=П M (0,4,5,7,10,11,14,15 )
c. Design Full Adder circuit using K map, Draw logic circuit.

d. Simplify following Boolean expressions using Boolean algebra


_ _ _ _ _ _ _
Y=A + A B C + A B C + A B C + A B

e. Design a 4 variable logic circuit whose output is 1 if input


combination form an even number.

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