FCPF11N60T-D
FCPF11N60T-D
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FCP11N60, FCPF11N60 D
Description
SUPERFET MOSFET is onsemi’s first generation of high voltage G
super−junction (SJ) MOSFET family that is utilizing charge balance
technology for outstanding low on−resistance and lower gate charge S
performance. This technology is tailored to minimize conduction loss, N−Channel
provide superior switching performance, dv/dt rate and higher
avalanche energy. Consequently, SUPERFET MOSFET is very
suitable for the switching power applications such as PFC,
server/telecom power, FPD TV power, ATX power and industrial
power applications. TO−220 Fullpack, 3−Lead
G / TO−220F−3SG
D
Features S CASE 221AT
• 650 V @ TJ = 150°C
• RDS(on) = 320 mW (Typ.)
• Ultra Low Gate Charge (Typ. Qg = 40 nC)
TO−220−3LD
• Low Effective Output Capacitance (Typ. Coss(eff.) = 95 pF) G
D CASE 340AT
S
• 100% Avalanche Tested
• These Devices are Pb−Free and are RoHS Compliant
MARKING DIAGRAM
FCP(F)
11N60(T)
AYWWZZ
ORDERING INFORMATION
THERMAL CHARACTERISTICS
Symbol Parameter FCP11N60 FCPF11N60 Unit
RqJC Thermal Resistance, Junction−to−Case 1.0 3.5 °C/W
RqCS Thermal Resistance, Case−to−Sink 0.5 − °C/W
RqJA Thermal Resistance, Junction−to−Ambient 62.5 62.5 °C/W
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FCP11N60, FCPF11N60
DBV DSS Breakdown Voltage Temperature ID = 250 mA, Referenced to 25°C − 0.6 − V/°C
Coefficient
DT J
BVDS Drain−Source Avalanche Breakdown VGS = 0 V, ID = 11 A − 700 − V
Voltage
IDSS Zero Gate Voltage Drain Current VDS = 600 V, VGS = 0 V − − 1 mA
VDS = 480 V, TC = 125°C − − 10
IGSSF Gate−Body Leakage Current, Forward VGS = 30 V, VDS = 0 V − − 100 nA
IGSSR Gate−Body Leakage Current, Reverse VGS = −30 V, VDS = 0 V − − −100 nA
ON CHARACTERISTICS
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 mA 3.0 − 5.0 V
RDS(on) Static Drain−Source On−Resistance VGS = 10 V, ID = 5.5 A − 0.32 0.38 W
gFS Forward Transconductance VDS = 40 V, ID = 5.5 A (Note 4) − 9.7 − S
DYNAMIC CHARACTERISTICS
Ciss Input Capacitance VDS = 25 V, VGS = 0 V, f = 1 MHz − 1148 1490 pF
Coss Output Capacitance − 671 870 pF
Crss Reverse Transfer Capacitance − 63 82 pF
Coss Output Capacitance VDS = 480 V, VGS = 0 V, f = 1 MHz − 35 − pF
Coss(eff.) Effective Output Capacitance VDS = 0 V to 400 V, VGS = 0 V − 95 − pF
SWITCHING CHARACTERISTICS
td(on) Turn−On Delay Time VDD = 300 V, ID = 11 A, RG = 25 W − 34 80 ns
(Note 4, 5)
tr Turn−On Rise Time − 98 205 ns
td(off) Turn−Off Delay Time − 119 250 ns
tf Turn−Off Fall Time − 56 120 ns
Qg Total Gate Charge VDS = 480 V, ID = 11 A, VGS = 10 V − 40 52 nC
(Note 4, 5)
Qgs Gate−Source Charge − 7.2 − nC
Qgd Gate−Drain Charge − 21 − nC
DRAIN−SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
IS Maximum Continuous Drain−Source Diode Forward Current − − 11 A
ISM Maximum Pulsed Drain−Source Diode Forward Current − − 33 A
VSD Drain−Source Diode Forward Voltage VGS = 0 V, IS = 11 A − − 1.4 V
trr Reverse Recovery Time VGS = 0 V, IS = 11 A, dIF/dt = 100 A/ms − 390 − ns
(Note 4)
Qrr Reverse Recovery Charge − 5.7 − mC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulse Test : Pulse width ≤ 300 ms, Duty cycle ≤ 2%
5. Essentially independent of operating temperature
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FCP11N60, FCPF11N60
102
VGS
Top: 15.0 V
10.0 V
8.0 V
101
ID, Drain Current (A)
100 100
−55°C
Notes: Notes:
1. 250 ms Pulse Test 1. VDS = 40 V
10−1 2. TC = 25°C 2. 250 ms Pulse Test
10−1
10−1 100 101 2 4 6 8 10
VDS, Drain−Source Voltage (V) VGS, Gate−Source Voltage (V)
1.0
Drain−Source On−Resistance (W)
VGS = 10 V
150°C
0.4 25°C
VGS = 20 V 100
0.2 Notes:
1. VGS = 0 V
Note: TJ = 25°C 2. 250 ms Pulse Test
0.0 10−1
0 5 10 15 20 25 30 35 40 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
ID, Drain Current (A) VSD, Source−Drain Voltage (V)
Figure 3. On−Resistance Variation vs. Drain Current Figure 4. Body Diode Forward Voltage Variation
and Gate Voltage vs. Source Current and Temperature
6000 12
Ciss = Cgs + Cgd (Cds = shorted) VDS = 100 V
Coss = Cds + Cgd
VGS, Gate−Source Voltage (V)
4000 8
3000 6
Ciss Notes:
1. VGS = 0 V
2000 2. f = 1 MHz
4
Crss
1000 2
Note: ID = 11 A
0 0
10−1 100 101 0 5 10 15 20 25 30 35 40 45
VDS, Drain−Source Voltage (V) Qg, Total Gate Charge (nC)
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FCP11N60, FCPF11N60
1.2 3.0
Drain−Source On−Resistance
Drain−Source Breakdown Voltage
2.5
RDS(on), (Normalized)
1.1
BVDSS, (Normalized)
2.0
1.0 1.5
1.0
0.9
Notes: Notes:
0.5 1. VGS = 10 V
1. VGS = 0 V
2. ID = 250 mA 2. ID = 5.5 A
0.8 0.0
−100 −50 0 50 100 150 200 −100 −50 0 50 100 150 200
TJ, Junction Temperature (5C) TJ, Junction Temperature (5C)
1 ms 1 ms
10 ms 10 ms
DC 100 ms
100 100 DC
Figure 9. Maximum Safe Operating Area Figure 10. Maximum Safe Operating Area
for FCP11N60 for FCPF11N60
12.5
10.0
ID, Drain Current (A)
7.5
5.0
2.5
0.0
25 50 75 100 125 150
TC, Case Temperature (5C)
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FCP11N60, FCPF11N60
D = 0.5
0.2 PDM
10−1 0.1
t1
0.05 t2
0.02 Notes:
0.01 1. ZqJC(t) = 1.0°C / W Max.
2. Duty Factor, D = t1 / t2
Single Pulse 3. TJM − TC = PDM x ZqJC(t)
10−2
D = 0.5
100
0.2
PDM
0.1
0.05 t1
10−1 0.02 t2
Notes:
0.01
1. ZqJC(t) = 3.5°C / W Max.
2. Duty Factor, D = t1 / t2
3. TJM − TC = PDM x ZqJC(t)
Single Pulse
10−2
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FCP11N60, FCPF11N60
VGS
Same Type
50 kW
as DUT Qg
12 V 200 nF
300 nF
10 V
10V
VDS
VGS Qgs Qgd
DUT
3 mA
Charge
RL VDS
VDS 90%
VGS VDD
RG
10%
VGS
10
10VV DUT
td(on) tr td(off)
tf
t on t off
L 1 BVDSS
VDS EAS = LI AS2
2 BVDSS −VDD
BVDSS
ID
IAS
RG
VDD ID (t)
10
V V
10V DUT VDD VDS (t)
tp
tp Time
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FCP11N60, FCPF11N60
DUT +
VDS
ISD
L
Driver
RG
Same Type
as DUT VDD
VGS
• dv/dt controlled by RG
• ISD controlled by pulse period
IRM
VDS
(DUT) Body Diode Recovery dv/dt
VSD VDD
Figure 17. Peak Diode Recovery dv/dt Test Circuit & Waveforms
SUPERFET is a registered trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States
and/or other countries.
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MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
Scale 1:1
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
DOCUMENT NUMBER: 98AON67439E Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
onsemi and are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
TO−220−3LD
CASE 340AT
ISSUE B
DATE 08 AUG 2022
GENERIC
MARKING DIAGRAM*
XXXXX
XXXXX
AYWWZZ
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
DOCUMENT NUMBER: 98AON13818G Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
onsemi and are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
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