1.​ List different embedded systems under standalone & network.

Ans:
●​ Stand Alone Embedded Systems: They are independent systems which can work by themselves;
they don’t depend on a host system. It takes input in digital or analog form and provides the output.
Examples: MP3 players, Microwave ovens and Calculator.
●​ Networked Embedded Systems: They are connected to a network which may be wired or wireless
to provide output to the attached device. They communicate with embedded web servers through
the network. Examples: Home security systems, ATM machine and Card swipe machine.

2. Differentiate between General Computing and Embedded System.

Category Computer Embedded device

An embedded device is part of an

A computer is a combination of
integrated system that is formed as a
hardware and software resources that
Description combination of computer hardware and
integrate and provide various
software for a specific function and which
functionalities to the user.
can operate without human interaction.

Human A computer needs Human Interaction Embedded devices do not need Human
Interaction to perform tasks. Interaction to perform tasks.

Tasks It can perform many tasks. It performs limited tasks.

The user has to pay more for a The user incurs a lesser cost for an embedded
Cost to user
computer. system.

Computers can be reprogrammed for a Embedded Devices are made only for a specific
Purpose
new purpose. set of purposes.

Power
More Less
Consumption

Computers are more complex devices Embedded Devices are less complex devices
Complexity
than Embedded Devices. than Computers.

Computers have larger memory

Memory
requirements due to a lot of storage of Embedded Devices need less Memory.
Requirement
data.
 Category Computer Embedded device

It has general purpose operating

Operating It may or may not contain an operating System.
system
Systems

Response Time Not Critical Critical for some applications.

Application Specific Requirements are key

Key factor Performance is a key factor factors.

Applications are alterable by the user

Alterations Applications are not alterable by the user.

3. What are different types of Embedded System? (Classification) Gives some examples.
Ans: Embedded Systems are classified based on the two factors i.e. Performance & Functional
Requirements, and Performance of Micro-controllers.
Based on Performance and Functional Requirements it is divided into 4 types as follows :
●​ Real-Time Embedded Systems: A Real-Time Embedded System is strictly time specific which
means these embedded systems provide output in a particular/defined time interval. These types of
embedded systems provide quick response in critical situations which gives most priority to time
based task performance and generation of output. That’s why real time embedded systems are used
in places where output in the right time is given more importance. Examples: Traffic control
system, Military usage in defense sector and Medical usage in health sector.
●​ Stand Alone Embedded Systems: Stand Alone Embedded Systems are independent systems
which can work by themselves; they don’t depend on a host system. It takes input in digital or
analog form and provides the output. Examples: MP3 players, Microwave ovens and Calculator.
●​ Networked Embedded Systems: Networked Embedded Systems are connected to a network
which may be wired or wireless to provide output to the attached device. They communicate with
embedded web servers through the network. Examples: Home security systems, ATM machine and
Card swipe machine.
●​ Mobile Embedded Systems: Mobile embedded systems are small and easy to use and require less
resources. They are the most preferred embedded systems. In the portability point of view mobile
embedded systems are also best. Examples: MP3 player, Mobile phones and Digital Camera.
Based on Performance and microcontroller it is divided into 3 types as follows :
●​ Small Scale Embedded Systems: Small Scale Embedded Systems are designed using an 8-bit or
16-bit micro-controller. They can be powered by a battery. The processor uses very less/limited
resources of memory and processing speed. Mainly these systems do not act as an independent
 system they act as any component of a computer system but they did not compute and dedicated for
a specific task. Examples: Digital Thermometers, TV Remote Controls, Automatic Room Light
Controllers.
●​ Medium Scale Embedded Systems: Medium Scale Embedded Systems are designed using an
16-bit or 32-bit micro-controller. These medium Scale Embedded Systems are faster than that of
small Scale Embedded Systems. Integration of hardware and software is complex in these systems.
Java, C, C++ are the programming languages used to develop medium scale embedded systems.
Different types of software tools like compiler, debugger, simulator etc are used to develop these
types of systems. Examples: Smart Home Automation Systems, Drones and ATM Machines.
●​ Sophisticated or Complex Embedded Systems: Sophisticated or Complex Embedded Systems are
designed using multiple 32-bit or 64-bit micro-controller. These systems are developed to perform
large scale complex functions. These systems have high hardware and software complexities. We
use both hardware and software components to design final systems or hardware products.
Examples: Self-Driving Cars, Smartphones & Tablets and Medical Imaging Systems (MRI, CT
Scanners).

4. List design metrics for Embedded Systems.

Ans:
➢​ Power Dissipation: Power dissipation is a major constraint in battery operated systems or systems
power using non-conventional sources of energy. Thus to maximize the available power, low power
and ultra-low power components must be incorporated in the design.
➢​ Performance: The performance of an embedded system is measured by its speed of operation. This
speed of operation is related to the instruction execution time of the system. Different parallel
execution techniques can be used to maximize speed when serial execution is not required.
➢​ Process Deadlines: Embedded systems generally have different blocks dedicated for acquiring,
processing and releasing the outputs and there is a time deadline associated with such operations
known as the process deadlines.
➢​ Size: The size of an embedded system is measured in terms of the (i) Physical space required, (ii)
Memory requirements specified in bytes for storing the data and results and also for running the
Firmware, (iii) Number of million logic gates used in the hardware.
➢​ Engineering cost: The cost of developing, designing, debugging and testing an embedded system
is called the engineering cost or the Non-recurring-cost
➢​ Prototype Development and manufacturing cost: It includes the prototype making time and
in-house testing.
➢​ Flexibility: The ability to change the functionality of the system without incurring heavy NRE cost.
Software is typically considered very flexible.
➢​ User safety & Maintenance: The system must be absolutely safe for the user. It must also contain
redundant blocks to address the safety concerns arising due to system failure. Maintenance metric
represents the changeability and additions for the system. This includes upgrading the existing
 hardware and firmware as and when new versions are released. The system should be designed in
such a way that maintenance can be done easily.
➢​ User Interfaces: This includes the keypads, GUIs and other human interfacing features present in
the system.
➢​ Correctness: This is the measure of the confidence that we have implemented the system’s
functionality correctly. We can check the functionality throughout the process of designing the
system, and we can insert test circuitry to check that manufacturing was correct.

5. Define a real-time system and discuss its type with appropriate examples.
Ans: A Real-Time Embedded System is strictly time specific which means these embedded systems
provide output in a particular/defined time interval. These types of embedded systems provide quick
response in critical situations which gives most priority to time based task performance and generation
of output. That’s why real time embedded systems are used in the defense sector, medical and health
care sector, and some other industrial applications where output in the right time is given more
importance. Examples: Traffic control system, Military usage in defense sector and Medical usage in
health sector. Further this Real-Time Embedded System is divided into two types i.e.
●​ Soft Real Time Embedded Systems: In these types of embedded systems time/deadline is not so
strictly followed. If the deadline of the task is passed (means the system didn’t give result in the
defined time) still result or output is accepted. Examples: Video Streaming Services (Netflix,
YouTube, etc.), Online Gaming, Printers and ATMs Machines.
●​ Hard Real-Time Embedded Systems: In these types of embedded systems time/deadline of task is
strictly followed. Tasks must be completed in between time frames (defined time interval)
otherwise result/output may not be accepted. Examples: Airbag Deployment in Cars, Pacemakers,
Missile Guidance Systems and Medical Ventilators.

6. Define Embedded System.

Ans: An embedded system is a combination of computer hardware and software, either fixed in
capability or programmable, designed for a specific function or functions within a larger system.
7. Characteristics of Embedded Systems.
Ans:
●​ Program is preloaded or embedded in the ROM(s) or flash memory.
●​ Dedicated set of functions.
●​ Complex dedicated-purpose algorithms.
●​ System functions in real time. The tasks execute according to priorities. The system reacts to the
events, interrupts in a predetermined time interval and schedules responses according to priorities.
●​ Complex dedicated-purpose programmed hardware, and graphic and other user interfaces.
●​ Some embedded systems have to operate in extreme environmental conditions like very high
temperatures and humidity.

8. What is the meaning of task constraints? Explain in brief.

Ans: As you build your project plan, you make decisions on the sequence and time frame of your tasks
on the project. Tasks can function independently of any task sequence but they might impact the project
timeline. Task Constraints allow a project manager to plan when certain tasks can start or complete on a
project. Depending on the constraint you use, you might have to specify a Planned Start Date, a Planned
Completion Date or both for the task. Constraint types that require defined dates impact predecessor
relationships.
Constraint Name Abbreviation Description

Task Constraint ASAP Places the start time of the task as close to the beginning of the
overview: As Soon project as possible. It is the default constraint if the project uses a
As Possible
Schedule Mode from Start Date and if the system default start date

for a new task is set to Based on the Project Planned Date.

Task Constraint ALAP Places the completion time of the task as close to the end of the
overview: As Late project as possible. This is the default constraint when the project
As Possible
Schedule Mode is from Completion Date and the system or group

default for the Start Date of a task is set to Based on the Project

Planned Date.
Task Constraint EAT Schedules a task to begin at the earliest available time after
overview: Earliest considering any predecessor relationships.

Available Time

Task Constraint LAT Schedules a task to begin at the latest available time after
overview: Latest considering predecessor-successor relationships in the project.

Available Time

Task Constraint SNET Schedules a task to start after the date you specify. This is the
overview: Start No default constraint if the project Schedule Mode is from Start Date
Earlier Than
and if the system or group default Start Date for a new task is set to

Today.

Task Constraint SNLT Schedules a task to start prior to the date you specify. This is the
overview: Start No default constraint if the project Schedule Mode is from Completion
Later Than
Date and if the system or group default for the Start Date of a task

is set to Today.

Task Constraint FNET Schedules a task to complete after the date you specify.
overview: Finish
No Earlier Than

Task Constraint FNLT Schedules a task to complete before the date you specify.
overview: Finish
No Later Than

Task Constraint MSO Schedules a task to start exactly on a specific date.

overview: Must
Start On
 Task Constraint MFO Schedules a task to end on a specific date.
overview: Must
Finish On

Task Constraint FIXT Schedules a task to start and end on specific dates.
overview: Fixed
Dates

9. List different real-time system related issues.

Ans:
●​ Real-time Response: Systems must respond within strict time limits (e.g., dial tone within 1 sec).
Hardware and software must be designed early with suitable architecture, link speeds and
processing power. Keep CPU and link utilization below 50% for predictable performance. Use a
real-time OS with preemptive scheduling, low interrupt latency, and minimal scheduling variance.
●​ Recovering from Failures: Real-time systems must function reliably even when hardware or
software failures occur. Real-time systems interact with external entities, so they must handle
unpredictable behaviors like incomplete dialing or accidental misuse. Systems should manage
interconnectivity failures in distributed environments by rerouting data or initiating recovery
procedures.
●​ Working with Distributed Architectures: Maintaining consistency requires regular audits. System
initialization follows a hierarchical software loading process. Inter-processor communication must
handle byte-ordering, padding differences and backward compatibility. Effective load balancing
prevents bottlenecks, while careful resource allocation avoids single-point failures.
●​ Asynchronous Communication: State machine-based design is preferred for handling
asynchronous interactions. Remote Procedure Calls (RPCs) are unreliable in real-time systems due
to unpredictable delays.
●​ Race Conditions and Timing: Timing is critical, with timers ensuring events occur on schedule.
Race conditions arise from concurrent resource access and must be resolved using predefined rules
or resource partitioning.

10. Discuss basic ARM architecture. What is an ARM processor and list its operating modes.
Ans: The ARM architecture processor is an advanced reduced instruction set computing [RISC]
machine and it’s a 32bit reduced instruction set computer (RISC) microcontroller. The ARM processor
conjointly has other components like the Program status register, which contains the processor flags (Z,
S, V and C). The modes bits conjointly exist within the program standing register, in addition to the
interrupt and quick interrupt disable bits; Some special registers: Some registers are used like the
instruction, memory data read and write registers and memory address register. Its design philosophy is
aimed at delivering simple but powerful instructions that execute within a single cycle at a high clock
speed.

The ARM core uses RISC architecture. Its design philosophy is aimed at delivering simple but powerful
instructions that execute within a single cycle at a high clock speed. The RISC philosophy concentrates
on reducing the complexity of instructions performed by the hardware because it is easier to provide
greater flexibility and intelligence in software rather than hardware. As a result RISC design plays
greater demands on the compiler. In contrast, the traditional complex instruction set computer (CISC)
relies more on the hardware for instruction functionality, AND consequently the CISC instructions are
more complicated. The operating modes are:
●​ USER Mode: The user mode is a normal mode, which has the least number of registers. It doesn’t
have SPSR and has limited access to the CPSR.
●​ FIQ and IRQ: The FIQ and IRQ are the two interrupt caused modes of the CPU. The FIQ is
processing interrupt and IRQ is standard interrupt. The FIQ mode has additional five banked
registers to provide more flexibility and high performance when critical interrupts are handled.
●​ SVC Mode: The Supervisor mode is the software interrupt mode of the processor to start up or
reset.
●​ Undefined Mode: The Undefined mode traps when illegal instructions are executed. The ARM
core consists of a 32-bit data bus and faster data flow.
●​ THUMB Mode: In THUMB mode 32-bit data is divided into 16-bits and increases the processing
speed.
●​ THUMB-2 Mode: In THUMB-2 mode the instructions can be either 16-bit or 32-bit and it
increases the performance of the ARM cortex –M3 microcontroller. The ARM cortex-m3
microcontroller uses only THUMB-2 instructions.
●​ Abort Mode: In this Operating mode in ARM , When an attempt to access a memory location fails,
this mode is activated. Specific areas are inaccessible in some settings due to the protection system.
When an attempt is made to access one of these locations, the CPU enters Abort mode, and the
programme that attempted to access it is terminated. When we go from user to supervisor mode and
try to access system data or a system application that the user does not have the authorization to
access, it goes into abort mode, kills the operation, and returns to user mode.
●​ Monitor mode: If you have an ARM processor with security extensions then this mode is used to
monitor the system.

11. Explain Thumb Instruction Set with example.

Ans: The Thumb instruction set consists of 16-bit instructions that act as a compact shorthand for a
subset of the 32-bit instructions of the standard ARM. Every Thumb instruction could instead be
executed via the equivalent 32-bit ARM instruction. However, not all ARM instructions are available in
the Thumb subset; for example, there’s no way to access status or coprocessor registers. Also, some
functions that can be accomplished in a single ARM instruction can only be simulated with a sequence
of Thumb instructions.

12. Explain Low-Power Mode in ARM /Cortex-M3.

Ans: Following are the architectural features which makes Cortex-M3 architecture a low power device:
●​ It has sleep mode and deep sleep mode support, which can work with various system-design
methodologies to reduce power consumption during idle periods.
●​ Its low gate count and design techniques reduce circuit activities in the processor to allow active
power to be reduced.
●​ Since Cortex-M3 has high code density, it has lowered the program size requirement. At the same
time, it allows processing tasks to be completed in a short time, so that the processor can return to
sleep mode as soon as possible to cut down energy use.
●​ Starting from Cortex-M3 revision 2, a new feature called Wakeup Interrupt Controller (WIC) is
available. This feature allows the whole processor core to be powered down, while processor states
are retained and the processor can be returned to active state almost immediately when an interrupt
takes place.
The following below explains the various modes available in Cortex M3 for power management.
●​ Sleep Modes: During sleep mode, the system clock can be stopped, but the free-running clock
input could still be running to allow the processor to be woken by an interrupt. The two sleep
modes are as follows:
a. Sleep: Indicated by the SLEEPING signal from the Cortex-M3 processor
b. Deep sleep: Indicated by the SLEEPDEEP signal from the Cortex-M3 processor

The sleep modes are invoked by Wait-For-Interrupt (WFI) or Wait-For-Event (WFE) instructions.
The events for invoking the sleep modes can be interrupts, a previously triggered interrupt, or an
external event signal pulse via the Receive Event (RXEV) signal. To decide which sleep mode is to
 be invoked in case of an event can be set by setting the SLEEPDEEP bit field of the Nested
Vectored Interrupt Controller (NVIC) control register
The sleep mode operation of the processor depends on chip design. In some cases the clock signals
can be stopped to reduce power consumption. The chip can also be designed to shut down part of
the chip to further reduce power, or it is also possible that a design can shut down the chip
completely. In a case where the chip is shut down completely, the only way to wake the system
from sleep is via a system reset.
●​ Sleep-On-Exit Feature: Processor can be programmed to go back to sleep automatically after the
interrupt routine exit. In this way, we can make the core sleep all the time unless an interrupt needs
to be served. To use this feature, we need to set the SLEEP-ON-EXIT bit in the System Control
register. If the Sleep-On-Exit feature is enabled, the processor can enter sleep at any exception and
return to thread level, even if no WFE/WFI instruction is executed.
●​ Wake-up Interrupt Controller: A new unit called the Wakeup Interrupt Controller (WIC) is
available as an optional component. This controller is coupled to the existing NVIC and is used to
generate a wakeup request when an interrupt arrives. By using the technology called State
Retention Power Gating (SRPG) and WIC together, most portions of the Cortex-M3 processor can
be powered down during deep sleep, leaving a small amount of logic for state retention. During this
power down state, the WIC remains operational and generates a wakeup request to power up and
restore the system state when an interrupt arrives. Maximum interrupt latency in such cases is
around 20-30 clock cycles.

13. Compare RISC and CISC.

Sr. RISC CISC
No.

It stands for Reduced Instruction Set It stands for Complex Instruction Set
1.
Computer. Computer.

It is a microprocessor architecture that uses a This offers hundreds of instructions of

2.
small instruction set of uniform length. different sizes to the users.

These simple instructions are executed in one This architecture has a set of special purpose
3. clock cycle. circuits which help execute the instructions at
a high speed.

4. These chips are relatively simple to design. These chips are complex to design.

5. They are inexpensive. They are relatively expensive.

Examples of RISC chips include SPARC, Examples of CISC include Intel architecture,
6.
POWER PC. AMD.
 7. It has fewer instructions. It has more instructions.

It has fixed-length encodings for instructions. It has variable-length encodings of

8.
instructions.

Simple addressing formats are supported. The instructions interact with memory using
9.
complex addressing modes.

It doesn't support arrays. It has a large number of instructions. It

10.
supports arrays.

11. It doesn't use condition codes. Condition codes are used.

Registers are used for procedure arguments The stack is used for procedure arguments
12.
and return addresses. and return addresses.

14. Explain Typical Real-Time System with Basic Block Diagram and Suitable Example.
Ans:
●​ CPU (Central Processing Unit): The core processing unit that receives input data, processes it,
and sends control signals to the actuators. It interacts with various subsystems such as memory,
software, FPGA/ASIC, and conversion units.
●​ Sensors: These detect real-world signals (e.g., temperature, pressure, motion). Data from the
sensors is converted into a digital format via A/D Conversion before being processed by the CPU.
●​ Actuators: These execute actions based on the CPU's processed output. The control signals are
converted into analog signals through D/A Conversion before being sent to actuators.
●​ A/D (Analog-to-Digital) Conversion: Converts analog signals from sensors into a digital format
for the CPU.
●​ D/A (Digital-to-Analog) Conversion: Converts processed digital signals from the CPU into analog
signals to drive actuators.
●​ Software: Provides instructions and algorithms for the CPU to process sensor data and control
actuators.
●​ Memory: Stores data, program code, and configurations needed for operation.
●​ FPGA/ASIC: Specialized hardware components that assist the CPU in processing tasks efficiently.
●​ Diagnostic Port: Used for system debugging, maintenance and monitoring.
●​ Auxiliary Systems (Power, Cooling): Provide necessary power and thermal management for
system stability.
●​ Human Interface: Allows user interaction with the system (e.g., display screens, buttons).
●​ Electromechanical Backup & Safety: A fail-safe mechanism that ensures system stability and
safety in case of failures. It directly interacts with sensors and actuators to maintain system
functionality.
●​ External Environment: Represents the real-world system where sensors measure data and
actuators perform actions.
Example:
1. Automotive Engine Control System (ECU)
2. Industrial Automation (PLC - Programmable Logic Controller)
3. Medical Equipment (Patient Monitoring System)
5. Air Traffic Control System

15. What is Predictability?

Ans: Predictability refers to the ability to accurately forecast how the system will behave under specific
conditions, meaning that given the same input, the system will consistently produce the same output
within a known timeframe, making it reliable for time-critical applications like real-time control
systems; essentially, it's the guarantee that the system's response time will be consistent and dependable
across different scenarios.

16. What is Scheduling? Explain its two basic types. (Preemptive and Non-Preemptive) OR
Compare Preemptive and Non-Preemptive.
Ans: Scheduling is the method by which processes are given access to the CPU. Efficient scheduling is
essential for optimal system performance and user experience. There are two primary types of CPU
scheduling: preemptive and non-preemptive.
●​ Preemptive Scheduling: The operating system can interrupt or preempt a running process to
allocate CPU time to another process, typically based on priority or time-sharing policies. Mainly a
process is switched from the running state to the ready state. Algorithms based on preemptive
 scheduling are Round Robin (RR) , Shortest Remaining Time First (SRTF) , Priority (preemptive
version) , etc.
●​ Non-Preemptive Scheduling: In non-preemptive scheduling, a running process cannot be
interrupted by the operating system; it voluntarily relinquishes control of the CPU. In this
scheduling, once the resources (CPU cycles) are allocated to a process, the process holds the CPU
till it gets terminated or reaches a waiting state. Algorithms based on non-preemptive scheduling
are: First Come First Serve, Shortest Job First (SJF basically non preemptive) and Priority (non
preemptive version) , etc.

NON-PREEMPTIVE
Parameter PREEMPTIVE SCHEDULING
SCHEDULING

Once resources(CPU Cycle) are

In this, resources(CPU Cycle) are
allocated to a process, the process
Basic allocated to a process for a limited
holds it till it completes its burst
time.
time or switches to waiting state

Process can not be interrupted

Processes can be interrupted in
Interrupt until it terminates itself or its
between.
time is up

If a process having high priority If a process with a long burst

frequently arrives in the ready time is running CPU, then later
Starvation
queue, a low priority process may coming process with less CPU
starve burst time may starve

Flexibility flexible Rigid

Cost Cost associated No cost associated

Response Preemptive scheduling response Non-preemptive scheduling

Time time is less response time is high

Decisions are made by the Decisions are made by the

Decision
scheduler and are based on process itself and the OS just
making
priority and time slice allocation follows the process’s instructions
 Process The OS has greater control over The OS has less control over the
control the scheduling of processes scheduling of processes

Higher overhead due to frequent Lower overhead since context

Overhead
context switching switching is less frequent

More as a process might be

Concurrency Less as a process is never
preempted when it was accessing
Overhead preempted.
a shared resource.

Examples of preemptive Examples of non-preemptive

Examples scheduling are Round Robin and scheduling are First Come First
Shortest Remaining Time First Serve and Shortest Job First

17. Define Context Switching.

Ans: The state of the CPU registers when a task has to be preempted is called the context. Saving the
contents of the CPU registers and loading the new task parameters is called context switching.

18. Define different states of a task in FreeRTOS.

Ans: A task can exist in one of the following states:
●​ Running: When a task is actually executing it is said to be in the Running state. It is currently
utilising the processor. If the processor on which the RTOS is running only has a single core then
there can only be one task in the Running state at any given time.
●​ Ready: Ready tasks are those that are able to execute (they are not in the Blocked or Suspended
state) but are not currently executing because a different task of equal or higher priority is already in
the Running state.
●​ Blocked: A task is said to be in the Blocked state if it is currently waiting for either a temporal or
external event. For example, if a task calls vTaskDelay() it will block (be placed into the Blocked
state) until the delay period has expired - a temporary event. Tasks can also block waiting for queue,
semaphore, event group, notification or semaphore event. Tasks in the Blocked state normally have
a 'timeout' period, after which the task will be timeout, and be unblocked, even if the event the task
was waiting for has not occurred. Tasks in the Blocked state do not use any processing time and
cannot be selected to enter the Running state.
●​ Suspended: Like tasks that are in the Blocked state, tasks in the Suspended state cannot be selected
to enter the Running state, but tasks in the Suspended state do not have a time out. Instead, tasks
only enter or exit the Suspended state when explicitly commanded to do so through the
vTaskSuspend() and xTaskResume() API calls respectively.