Proceedings of the Fourth International Conference on Trends in Electronics and Informatics (ICOEI 2020)

IEEE Xplore Part Number: CFP20J32-ART; ISBN: 978-1-7281-5518-0

Design and Analysis of Interleaved buck-boost

Converter for household appliances
S.T.Siddharthan Dr.J.Gnanavadivel Dr.S.T.Jaya christa
Department of EEE Associate Professor Associate Professor (Sr. Gr.)
[email protected] [email protected] [email protected]
Mepco Schlenk Engineering College Department of EEE Department of EEE
Sivakasi, Tamil Nadu, India Mepco Schlenk Engineering Mepco Schlenk Engineering
College College
Sivakasi, Tamil Nadu, India Sivakasi, Tamil Nadu, India

Abstract— DC-DC converters like switching stress greatest reliability. The power losses are reduced, so
and switching losses are increased, so it significantly it makes the converter compact in size. The dual
requires an alternate choice to reduce the losses. The phase shifting operation is beneficial to improve the
proposed model has interleaved buck/boost converter compactness of a converter. Interleaved buck boost
output voltages and also the currents are analyzed
converter is used for high power application in olden
and designed. The MATLAB software is used to
verify and the results are presented. days. The interleaving concept comes here, when the
power converters are paralleled. It is used in high
Keyword__ interleaved buck-boost converter, switching power applications to obtain the expected power
stress, switching losses, BLDC motor. output with the reduced size of inductor and other
filter components. In addition to physically
I. INTRODUCTION incorporating the power losses and all other stresses,
Interleaved buck boost converter has more interleaving also supports for distributing the losses
than one switch. The difference of phase between and thermal stresses of a power semiconductor
them is 180º.The size of the filter component is switches. The interleaved buck boost converters
reduced by this interleaving technique. The perform step-up and step-down mode of operation.
interleaved buck boost converter to receive benefits Interleaved buck boost converters will operate in both
in case of efficiency, filter size, electric losses. It has continuous and discontinuous conduction mode of
the rating of high power handling capacity, and operation.
The control is implemented by using PI controller steady-state characteristics and small-signal transfer
controls the duty cycle of the pulse width modulation function. The inductor of HPF Buck-boost converters
signal. An error signal is used as the input of PI is being operated in discontinuous conduction mode.
controller can be obtained by comparing the actual Both open-loop and closed-loop simulations are done
output achieved and the setpoint given as a reference to check the behavior of the converter [1-2, 5-7]. The
input. The PWM signal is obtained from the paper presents the structure of non-inverting
calculated result of PI controller. Dual output Buck- cascaded AC-DC Buck-Boost converter for power
Boost AC-DC converter provides a reduction in the factor correction. The unity power factor is obtained
ripple of the input current. This converter does both by using feedback to both the converters. This control
steps up and steps down operation. This Dual output loop allows sinusoidal input current in both input and
Buck-boost AC-DC converter improves dynamic output voltage range. In this, the switching voltage is
input current performance to reduce the injection of turned off and the diode voltage is turned on. This
harmonics. A Dual output Buck-boost AC-DC paper proves that the system is a dynamic ability, the
converter is designed with Phase-Shifted Pulse Width power flow is effective [2-3].
Modulation (PSPWM) technique to reduce input
current ripples and to improve dynamic In this paper, the DC-DC Buck-Boost
converter performs both steps up and step down
The paper proposes the method to model a high operation. The duty cycle limitation and high gain
power factor (HPF) AC–DC converter. A large-signal make the converter very difficult to achieve a single
equivalent circuit is being designed to perform the stage regular buck-boost converter. The converter
simulation. This large-signal model performs both attains high gain without high gain and cascaded

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Proceedings of the Fourth International Conference on Trends in Electronics and Informatics (ICOEI 2020)
IEEE Xplore Part Number: CFP20J32-ART; ISBN: 978-1-7281-5518-0

structure. This experimental setup shows the

maximum efficiency of 95% and the output voltage
ripple of ±1% [3]. The reduction of energy storage
LED drivers shows the low-voltage high-frequency
circuits and low-profile components are used in input
modular architecture [4]. This converter reduces the
voltage stress of the storage capacitor and the output
Fig. 1 Circuit diagram of the proposed converter
of the diode. A twin-bus buck converter is
implemented in the second-stage to increase the
MODE 1:
efficiency further. [5-15].This paper discusses a high
step-down transformer less single-switch ac/dc When the switch SW1 is turned ON, current
converter. The transformerless ac/dc converter flows through Vs+, SW1, Lo, Vs-and at the same
reduces the converter cost, count of the component, time the charge stored in the capacitor is discharged
and obtains a low output voltage. The efficiency to the load R from C0. The Switch SW2 is in the OFF
obtained by this method is 89% [6-10]. This paper position. The current path is shown in an arrowhead
does both a buck-boost converter and buck converter direction as marked in the equivalent circuit diagram.
operation with a novel light-emitting diode (LED) Equivalent circuit of this model is given in fig.2
driver. Due to the presence of MOSFET no auxiliary
switches or snubber circuits are used. The ZVS
process is achieved in both the switches. The power
factor is 0.99% and efficiency is 93% [7-15].

This paper investigates the power factor

correction (PFC) and a bidirectional converter
operation to obtain the desired modulation signal a
feed-forward control scheme is used to achieve
second harmonic current in PFC converter. This will
effectively prevent LED form flickering [8]. In this Fig.2 Mode 1 operation of the proposed converter
converter, the diode is replaced by a synchronous
rectifier (SR). This synchronous rectifier reduces the MODE:2
switching losses, conduction loss, and the cost is
reduced. This converter produces maximum Both the switches such as SW1, SW2 are
efficiency of 94.52% and a power factor greater than turned OFF. The inductor L0+ discharges through
0.978 [9]. C0and diode D0 and back to L0-. It forms a closed
loop here. The equivalent circuit diagram is shown in
This paper proposes low dc-link fig.3
Capacitance for power LED systems. The proposed
topology inherent property is to demonstrate a high
power factor. A soft-switching half-bridge converter
regulates LEDs current. This topology shows that
LEDs need low line current THD and high life span
[10].

II. PROPOSED INTERLEAVED BUCK-BOOST

CONVERTER Fig.3 Mode 2 operation of the proposed converter

A. Circuit model of the proposed converter MODE:3

The diagram of the proposed converter is The switch SW2 is turned ON and switch
shown in fig.1, this type of converter can reduce SW1 is turned OFF. The current flows through Vs+,
switching stress and switching losses across the SW2, L1, Vs2 and then the charge stored in the
switches by this efficiency of the converter can capacitor C0 is discharged to load R. The circuit
be improved much better than the conventional equivalence is shown in fig.4
type of buck-boost converter.

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Proceedings of the Fourth International Conference on Trends in Electronics and Informatics (ICOEI 2020)
IEEE Xplore Part Number: CFP20J32-ART; ISBN: 978-1-7281-5518-0

Inductor value (L) 30mH

Capacitor value (C) 220μF
Switching frequency (F) 50khz
Duty ratio (α) 0.7

Fig.3 Mode 3 operation of the proposed converter

MODE:4

The switches SW1, SW2 are turned OFF.

The stored charges are discharged through L1+, C0,
D1, L1-.current flowing through the circuit is shown
in fig.4

Fig.5 Open-loop simulation model of the proposed converter

Open-loop simulation is shown in fig.5.

Voltage is regulated to 24V to run the BLDC motor
and they yield the power of about 110Watts. It can be
Fig.4 Mode 4 operation of the proposed converter
used for many household appliances. Closed-loop
simulation is shown in fig.6.

A. Design parameters of the proposed converter

Design parameter can be calculated by:

Average output voltage
Vo= -(Vs*α)÷(1-α)…………(1)
Where Vo is output voltage and Vs is the supply
voltage
Inductor value can be calculated by
ΔI =Vs α÷f L…………(2)
Where ΔI is peak to peak ripple current and f is a
switching frequency.
L = (Vs α)÷(ΔI *f) ……..(3)
Capacitor value can be calculated by the formula Fig.6 closed-loop simulation of the proposed converter
ΔVc = (Ioα)/(f C)……….(4)
Here ΔV is peak to peak ripple voltage III. RESULT AND ANALYSIS OF PROPOSED
C = (Ioα) /(ΔVcf………….(5) CONVERTER
By using this formula, storage element values are
calculated. The switching difference between these A. Open-loop analysis of proposed converter
two switches is about 180 degrees. Values used for By using the calculated values, the proposed
simulation are tabulated and shown in table.1 converter model is tested by using the MATLAB
TABLE I. DESIGN PARAMETERS OF PROPOSED
Simulink model. A different analysis is made to
CONVERTER calculate efficiency at various input stages and
Parameters value also analysis is made for different loads. Output
voltage (which is shown in fig.7) obtained is
Input voltage (Vs) 12V about 24V which is mainly designed to operated
Output voltage (Vo) 24V BLDC motor.

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Proceedings of the Fourth International Conference on Trends in Electronics and Informatics (ICOEI 2020)
IEEE Xplore Part Number: CFP20J32-ART; ISBN: 978-1-7281-5518-0

TABLE: 3 variation in load resistance

Load
S.NO Vs(V) Is(V) Vo(V) Io(A)
(%)

1 12 0.77 10 23.59 0.468

2 12 1.5 20 23.56 0.935

3 12 2.12 30 23.56 1.402

4 12 2.92 40 23.56 1.87

5 12 3.64 50 23.56 2.33

fig. 7 Output voltage of the proposed converter
6 12 4.35 60 23.56 2.805
Fig.7 shows the output current waveform of
the proposed converter. Rise time is much 7 12 5.06 70 23.56 3.272
reduced and settling time for this proposed
converter is also far better than a conventional 8 12 5.78 80 23.56 3.739
buck-boost converter. Diode current, the inductor
current is shown in fig.8. Switching period is 9 12 6.49 90 23.56 4.206
about 180 degree shift. During mode1 operation
switch 1 will get operated and after a shift of
180-degree switch-2 will get operated. TABLE: 4 variation in duty cycle

S.NO Vs(V) Is(V) D Vo(V) Io(A)

1 12 2.65 0.3 18.92 2.02

2 12 3.03 0.4 20.16 2.98

3 12 4.51 0.5 22.45 3.12

4 12 6.36 0.6 23.56 4.09

5 12 8.24 0,7 36.92 6.29

Fig 9 Diode current & inductor current of the proposed

converter.
By varying input voltage, the output response is
tabulated which is shown in table.2. Similarly, by
varying the load resistance value corresponding
output response is recorded and tabulated in the table.
TABLE: 2 OPEN LOOP ANALYSIS
Variation in supply voltage A. CLOSED-LOOP ANALYSIS OF
S.NO Vs(V) Is(V) Vo(V) Io(A) η PROPOSED CONVERTER.

1 12 5.65 23.56 3.16 92 The output voltage of the proposed converter is

regulated to 24V, which is used to run BLDC motor
2 18 7.24 35.73 4.18 88 likewise it can be used to any kind of application
which operated at 100 Watts. This proposed model
3 24 9.23 47.91 5.23 86 can boost up to twofold of the input voltage. To
reduce the switching stress and switching losses new
interleaved types of converters are adopted. By using
a PI controller, the output voltage is regulated to 24V,

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Proceedings of the Fourth International Conference on Trends in Electronics and Informatics (ICOEI 2020)
IEEE Xplore Part Number: CFP20J32-ART; ISBN: 978-1-7281-5518-0

it can be differed based on the deployed application. like BLDC motor, LED drive application, household
The regulated output voltage is shown in fig.10 Appliances.

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