COMPUTER ORGANIZATION IBSC CS I UNIT

CORE - V COMPUTER ORGANIZATION

II YEAR / III SEM

UNIT - I
Data representation: Data types – Complements- fixed point and floating point representation other binary
codes. Register Transfer and Micro operations: Register transfer language- Register transfer- Bus and
Memory transfers – Arithmetic, logic and shift micro operations.
UNIT - II
Central processing unit: General register and stack organizations- instruction formats - Addressing modes-
Data transfer and manipulation - program control- RISC - Pipelining - Arithmetic and instruction- RISC
pipeline - Vector processing and Array processors.
UNIT - III
Microprocessor Architecture and its Operations - 8085 MPU - 8085 Instruction Set and Classifications.
Programming in 8085: Code conversion - BCD to Binary and Binary to BCD conversions - ASCII to BCD
and BCD to ASCII conversions - Binary to ASCII and ASCII to Binary conversions.
UNIT - IV
Programming in 8085:BCD Arithmetic - BCD addition and Subtraction – Multi byte Addition and
Subtraction - Multiplication and Division. Interrupts: The 8085 Interrupt – 8085 Vectored Interrupts –
UNIT - V
Direct Memory Access (DMA)and 8257 DMA controller - 8255A Programmable Peripheral Interface.
Basic features of Advanced Microprocessors - Pentium - I3 , I5 and I7.
TEXT BOOKS:
1. M.M. Mano, “Computer System architecture”. Pearson, Third Edition, 2007
2. R. S. Gaonkar- "Microprocessor Architecture- Programming and Applications with 8085"- 5th Edition-
Penram- 2009.
3. Tripti Dodiya & Zakiya Malek, “Computer Organization and Advanced Microprocessors”, Cengage
Learning, 2012.

REFERENCE BOOKS:
1. Mathur- “Introduction to Microprocessor”- 3rd Edition- Tata McGraw-Hill-1993.
2. P. K. Ghosh and P. R. Sridhar- “0000 to 8085: Introduction to Microprocessors for Engineers and
Scientists”- 2nd Edition- PHI- 1995.
3. NagoorKani- “Microprocessor (8085) and its Applications”- 2nd Edition- RBA Publications- 2006.
4. V. Vijayendran- “Fundamentals of Microprocessors – 8085”- S. Viswanathan Pvt. Ltd.- 2008.

WEB REFERENCES:
NPTEL & MOOC courses titled Computer organization
https://nptel.ac.in/courses/106105163/
https://nptel.ac.in/courses/106103068/

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COMPUTER ORGANIZATION
UNIT-1
Introduction
(1) Data representation
 Data refer to the symbol that represents people, events, things and ideas
 Data representation refers to the form in which data is stored, processed and
transmitted.
 Digitization is the process of converting information to digital data
 The 0’s and 1’s are used to represent digital data and referred to as binary digit

Representing Number
 Number data consists of number that can be used in arithmetic operation
Representing text
 Character data is composed of letter and numbers that are not used in calculations
Ex: name, address
 Character data is referred to as text

 ASCII Unicode are used to represent text

Ex: ASCII of A 1000001(7 bit code)
 Extended ASCII is a superset of ASCII that used 8 bit for each character
Ex : Extended ASCII of A 01000001
 Unicode uses 16 bit
Bits and Bytes
 All the data stored and transmitted by digital device in encoded as bits (b)
 A group of 8 bit is called byte (B)
 Kilo, mega, giga, tera and similar terms are used to quantify digital data

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Bit One binary digit

Byte 8bits
Kilobit 1024 or 210 bits
Kilo byte 1025 or 210 bytes
Mega bit 1048,576 or 220 bits
Mega byte 1048,576 or 22 bytes
Giga bit 230 bits
Giga byte 230bytes
Tera byte 240bytes
Peta byte 250bytes
Exa byte 260bytes

bit is used to represent internet connection speeds and movie download speed
bytes is used to represent file size and stored capacities
(2)Data types
Binary information in digital computers is stored in memory or processor registers
Register contain either data or control information
ta types in the register of digital computer are classified into
Dat
1. Number used in arithmetic computation
2. Letter used in data processing
3. Other discrete symbols used for specific purposes
mber systems
(I)Num
 Decimal number system
 Binary number system
 Octal number system
 Hexadecimal number system

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(i) Decimal number system

 Decimal number system has ten digits from 0-9
 The radix or base of decimal system is 10
Ex: 657
6x102+5x101+7x100
6x100+5x10+7
600+50+7 (657)10
(ii) Binary number system
 Binary number system used two digits 0 and 1
 Base of binary number system is 2
 0 and 1 are called BITs(Binary digit)
 Group of 4 bits form Nibble
 Group of 8 bits form Byte
Ex: 1010 Nibble
1010 1000 Byte
Ex: 0111
0x23+1x22+1x21+1x20
0+4+2+1 7
(iii) Octal number system
 Octal number system consists of digits from 0 to 7
 The base of the octal system is 8
Ex: (25)8 2x81+5x80
16+5 (21)10
(iv) Hexa decimal number system
 Hexa decimal number system consists of 16 digits(0 to 9, A to F)
 The base of the Hexa decimal system is 16
Ex: (B6)16
Bx161+6x160
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11x161+6x160
176+6
(182)10
(3) Complements
 Complements are used to simplify the subtraction
2 types of complements

r’s complements (r-1)’s complement

Ex: 10’s and 2’s ex: 9’s and1’s
complements complements

Complements

Decimal number binary number

System system
Ex: 10’s and 9’s ex: 2’s and 1’s
Complements complements
(I) Binary number system complements
i. 1’s complement
ii. 2’s complement
(i) 1’s complement
 0 is changed to 1 and 1 is changed to 0 is ones complement
Ex :( 1011)2 (0100)2[ones complement]
(ii) 2’s complement

 add 1 to one’s complement is twos complement

2’s complement=1’s complement +1

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Ex :( 1011)2
1’s complement of 1011 is 0100
Add 1 1
2’s complements of 1011 is (0101)2

(II) Decimal number system complements

i. 9’s complement
ii. 10’s complement
(i)9’s complement
 Each digit of a given number is subtracted from 9
Ex : ( 8256)10 9999
8256
9’s complement of (8256)10 is 174310
(ii) 10’s complement
 To obtain 10’s complement by add 1 to 9’s complement of a given number

10’s complement=9’s complement+1

Ex: (8256) 9999
8256
9’s complement of 8256 1743
Add 1 1
(1744)10
(4)Fixed point representation
 Integer are whole number or fixed point number with the radix point fixed after the least
significant bit

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Computer use a fixed number of bit to represent an integer

 Unsigned integer
 Signed integer
are two representations for integers
(I)Unsigned integer
 Unsigned binary integer are number without ‘+’ or ‘-‘sign
 All the bits representing the magnitude part
 No bit are used as sign bits
 No fractional digits
Ex: 14
+14 0000 1110 2 14
-14 1000 1110 2 7-0
2 3-1
2 1-1
(II) Signed integer
 MSB (most significant bit) is 0 means given number is positive
 MSB is one means given number is negative
3 representation are used for signed integer
 Signed magnitude representation
 Signed 1’s complement
 Signed 2’s complement
(i)Signed magnitude representation
 MSB is sign bit 2 14
+14 1110 2 7-0
+14 0000 1110 2 3-1
-14 1000 1110 2 1-1
 Only sign bit is changed

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(ii) Signed 1’s complement representation

+14 00001110
-14 11110001
 Negative number means complement the magnitude
(iii) Signed 2’s complement representation
+14 00001110
1’s complement of +14 11110001
Add 1 1
11110010
 Complement all the bits (include sign bit)
(5).Floating representation
 Fixed point notation is not used to represent very large number
± S*B±E
976,000,000,000,000 9.76x1014
0.000000000000976 9.76x10-14
111101.100110 1.11101100110.2^5
(6).Other binary codes
 Digital data is represented, stored and transmitted as group of binary digits and binary
codes Binary code

Weighted code Non weighted Reflective sequential Error detecting

code code code and correcting code
Ex: Ex: Ex: Ex:
Gray 5211 8421 Hamming
Excess-3 2421 Excess-3 parity
Five bit BCD Excess-3

Binary BCD
Ex: Ex:
0’s & 1’s 8421, 2421,5211
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(I) Weighted code

(i) Binary
 All the digital computer are based on binary system
 Two digits (0’s and 1’s) are used, Base or radix of binary is 2
 The right most bit is called LSB (Least significant bit)
 Left most bit is called MSB (most significant bit)
Ex: 0 1 0 1
MSB LSB
0101
0X23+1x22x0x21+1x20
0+4+0+1
5

(ii)BCD (Binary coded decimal)

 This is the one of the earliest memory code
 BCD means each decimal digit is represented by binary code of four bits
 Computer cannot understand decimal data, it is converted into BCD and the data is
processed internally. The result is converted to decimal for output.

Decimal BCD
0 0000
1 0001
2 0010
3 0011
4 0100
5 0101
6 0101
7 0111
8 1000
9 1001
10 0001 0000

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(II) Non weighted codes

 The non weighted codes are not positionally weighted
 Excess-3
 Gray code
(i) Excess-3
 Excess-3 code can be obtained by adding 3 to each decimal digit
Step 1: Add 3 to each digit of decimal number
Step 2: Convert the newly obtained decimal number back to binary
Number to get the excess-3 equivalent
Decimal BCD code Excess-3 code
0 0000 0011
1 0001 0100
2 0010 0101
3 0011 0110
4 0100 0111
5 0101 1000
6 0110 1001
7 0111 1010
8 1000 1011
9 1001 1100

 Ex: Covert the decimal number 4(10) to excess-3 code

4
3
7
(4)10 =0111(2) (excess 3 code)

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 19
1 9
3 3
4 12
0100 1100 Ans
 0100
0100

4
-3
1
0100 Ans
(ii) Gray code
 It is unweighted code and it is called as reflected or cycle code
 This code is not suitable for arithmetic operation
Decimal Binary code Gray code
0 0000 0000
1 0001 0001
2 0010 0011
3 0011 0010
4 0100 0110
5 0101 0111
6 0110 0101
7 0111 0100
8 1000 1100

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9 1001 1101
10 1010 1111
11 1100 1110
12 1100 1010
13 1101 1011
14 1110 1001
15 1111 1000

Binary to gray code

 The logical circuit which convert the binary code to equivalent gray code
 The MSB of the gray code will be same as first bit of give number
 The second bit of the code will be XOR of first and second bit of given binary
number
 The third bit of gray code will be equal to the XOR of the second and third of
the given binary number
To convert (1010)2 into gray code
XOR XOR
1 0 1 0

1 1 1 1 gray code
Gray to Binary converter
1 1 1 1
xor xor xor
1 0 1 0
 The MSB of the binary code will be same a first bit of given number
 The second bit of the code will be XOR of first of binary and second of gray and
soon.

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Application of gray code

 Boolean circuit minimization
 Communication between clock domain
 Error correction
 Genetic algorithm
 Mathematical puzzles
 Position encoders
Disadvantage of gray code
 Not suitable for arithmetic operation
 Limited practical use outside of a few specific application
(III) Reflective code (self complementing code)

A code is reflective when code is self complementing
 2421
 5421
 Excess-3 as reflective code
Decimal BCD 8421 Excess-3 2421

0 0000 0011 0000

1 0001 0100 0001
2 0010 0101 0010
3 0011 0110 0011
4 0100 0111 0100
5 0101 1000 1011
6 0110 1001 1100
7 0111 1010 1101
8 1000 1011 1110
9 1001 1100 1111

Ex: 7
9-7= 2
In 2421 decimal 7 is represent 1101
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9
-7
2
 By interchanging 1’s and 0’s we get 0010 which represent 2 in 2421 code
(IV)Sequential code
 In sequential codes, each succeeding code is one binary number greater than is preceding
code
Ex: 8421 and Excess-3 code
(V)Error detection and correcting codes
 Any external noise introduced into a physical communication medium changes bit value
from 0 to 1 or 1 to 0
 An error detection code can be used to detect error during transmission
 A parity bit is an extra bit included with a message to make the total number of 1’s either
odd or even.

Message ODD Even

0000 1 0
0001 0 1
0010 0 1
0011 1 0
0100 0 1
0101 1 0
etc

 In the receiving end, all the incoming bits are applied to a parity check

 An error is detected if the checked parity does not correspond to number

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(7)Integer arithmetic
(i)Binary addition
1010 0+0=0
1101 0+1=1
1+0=1
10111 1 + 1 =10
(ii)Binary subtraction
1101 0- 0=0
0100 0-1= 1
1001 1-0= 1
1-1= 0

(iii)Binary multiplication

1101x1101 1101x1101
1101
0000
11 01
110 1
10101001 Ans 10101001

(iv) Binary division

011
11 10010
11
11
11
00

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(8) Complements
1. r’s complement subtraction
2.(r-1)’s complements subtraction
(I) (i) 1’s complement subtraction
 1010 1111
(Subtrahend) (Minuend)
1’s complement of 1111 0000
Add 1010 1010
1010
 No carry so complement again and put the -ve sign
1010 - 0101 ans
 1111 1010
1’s complement of 1010 0101
Add 1111 1111
10100
Add the carry 0100
1
0101 ans
(ii) 9’s complement subtraction
 22-32 99
32
9’s complement of 32 67
Add 22 22
89
 No carry so again complement and put the –ve sign
99
89
-10 ans

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 32-22 99
22
9’s complement of 22 77
Add 32 32
109
Add the carry 09
1
10 ans
(II)(i)2’s complement subtraction
 1010 1111
1’s complement of 111 1 0000
Add 1 1
0001
Add 1010 1010
1011
No carry so again complement and put the -ve sign
Complement of 1011 0100
Add 1 1
0101
- 0101 ans
 1111 1010
1’s complement of 1010 0101
Add 1 1
0110
Add 1111 1111
10101
Ignore the carry 0101 ans

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(ii)10’s complement subtraction
 22-32 99
32
9’s complement of 32 67
Add 1 1
68
Add 22 22
89
No carry so again complement put -ve sign
99
89
-10 Ans
 32-22
99
22
9’s complement of 22 77
Add 1 1
78
Add 32 32
110
Ignore the carry 10 ans
(9) Register transfer and Micro operations
(i) Registers
 A register is a group of binary cells
 A register with n cells can store n bits
Ex:
1 0 1 1 0 1 0 1
7 6 5 4 3 2 1 0
8 bit register

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Commonly used register

(ii)Accumulator
 This is the special register used in arithmetic and logic operation
(iii) General purpose register
 General purpose register is used to stored intermediate data during program execution
(iv) Special purpose register
 User do not access these register these register are used by the computer system
(v) MAR (Memory address register)
 MAR is a register that holds the address of the memory
(vi) MBR (Memory buffer register)
 MBR stores instruction and data received from the memory or sent from the memory
(vii) PC (program counter)
 PC have the address of the instruction
(viii) IR (instruction register)
 IR holds the instruction to be executed
(ix) Register transfer language
 The symbolic instructions are used to describe the micro operation transfer among
register is called register transfer language (RTL)
Ex: R2 R1
R1 register data is moved to R2 register
(I) Registers
 Register are memory units
 Register store, accept and transfer data and instruction are used immediately
 The register that hold an address for the memory unit called MAR
 PC (program counter), IR (instruction register), R1 (for process register)
 n bit register are number in sequence from 0 through n-1
 Starting from 0 in the right most position and increasing the numbers toward the left

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Register individual bit

R1 7 6 5 4 3 2 1 0

15 0 15 8 7 0
R2 PCH PCL

Number of bits subfields

Block diagram of a register
(ii) Register transfer
 Register transfer means transfer the content of one register to another register
R2 R1 transfer the data from R1 to R2.R1 content is not Changed
If (p=1) then R2 R1
 If the condition is true the R1 content is moved to R2
(iii) Register transfer language (RTL) symbols
 Letters and numerals denote a register Ex: R1, R2, MAR
 Parentheses denote a part of a register Ex: R1 (0.7)
 Arrow denote transfer of data R3 R2
 Comma denotes the separation of two micro operations
R3 R2, R3 R4
 Colon denotes the termination of control function
P: R3 R2
F: R4 R3, R3 R4
(10)Bus transfers
 Bus refers to a group of wires
 Bus is used to transfer the information from one part of computer system to another

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Types of bus
Bus types

Internal External

(I) Internal bus (system bus)

 It connect all the internal components of computer to CPU and main memory
(i) Data bus
 The data bus is used to transfer the data from CPU to memory or memory to CPU
It is a bidirectional

(ii) Address bus

 It is used to transfer the address. This bus is used by CPU. It is unidirectional
(iii) Control bus
 It is used to transmit the control information
EX: read, write, and interrupt….etc
(II) External bus
 It connect the external device with the computer

Bus c c register content is placed on the bus

R1 bus bus content is loaded into R1register

Different ways of contracting a common bus system

 Using multiplexed
 Using Tri-state Buffer

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(i)Common bus system using multiplexers

4 line bus

s1
s0

4x1 4x1 4x1 4x1

Mux 3 Mux 2 Mux 1 Mux 0
3 2 1 0 3 2 1 0 3 2 1 0 3 2 1 0

D2 C2 B2 A2 D1 C1 B1A1 D0 C0 B0 A0

3210 3 2 1 0 3 2 1 0 3 2 1 0

Register D Register C Register B Register A

 The output of the register is connected to the input of the multiplexer
 The MUX 0 multiplexer the four o bit of the register
 S0, S1 selection line are connected to the selection input of all four multipl exers
 When s1 s0==0 0,the data input 0 of all 4 multiplexer are selected and app lied to the output
that from the bus
 Similar, register B is selected if s1s0=0 1 so on

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S1 S2 Register selected
0 0 A
0 1 B
1 0 C
1 1 D

(ii)Three state bus buffers

 The bus system can be constructed with 3 state gates instead of multiplexer gate
 A three stateis a digital circuit that exhibit three states
 Two states are logic 1 and 0 third state is high impedance state
 The high im pedance state behave like an open circuit, which means that the o/p is
disconnected and does not have logic

Normal input A o/p Y=A if C=1

High impedance if C=0
Control input C
Case 1
 When the control input is equal to 1 the o/p is enabled and the gate behave like any
conventiona l buffer, with o/p equal to the normal input
Case 2
 When the input is 0 the o/p disabled and the gate goes to a high impedance stateour
 The o/p of fbuffers are connected together to form a single bus line
 The control Inputs to the buffers determine which of the four normal input will
communicat e with the bus line. Other one buffer is active at any given time

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A0

B0

C0

D0

S1 0

S0 2x4 1
Bus line with 32st
E decode

 enable input of the decode is 0, all of it 4 outputs are 0, the bus lines are in high
impedance state
 When the enable input is active, one of the 3 state buffers will be active, depending on the
binary value in the select input of the decoder
(11)Memory transfer
 A memory is a collection of storage cells with associated circuits to transfer information in
and out of storage
 Memory read
 Memory write
2 operations are used
(i)Memory read
 Transfer the information from memory to outside world is called memory read

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DR M [AR]
DR data register
AR address register
M [AR] memory location of AR
 The content of memory location specified by the address of AR to the data registers
DR
(ii) Memory write
 To store the information into the memory is called write operation
M [AR] R1
 Then content of register R1 is stored into memory location whose address is specified
in the address register AR
(12) Micro-operations
 Register transfer micro operations
 Arithmetic micro operations
 Logical micro operations
 Shift micro operations
(I) Register transfer microoperations
 Transfer the binary information from one register to another
 Register transfer micro operation does not change the information ,moves from source
register to destination register
(II) Arithmetic micro operations
 It includes Add, sub, increment and decrement operations
(i) Add micro operation
R3 R1+R2
 R1 content and register R2 content are added and the sum is transferred to
register R3

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(ii) Subtraction microoperation

R3 R1+R2+1
 First to do the 2’s complement of R2 then 2’s complement is added with R2
result is moved to R3 register
(iii) Increment and decrement microoperation
R1 R1+1 (increment)
R1 R1-1 (decrement)
(III) Logical microoperation
 Logical microoperations are bitwise operations. It includes AND (^),
OR (V),XOR and NOT operations
X=0011 Y=0101
Boolean Micro operation Name Output
Function
F 0 F 0 clear 0000
F1=XY F A^B AND 0001
F1=X F A transfer A 0011
F1=X Y F A B EX-OR 0110
F1=X+Y F AVB OR 0111
Etc
Application
 We can do individual bits or a portion of a word
 We can change bit value, delete a group of bit or insert new bits value into a register
(i) Selection set micro operations
 The selective set operation set to 1 in register A when then an corresponding 1’s in
register B

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1010 A before
1100 B
1110 A after
(ii) Selection complement
 Complement bits in A where the corresponding 1’s in B (XOR)
1110 A before
1010 B
0100 A after
(iii) Selecting clear
 Clear to 0 in A only where there are corresponding 1’s in B
1110 A before
1010 B
0100 A after
(iv) Mask
 The bits of A are cleared only where there are corresponding 0’s in B (AND)
1110 1011 Before A
1111 0000 B
1110 0000 After A
(v) Insert operation
 Insert a new value into group of bits (first mask and then OR operating)
A ------------- 01101010 (Replace left most 4 bit 1001)
0110 1010 A Before
0000 1111 B mask
0000 1010 A after
Insert the new value

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0000 1010 A
1001 0000 B (insert)
1001 1010 A after
(vi)Clear
 Two numbers are equal means result is zero (X-OR)
1010 A
1010 B
0000
(IV) Shift microoperations
 Shift micro operations are used for serial transfer of information
3 types of shift micro operations
 Logical shift
 Circuit shift
 Arithmetic shift
(I) Logical shift
(i) Right logical shift
 Shift 1 bit to the right of the content of R
R shr R

0 1 1 0 1 1 0 1

8 bit register
0 0 1 1 0 1 1 0

Fill blank with 0 in MSB

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(ii)Left logical shift

R shr R
0 1 1 0 1 1 0 1

1 1 0 1 1 0 1 0

Fill blank with 0 in LSB

(II)Circular shift (Rotate operation)

 Circulation the bits of the register around the two end without Loss of information

(i) Right circular shift

0 1 1 0 1 1 0 1

1 0 1 1 0 1 1 0

(ii) Left circular shift

0 1 1 0 1 1 0 1

1 1 0 1 1 0 1 0

(III)Arithmetic shift
 An arithmetic shift is a micro operation shift a signed binary number to the left or right
 An arithmetic shift left multiplies a signed number by 2
 Shift right divides the number by 2
 Left most bit is a sign bit

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(i) Arithmetic shift left

 The arithmetic shift left insert 0 at the right end, and shift all other bit to the left

 The left most bit is lost

 If the sign reversal occurs, if means then is an over flow. if the sign bit remain the same

after shift then there is no overflow

LSB 0
1 0 1 0 0 1 1 1

0 1 0 0 1 1 1 0

(ii) Arithmetic shift right

 The arithmetic shift right leaves the sign bit unchanged and shift the number include
the sign bit to the right

1 0 1 0 0 1 1 1

1 1 0 1 0 0 1 1

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