Introduction to Microcontrollers and 8051 Real-Time Control

Introduction to Microcontrollers

1. Overview of the 8051 Microcontroller

 Developed by: Intel in 1980.

 Purpose: Widely used for embedded system applications.
 Key Features:
o 8-bit microcontroller.
o 4 KB ROM (on-chip program memory).
o 128 bytes RAM (on-chip data memory).
o 32 general-purpose I/O pins.
o Two 16-bit timers/counters.
o Full-duplex UART for serial communication.

2. Architecture of the 8051

 Core Components:
o Central Processing Unit (CPU): Executes instructions and controls operations.
o Memory: On-chip ROM for code and RAM for data storage.
o I/O Ports: Four 8-bit ports (P0, P1, P2, P3) configurable as input or output.
o Timers/Counters: Two 16-bit timers/counters for timing and counting operations.
o Interrupts: Five interrupt sources (external, timer, serial).
o Serial Port: For serial data communication.

3. I/O Ports

 Port 0: Dual-purpose; acts as a general I/O port or as a multiplexed address/data bus.

 Port 1: Dedicated I/O port.
 Port 2: Dual-purpose; acts as a general I/O port or a high-order address bus.
 Port 3: Multi-functional; supports serial communication, external interrupts, and timer
operations.

4. Memory Organization

 Code Memory:
o 4 KB internal ROM for storing program code.
o External ROM can be accessed for larger applications.
 Data Memory:
 o 128 bytes of internal RAM divided into:
 32 bytes for register banks and bit-addressable memory.
 16 bytes for byte-addressable memory.
 80 bytes for general-purpose RAM.
 Special Function Registers (SFRs): Control registers for peripherals like timers, serial
communication, and I/O ports.

5. Addressing Modes

 Immediate Addressing: Operand is a constant within the instruction.

o Example: MOV A, #25H
 Direct Addressing: Accesses data directly from a memory address.
o Example: MOV A, 30H
 Indirect Addressing: Accesses data using a pointer in a register.
o Example: MOV A, @R0
 Register Addressing: Operands are registers.
o Example: MOV A, R1
 Indexed Addressing: Used for accessing code memory.
o Example: MOVC A, @A+DPTR

6. Instruction Set of 8051

 Data Transfer Instructions:

o MOV, PUSH, POP, XCH.
 Arithmetic Instructions:
o ADD, SUBB, INC, DEC.
 Logical Instructions:
o ANL, ORL, XRL, CPL.
 Branching Instructions:
o SJMP, LJMP, AJMP, JZ, CJNE.
 Bit Manipulation Instructions:
o SETB, CLR, CPL, ANL.

8051 Real-Time Control

1. Programming Timer Interrupts

 Purpose: Automatically execute tasks at predefined intervals.

 Steps:
1. Configure the timer mode in the TCON and TMOD registers.
2. Set the timer initial value in THx and TLx registers.
3. Enable the timer interrupt in the IE register.
 4. Write the Interrupt Service Routine (ISR) to handle the interrupt.

2. Programming External Hardware Interrupts

 Purpose: Trigger the microcontroller to respond to external events.

 Steps:
1. Configure INT0 or INT1 as edge-triggered or level-triggered in the TCON register.
2. Enable the interrupt in the IE register.
3. Write the ISR to execute when the interrupt occurs.

3. Programming Serial Communication Interrupts

 Purpose: Handle data transmission and reception via UART.

 Steps:
1. Configure the serial communication mode in the SCON register.
2. Set the baud rate using the timer.
3. Enable the serial interrupt in the IE register.
4. Write the ISR to handle transmit/receive operations.

4. Programming 8051 Timers and Counters

 Timers: Generate delays or time events.

o Modes:
 Mode 0: 13-bit timer.
 Mode 1: 16-bit timer.
 Mode 2: 8-bit auto-reload.
 Mode 3: Split timer mode.
 Counters: Count external events using T0 or T1 pins.
 Steps:

1. Select the timer or counter mode in TMOD.

2. Load initial values into THx and TLx.
3. Start the timer using the TCON register.

I/O and Memory Interface & Serial Communication and Bus Interface
I/O and Memory Interface

1. 8251 - USART (Universal Synchronous Asynchronous Receiver Transmitter)

 Purpose: Provides serial communication capabilities for microprocessors.

 Features:
o Supports both synchronous and asynchronous data transmission.
o Configurable baud rate for communication speed.
o Error detection through parity checking.
 Components:
o Data Buffer: Temporarily stores data being transmitted or received.
o Control Registers: Configure the mode and status of communication.
o Clock Generator: Provides synchronization for synchronous transmission.

2. 8256 - Direct Memory Access (DMA) Controller

 Purpose: Transfers data directly between memory and peripherals, bypassing the CPU.
 Features:
o Increases data transfer speed by offloading work from the CPU.
o Supports multiple channels for simultaneous transfers.
 Working:
o Initiates memory access cycles to transfer data directly between the source and
destination.
o Uses a request and acknowledgment mechanism for handshaking.

3. 8259 - Programmable Interrupt Controller (PIC)

 Purpose: Manages multiple interrupt signals efficiently.

 Features:
o Can handle up to 8 interrupt lines; expandable to 64 using cascading.
o Prioritizes interrupts dynamically or statically.
 Working:
o Interrupt signals are routed to the CPU based on priority.
o Includes an Interrupt Mask Register (IMR) to enable/disable specific interrupts.

4. LCD (Liquid Crystal Display)

 Purpose: Displays text or graphics in embedded systems.

 Features:
o Low power consumption.
 o Alphanumeric and graphical display capabilities.
 Interface:
o Uses control lines (e.g., RS, RW, E) and data lines to communicate with microcontrollers.

5. 8279 - Keyboard Display Interface

 Purpose: Interfaces keyboards and displays with microprocessors.

 Features:
o Scans a matrix keyboard and displays data on a 7-segment display.
o Programmable debounce time for key presses.
 Components:
o Keyboard Section: Handles key press detection and debounce.
o Display Section: Drives LED or 7-segment displays.

6. External Memory (RAM and ROM Interface)

 RAM Interface:
o Provides volatile storage for program and data execution.
o Requires address and data buses, along with control signals (e.g., Chip Select,
Read/Write).
 ROM Interface:
o Stores non-volatile firmware and programs.
o Typically connected using address and data buses with control signals like Chip Enable.

7. ADC (Analog to Digital Converter)

 Purpose: Converts analog signals (e.g., voltage) into digital values for processing.
 Features:
o Resolution determines the precision of conversion (e.g., 8-bit, 10-bit).
o Sampling rate defines the speed of conversion.
 Interface to 8051:
o Requires control signals (e.g., Start, End of Conversion) and data pins for digital output.

8. DAC (Digital to Analog Converter)

 Purpose: Converts digital values into analog signals (e.g., voltage or current).
 Features:
o Resolution and settling time determine output quality.
 Interface to 8051:
 o Digital input is sent from the microcontroller to generate an analog output.

Serial Communication and Bus Interface

1. Serial Communication Standards

 Define how data is transmitted serially (bit-by-bit) over a communication line.

 Examples: RS232, USB, I2C, SPI, and UART.

2. Serial Data Transfer Scheme

 Synchronous Transmission: Data is synchronized with a clock signal.

o Advantage: Reliable and faster.
o Example: I2C.
 Asynchronous Transmission: No clock signal; uses start and stop bits for synchronization.
o Advantage: Simpler wiring.
o Example: UART.

3. On-Board Communication Interfaces

 I2C Bus (Inter-Integrated Circuit):

o Multi-master, multi-slave protocol.
o Uses two wires (SDA for data, SCL for clock).
o Suitable for low-speed, short-distance communication.
 SPI Bus (Serial Peripheral Interface):
o Full-duplex communication.
o Uses four wires (MOSI, MISO, SCLK, and SS).
o High-speed and widely used for peripherals like sensors and SD cards.
 UART (Universal Asynchronous Receiver Transmitter):
o Simple and efficient for point-to-point communication.
o Requires baud rate configuration for both sender and receiver.

4. External Communication Interfaces

 RS232:
o Standard for serial communication.
o Uses voltage levels (+12V and -12V) for data transmission.
o Commonly used for PC-to-peripheral communication.
 USB (Universal Serial Bus):
 o High-speed communication standard.
o Supports plug-and-play and hot-swapping.
o Widely used for external peripherals like storage devices and cameras.

ARM Architecture

1. ARM Processor Fundamentals

o ARM processors are designed for energy efficiency and performance, commonly
used in mobile and embedded systems.
2. ARM Architecture Components
o Registers: General-purpose registers and special registers like the CPSR (Current
Program Status Register).
o CPSR: Holds flags for condition codes, processor modes, and interrupt states.
o Pipeline: ARM architecture supports a pipelined architecture to improve
instruction throughput.
o Exceptions and Interrupts: Mechanisms for handling unexpected events.
o Interrupt Vector Table: Defines memory locations for handling different types
of interrupts.
3. ARM Instruction Set
o Data Processing Instructions: Perform arithmetic and logical operations.
o Branch Instructions: Used for conditional and unconditional jumps.
o Load/Store Instructions: Manage data transfers between registers and memory.
o Software Interrupt Instructions: Facilitate system calls or supervisor mode
transitions.
o Program Status Register (PSR) Instructions: Interact with CPSR and SPSR.
o Loading Constants: Load immediate values into registers.
o Conditional Execution: Executes instructions based on specific conditions.
o Thumb Instructions: A compressed version of the ARM instruction set for
improved efficiency in memory-constrained environments.

Advanced ARM Processors

1. Cortex Processors
o ARM Cortex processors are advanced ARM cores optimized for performance,
power efficiency, and scalability.
o Commonly used in mobile devices, embedded systems, and IoT.
2. OMAP Processors
o Developed by Texas Instruments, these processors integrate ARM cores with
multimedia and signal processing capabilities.
o Designed for high-performance mobile and multimedia applications.
Processor Performance Ranking

 Processors are ranked based on their clock speed, commonly measured in Hertz (Hz) or
Gigahertz (GHz).
 Higher clock speeds generally equate to better performance but depend on other factors
like core architecture and efficiency.

Major Processor Manufacturers

1. Intel
o Dominates the market for desktop and laptop processors.
o Offers stable, high-performance processors.
o Processor Tiers:
 i3: Entry-level performance.
 i5: Mid-range performance.
 i7: High-performance hardware.
2. AMD
o Main competitor to Intel.
o Known for affordability and competitive performance.
o Processor Lines:
 Athlon: Budget models.
 Phenom & FX: Mainstream and high-performance models.
3. ARM
o Specializes in processors for smartphones, tablets, and mobile devices.
o Highly efficient in power consumption.
o Used in popular devices like Apple iPhones, iPads, Samsung Galaxy series, and
HTC devices.
o Rule of thumb: If not labeled as AMD or Intel, it's likely an ARM processor.