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CMOS 2

The document consists of multiple-choice questions related to semiconductor technology, specifically focusing on MOSFET, CMOS, and BICMOS devices. It covers topics such as resistance, capacitance, transistor configurations, and operational characteristics. The questions assess knowledge on various aspects of semiconductor devices and their applications in integrated circuits.

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karthik1461956
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11 views8 pages

CMOS 2

The document consists of multiple-choice questions related to semiconductor technology, specifically focusing on MOSFET, CMOS, and BICMOS devices. It covers topics such as resistance, capacitance, transistor configurations, and operational characteristics. The questions assess knowledge on various aspects of semiconductor devices and their applications in integrated circuits.

Uploaded by

karthik1461956
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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Which layer has high resistance value?

a) polysilicon
b) silicide
c) diffusion
d) metal

Which layer has high capacitance value?


a) metal
b) diffusion
c) silicide
d) polysilicon

Conducting layer is separated from substrate using


a) dielectric layer
b) silicon layers
c) metal layer
d) diffusion layer

Relative capacitance of diffusion region of 5 micron technology is


a) 1
b) 0.25
c) 1.25
d) 2

The value of gate capacitance is


a) 0.25 square Cg
b) 1 square Cg
c) 1.25 square Cg
d) 1.5 square Cg

What is the transition point of an inverter?


a) Vdd
b) 0.5 Vdd
c) 0.25 Vdd
d) 2 Vdd

Delay unit of 5 micron technology is


a) 1 nsec
b) 0.1 nsec
c) 0.01 nsec
d) 1 sec

6. Mobility of proton or hole at room temperature is


a) 650 cm2/V sec
b) 260 cm2/V sec
c) 240 cm2/V sec
d) 500 cm2/V sec
Transit time can be given by
a) L / v
b) v / L
c) v x L
d) v x V

7. In resistive region
a) Vds greater than (Vgs – Vt)
b) Vds lesser than (Vgs – Vt)
c) Vgs greater than (Vds – Vt)
d) Vgs lesser than (Vds – Vt)

The condition for saturation is


a) Vgs = Vds
b) Vds = Vgs – Vt
c) Vgs = Vds – Vt
d) Vds greater than Vgs – vt

Threshold voltage is negative for


a) nMOS depletion
b) nMOS enhancement
c) pMOS depletion
d) pMOS enhancement

In linear region, ______ channel exists


a) uniform
b) non-uniform
c) wide
d) uniform and wide

The current Ids _______ as Vds increases


a) increases
b) decreases
c) remains fairly constant
d) exponentially increases

When threshold voltage is more, leakage current will be


a) more
b) less
c) all of the mentioned
d) none of the mentioned

When the channel pinches off?


a) Vgs>Vds
b) Vds>Vgs
c) Vds>(Vgs-Vth)
d) Vgs>(Vds-Vth)
MOSFET is used as
a) current source
b) voltage source
c) buffer
d) divider

If both the transistors are in saturation, then they acts as

a)Voltage source
b)Divider
c)Current source
d)None of the above

In CMOS inverter, fransistor is a switch having

a)Buffer
b)Infinite off resistance
c)Infinite on resistance
d)Infinite off resistance

What are the advantages of BICMOS


a)Higher gain
b)Hiph fraquency characteristics
c)All of the mentioned
d)Better noise characteristics

In nMOS inverter configuration depletion made device le called as


a)Pull up
b)Pull down
c)Above mentioned all
d)None of the above

The BICMOS are preferred aver CMOS due to

a)Twitching spends more compared to CMOS


b)Senattivity in respect in the land
c)High current capability
d)All mentioned above

Depletion mode transistor should be large


a)True
b)False
c)Neither
d)None of the above
The full form of COS-MOS is ____________
a) Complementary symmetry metal oxide semiconductor
b) Complementary systematic metal oxide semiconductor
c) Capacitive symmetry metal oxide semiconductor
d) Complemented systematic metal oxide semiconductor

MOS is being used in ___________


a) LSI
b) VLSI
c) MSI
d) Both LSI and VLS

Two important characteristics of CMOS devices are ____________


a) High noise immunity
b) Low static power consumption
c) High resistivity
d) Both high noise immunity and low static power consumption

CMOS is also sometimes referred to as ____________


a) Capacitive metal oxide semiconductor
b) Capacitive symmetry metal oxide semiconductor
c) Complementary symmetry metal oxide semiconductor
d) Complemented symmetry metal oxide semiconductor

10.CMOS logic dissipates _______ power than NMOS logic circuits.


a) More
b) Less
c) Equal
d) Very High

Semiconductors are made of ____________


a) Ge and Si
b) Si and Pb
c) Ge and Pb
d) Pb and Au

On which technology the Pentium is based?


a) MOSFET
b) CMOS
c) BiCMOS
d) BJT
BiCMOS is an evolved semiconductor technology that integrates two formerly separate
semiconductor technologies those of the _____________
a) CMOS and FET
b) MOSFET and CMOS
c) BJT and CMOS
d) BJT and MOSFET

The full form of PTL is _____________


a) Pull transistor logic
b) Push transistor logic
c) Pass transistor logic
d) Post Transistor Logic

1.Critical defects per unit chip area are ________ for a MOS transistor.
a) High
b) Low
c) Neutral
d) Very High

The speed of ______ circuits is limited by the tendency of common emitter circuits to go into
saturation.
a) TTL
b) ECL
c) RTL
d)DTL

TTL is a ____________
a) Current sinking
b) Current sourcing
c) Voltage sinking
d) Voltage sourcing

1.A disadvantage of DTL is ___________


a) The input transistor to the resister
b) The input resister to the transistor
c) The increased fan-in
d) The increased fan-out

Which among the following serves as an input stage to most of the op-amps due to its
compatibility with IC technology?

a. Differential amplifier
b. Cascode amplifier
c. Operational transconductance amplifiers (OTAs)
d. Voltage operational amplifier
PSSR can be defined as the product of the ratio of change in supply voltage to change in
output voltage of op-amp caused by the change in power supply & _______ of op-amp.

a. Open-loop gain
b. Closed-loop gain
c. Both a and b
d. None of the above

In two-stage op-amp, what is the purpose of compensation circuitry?

a. To provide high gain


b. To lower output resistance & maintain large signal swing
c. To establish proper operating point for each transistor in its quiescent state
d. To achieve stable closed-loop performance

In MOS devices, the current at any instant of time is ______of the voltage across their
terminals.

a. constant & dependent


b. constant & independent
c. variable & dependent
d. variable & independen

An ideal op-amp has ________

a. Infinite input resistance


b. Infinite differential voltage gain
c. Zero output resistance
d. All of the above

In MOS switch, clock feedthrough effect is also known as __________.

A. charge injection
B. charge feedthrough
C. charge carrier
D. charge ejaculation

a. A & B
b. B & C
c. C & D
d. B & D
Which among the following is/are regarded as an/the active resistor/s?

a. MOS diode
b. MOS transistor
c. MOS switch
d. All of the above

Which among the following can be regarded as an/the application/s of MOS switch in an IC
design?

a. Multiplexing & Modulation


b. Transmission gate in digital circuits
c. Simulation of a resistor
d. All of the above

MCQ 41:
In CMOS NOR gate, PDN NMOS transistors are in

a)series
b)parallel
c)series or parallel
d)random

Parallel combination of CMOS transistors can be represented as neq

a)1/n1+n2+n3+...
b)n1+n2+n3+...
c)2(n1+n2+n3+...)
d)2/n1+n2+n3+...

CMOS logic gate consist of

a)one network
b)two networks
c)three networks
d)four networks

Two networks in CMOS logic gates are operated by input variables which are

a)complement of each other


b)equal to each other
c)infinite
d)zero
Transistor which act as pull-up transistor in a CMOS logic gate is

a)BJT
b)PMOS
c)NMOS
d)BiCMOS

Two networks in CMOS logic gates are PDN and

a)DTL
b)RTL
c)PUN
d)PUMP

MCQ 15:
In CMOS NOR gate, PUN PMOS transistors are in

a)series
b)parallel
c)series or parallel
d)random

In NMOS circuit, current flows from

a)drain to source
b)source to drain
c)gate to drain
d)drain to gate

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