UNIT - 3 (SMPC)
UNIT - 3 (SMPC)
3 RESONANT
CONVERTERS
The effort to obtain ever-increasing power density in an SMPS has been limited
by the size of passive components. Operation at higher frequencies considerably
reduces the size of passive components such as transformers and filters;
however, switching losses have been an obstacle to high-frequency operation.
1
SWITCHED MODE POWER CONVERSION
The input voltage will be split between this impedance and the reflected
load. Since it is a voltage divider, the DC gain of an SRC is always lower than 1
(maximum gain happens at the resonant frequency).
At light load condition, the impedance of the load will be very large compared
to the impedance of the resonant network and all the input voltage will be
imposed on the load. This makes it difficult to regulate the output at light load.
Theoretically, frequency should be infinite to regulate the output at no load.
Advantages
Reduced switching loss and EMI through Zero Voltage Switching &
Improved efficiency
Reduced magnetic components size by high-frequency operation
Disadvantages
High circulating energy and high switching loss will occur at high input
voltage. They are not suitable in application such (front end DC/DC
application).
Pulsating rectifier current from the output capacitor so limitation for
high output current application.
Cannot regulate the output at no load condition.
2
SWITCHED MODE POWER CONVERSION
Advantages
Disadvantages
3
SWITCHED MODE POWER CONVERSION
Switches S1 and S2 operate at 50% duty cycle and the output voltage is regulated
by varying the switching frequency of the converter. The converter has two
resonant frequencies: a lower resonant frequency Fr2 (given by Lm, Lr, and Cr)
and a fixed higher series resonant frequency Fr1 (given by Lr and Cr only).
4
SWITCHED MODE POWER CONVERSION
5
SWITCHED MODE POWER CONVERSION
Region 2 is the multi-resonant converter (MRC) region. Between Fr1 and Fr2, the
load condition will determine the operation of the converter under ZVS and ZCS
conditions, converter voltage gain reaches its maximum value. In this region, the
energy stored in the magnetic components causes ZVS for the opposite
switching device.
Region 3 is the overloaded region. When switching frequency is higher than Fr2,
the converter always runs at ZCS condition. This region is called the capacitive
mode region, switches S1 and S2 are under hard switching and have high
switching losses. So ZCS operation should always be avoided.
Vo = Output voltage
From this equation, we can see that the lower the input voltage, the higher the
voltage gain.
6
SWITCHED MODE POWER CONVERSION
Advantages
Narrow frequency variation over a wide line and load range, making
this topology the best choice for front end DC-DC applications.
ZVS capability for entire load range, low turn-off current, therefore the
switching loss is very low.
Zero voltage switching even at no load condition
All essential parasitic elements, including junction capacitances of all
semiconductor devices and the leakage inductance of the transformer,
are utilized to achieve soft-switching.
No output choke required, resulting in cost savings
Integrated magnetics: When a transformer is used in an LLC converter,
the magnetizing inductance and leakage inductance can be used in
resonant circuit instead of using a separate external inductor
High efficiency of > 96% and high power level up to 1 kW.
Disadvantages
Applications
7
SWITCHED MODE POWER CONVERSION
By using a resonant pulse, the switching element will naturally go into a zero
current state, at which point the FET is turned off ZCS avoiding switching loss.
To better understand the operation of this circuit, we can simplify our model
slightly (assume output filter is large and act like a constant current source) and
break up its operation into four sub-intervals.
Interval 1
Immediately after the FET turns on, Lr's current begins to ramp up linearly. D1 is
still conducting and the resonant node is tied to ground. This initial state lasts
8
SWITCHED MODE POWER CONVERSION
until the current through Lr increases to the load current, causing D1 to switch
off.
Interval 2
After D1 switches off, the resonant capacitor begins to charge, and the resonant
circuit begins in full. The current and voltage oscillate at their natural frequency,
as the current is being used to both charge the capacitor and provided to the
load. This state continues until the current in Lr hits zero at which point, D2 turns
off and the FET can be turned off ZCS.
Interval 3
In this final state of the resonant switch, the voltage falls linearly as the resonant
capacitor discharges and provides the current for the load. Once the resonant
node hits zero, D1 turns on and pins it to ground.
Interval 4
This final interval provides the free variable for the converter, adjusting the time
between pulses. The value for the off time is dependent on the length of the
resonant pulse, the voltage you want to output, and the current being drawn
(meaning the control law will be load dependent).