Chapter 2

Instructions:
Language of the Computer
 Introduction
§

2.1
Instruction Set
• The repertoire of instructions of a computer
• Different computers have different
instruction sets
– But with many aspects in common
• Early computers had very simple
instruction sets
– Simplified implementation
• Many modern computers also have
simple instruction sets
 The ARMv8 Instruction Set
• A subset, called LEGv8, used as the
example throughout the course
• Commercialized by ARM Holdings (www.arm.com)
• Large share of embedded core market
– Applications in consumer electronics,
network/storage equipment, cameras, printers, …
• Typical of many modern ISAs
– See ARM Reference Data tear-out card
 Hardware
§

2.2 Operations of the Computer

Arithmetic Operations
•
Add and subtract, three operands
– Two sources and one destination

ADD a, b, c // a gets b + c

•
All arithmetic operations have this form
 Hardware
§

2.2 Operations of the Computer

Design Principle 1: Simplicity favours regularity
–
Regularity makes implementation simpler
–
Simplicity enables higher performance at
lower cost
 Arithmetic Example
• C code:
f = (g + h) - (i + j);

• Compiled LEGv8 code:

ADDt0, g,h //temp t0 = g+ h
ADDt1, i,j //temp t1 = i+ j
ADDf, t0,t1 //f = t0 - t1
 Hardware
§

2.3 Operands of the Computer

Register Operands
• Arithmetic instructions use register operands

• LEGv8 has a 32 × 64-bit register file

– Use for frequently accessed data
– 64-bit data is called a “doubleword”
•
31 x 64-bit general purpose registers X0 to X30
– 32-bit data called a “word”
•
31 x 32-bit general purpose sub-registers W0 to W30

• Design Principle 2: Smaller is faster

– c.f. main memory: millions of locations
 LEGv8 Registers
• X0 – X7: procedure arguments/results
• X8: indirect result location register
• X9 – X15: temporaries
• X16 – X17 (IP0 – IP1): may be used by linker as a scratch
register, other times as temporary register
• X18: platform register for platform independent code; otherwise
a temporary register
• X19 – X27: saved
• X28 (SP): stack pointer
• X29 (FP): frame pointer
• X30 (LR): link register (return address)
• XZR (register 31): the constant value 0
 Register Operand Example
• C code:
f = (g + h) - (i + j);
– f, …, j in X19, …, X23

• Compiled LEGv8
code: ADD X9, X20,
X21 ADD X10, X22,
X23 SUB X19, X9,
X10
 Memory Operands
• Main memory used for composite data
– Arrays, structures, dynamic data

• To apply arithmetic operations

– Load values from memory into registers
– Store result from register to memory

• Memory is byte addressed

– Each address identifies an 8-bit byte

• LEGv8 does not require words to be aligned

in memory, except for instructions and the
stack
 Memory Operand Example
•
C code:
g = h + A[8];
–
g and h in X20 and X21, base address of A in X22
•
Compiled LEGv8 code:
–
Index 8 requires offset of 64
LDUR X9,[X22,#64] // Temporary reg X9 gets A[8] ADD
X20,X21,X9 // g = h + A[8]
 Memory Operand Example
Assume variable h is associated with register
X21 and the base address of the array A is in
X22. What is the LEGv8 assembly code for the
C assignment statement below?

A[12] = h + A[8];

Compiled LEGv8 code:

LDUR X9, [X22,#64] // Temporary reg X9 gets A[8]

ADD X9,X21,X9 // Temporary reg X9 gets h +
A[8]
STUR X9, [X22,#96] // Stores h + A[8] back into
A[12]
 Registers vs. Memory
• Registers are faster to access than memory
• Operating on memory data requires loads
and stores
– More instructions to be executed
• Compiler must use registers for variables
as much as possible
– Only spill to memory for less frequently
used variables
– Register optimization is important!
 Immediate Operands
• Constant data specified in an instruction

ADDI X22, X22, #4

• Design Principle 3: Make the common

case fast
– Small constants are common
– Immediate operand avoids a load instruction
 Unsigned Binary Integers
•
Given an n-bit number
n1
x xn1  xn2 n2
 x 21 x 20
 
1 0

 Range: 0 to +2n – 1 (example: 0 to 231

–1)
 Example
 0000 0000 0000 0000 0000 0000 0000 10112
= 0 + … + 1×23 + 0×22 +1×21 +1×20
= 0 + … + 8 + 0 + 2 + 1 = 1110

Using 32 bits
 0 to +4,294,967,295
 2s-Complement Signed Integers
•
Given an n-bit number
n1
x x n1  xn2 n2
 x 21 x 20
 
1 0

 Range: –2n – 1 to +2n – 1 – 1


Example
 1111 1111 1111 1111 1111 1111 1111 11002
= –1×231 + 1×230 + … + 1×22 +0×21 +0×20
= –2,147,483,648 + 2,147,483,644 = –410


Using 32 bits
 –2,147,483,648 to +2,147,483,647
 2s-Complement Signed Integers
•
Bit 31 is sign bit
–
1 for negative numbers
–
0 for non-negative numbers
•
–(–2n – 1) can’t be represented
•
Non-negative numbers have the same unsigned
and 2s-complement representation
•
Some specific numbers


0: 0000 0000 … 0000

–1: 1111 1111 … 1111

Most-negative: 1000 0000 … 0000

Most-positive: 0111 1111 … 1111
 Signed Negation
•
Complement and add 1
– Complement means 1 → 0, 0 → 1

xx  1
1111...111
2

x  1 x

Example: negate +2
 +2 = 0000 0000 … 0010two

–2 = 1111 1111 … 1101two + 1
= 1111 1111 … 1110two
 Sign Extension
•
Representing a number using more bits
–
Preserve the numeric value
•
Replicate the sign bit to the left
–
c.f. unsigned values: extend with 0s
•
Examples: 8-bit to 16-bit
– +2: 0000 0010 => 0000 0000 0000 0010
–
–2: 1111 1110 => 1111 1111 1111 1110

•
In LEGv8 instruction set
–
LDURSB: sign-extend loaded byte
–
LDURB: zero-extend loaded byte
 Computer
§

2.5 Representing Instructions in the

Representing Instructions
•
Instructions are encoded in binary
–
Called machine code

•
LEGv8 instructions
–
Encoded as 32-bit instruction words
–
Small number of formats encoding operation
code (opcode), register numbers, …
–
Regularity!
 LEGv8 R-format Instructions
opcode Rm shamt Rn Rd
11 bits 5 bits 6 bits 5 bits 5 bits

• Instruction fields
– opcode: operation code
– Rm: the second register source operand
– shamt: shift amount (00000 for now)
– Rn: the first register source operand
– Rd: the register destination
 R-format Example
opcode Rm shamt Rn Rd
11 bits 5 bits 6 bits 5 bits 5 bits

ADD X9,X20,X21

1112ten 21ten 0ten 20ten 9ten

10001011000two 10101two 000000two 10100two 01001two

1000 1011 0001 0101 0000 0010 1000 10012 =

8B15028916
 LEGv8 D-format Instructions
opcode address op2 Rn Rt
11 bits 9 bits 2 bits 5 bits 5 bits

• Load/store instructions
– Rn: base register
– address: constant offset from contents of base register (+/-
32 doublewords)
– Rt: destination (load) or source (store) register number

• Design Principle 3: Good design demands good compromises

– Different formats complicate decoding, but allow 32-bit
instructions uniformly
– Keep formats as similar as possible
 LEGv8 I-format Instructions
opcode immediate Rn Rd
10 bits 12 bits 5 bits 5 bits

• Immediate instructions
– Rn: source register
– Rd: destination register

• Immediate field is zero-extended

 Stored Program Computers
The BIG Picture •
Instructions represented
in binary, just like data
•
Instructions and data stored
in memory
•
Programs can operate
on programs
–
e.g., compilers, linkers, …
•
Binary compatibility allows
compiled programs to work
on different computers
–
Standardized ISAs
 Operations
§

Logical Operations

2.6 Logical
• Instructions for bitwise manipulation
Operation C Java LEGv8
Shift left << << LSL
Shift right >> >>> LSR
Bit-by-bit AND & & AND, ANDI
Bit-by-bit OR | | OR, ORI
Bit-by-bit NOT ~ ~ EOR, EORI


Useful for extracting and
inserting groups of bits in a
word
 Shift Operations
opcode Rm shamt Rn Rd
11 bits 5 bits 6 bits 5 bits 5 bits

• shamt: how many positions to shift

• Shift left logical
– Shift left and fill with 0 bits
– LSL by i bits multiplies by 2i
• Shift right logical
– Shift right and fill with 0 bits
– LSR by i bits divides by 2i (unsigned only)
LSL X11,X19,#4 // reg X11 = reg X19 << 4 bits
 AND Operations
• Useful to mask bits in a word
– Select some bits, clear others to 0
AND X9,X10,X11

X1 00000000 00000000 00000000 00000000 00000000 00000000 00001101

11000000
0 00000000 00000000 00000000 00000000 00000000 00000000 00111100
00000000
X1 00000000 00000000 00000000 00000000 00000000 00000000 00001100
00000000
1

X9
 OR Operations
• Useful to include bits in a word
– Set some bits to 1, leave others unchanged
ORR X9,X10,X11

X1 00000000 00000000 00000000 00000000 00000000 00000000 00001101

11000000
0 00000000 00000000 00000000 00000000 00000000 00000000 00111100
00000000
X1 00000000 00000000 00000000 00000000 00000000 00000000 00111101
11000000
1

X9
 EOR Operations
• Differencing operation
– Set some bits to 1, leave others unchanged
EOR X9,X10,X12 // NOT operation

X1 00000000 00000000 00000000 00000000 00000000 00000000 00001101

11000000
0 1111111 1111111 1111111 11111111 11111111 11111111 11111111
1 1 1
1111111
X1 1
1111111 1111111 1111111 11111111 11111111 11111111 11110010
2

X9
 Decisions
§

Instructions for Making Decisions

2.7 Instructions for Making

Conditional Operations
• Branch to a labeled instruction if a condition is true
– Otherwise, continue sequentially

• CBZ register, L1
– if (register == 0) branch to instruction labeled L1;

• CBNZ register, L1
– if (register != 0) branch to instruction labeled L1;

• B L1
– branch unconditionally to instruction labeled L1;
 Compiling If Statements
• C code:
if (i==j) f = g+h; else f =
g-h;
– f, g, … in X22, X23, …
• Compiled LEGv8 code:
SUB X9,X22,X23
CBNZ X9,Else
ADD X19,X20,X21
B Exit
Else: SUB X9,X22,x23
Exit: …
Assembler calculates
addresses
 Compiling Loop Statements
• C code:
while (save[i] == k) i += 1;
– i in x22, k in x24, address of save in x25
• Compiled LEGv8 code:
Loop: LSL X10,X22,#3
ADD X10,X10,X25
LDU X9,[X10,#0]
R
SUB X11,X9,X24
CBN X11,Exit
Z
ADDI X22,X22,#1
B Loop
Exit: …
 Basic Blocks
•
A basic block is a sequence of instructions with
–
No embedded branches (except at end)
–
No branch targets (except at beginning)


A compiler identifies
basic blocks for
optimization

An advanced
processor can
accelerate execution
of basic blocks
 More Conditional Operations
• Condition codes, set from arithmetic instruction with S-
suffix (ADDS, ADDIS, ANDS, ANDIS, SUBS, SUBIS)
– negative (N): result had 1 in MSB
– zero (Z): result was 0
– overlow (V): result overflowed
– carry (C): result had carryout from MSB
• Use subtract to set flags, then conditionally branch:
– B.EQ (equal)
– B.NE (not equal)
– B.LT (less than, signed), B.LO (less than, unsigned)
– B.LE (less than or equal, signed), B.LS (less than or equal, unsigned)
– B.GT (greater than, signed), B.HI (greater than, unsigned)
– B.GE (greater than or equal, signed),
– B.HS (greater than or equal, unsigned)
 Conditional Example
• if (a > b) a += 1;
– a in X22, b in X23

SUBS X9,X22,X23 // use subtract to make

comparison B.GT Exit // conditional branch, less
than ADDI X22,X22,#1
Exit:
 Hardware
§

2.8 Supporting Procedures in Computer

Procedure Calling
• Steps required
1. Place parameters in registers X0 to X7
2. Transfer control to procedure
3. Acquire storage for procedure
4. Perform procedure’s operations
5. Place result in register for caller
6. Return to place of call (address in X30)
 Procedure Call Instructions
• Procedure call: jump and link
BL ProcedureLabel
– Address of following instruction put in X30
– Jumps to target address
• Procedure return: jump register
BR LR
– Copies LR to program counter
– Can also be used for computed jumps
•
e.g., for case/switch statements
 Leaf Procedure Example
• C code:
long long int leaf_example (long long int g, long
long int h, long long int i, long long int j)
{ long long int f;
f = (g + h) - (i + j); return
f;
}
–
Arguments g, …, j in X0, …, X3
–
f in X19 (hence, need to save $s0 on stack)
 Leaf Procedure Example
•
LEGv8 code:
leaf_example:
SUBI SP,SP,#24 Save X10, X9, X19 on stack
STUR X10,[SP,#16]
STUR X9,[SP,#8]
STUR X19,[SP,#0]
ADD X9,X0,X1 X9 = g + h
ADD X10,X2,X3 X10 = i + j
SUB X19,X9,X10 f = X9 – X10
copy f to return register
ADD X0,X19,XZR
Resore X10, X9, X19 from stack
LDUR X10,[SP,#16]
LDUR X9,[SP,#8]
LDUR X19,[SP,#0]
ADDI SP,SP,#24 Return to caller
BR LR
Local Data on the Stack
 Register Usage
• X9 to X17: temporary registers
–
Not preserved by the callee

• X19 to X28: saved registers

–
If used, the callee saves and restores them
 Non-Leaf Procedures
• Procedures that call other procedures
• For nested call, caller needs to save on
the stack:
–
Its return address
–
Any arguments and temporaries needed after
the call
• Restore from the stack after the call
 Non-Leaf Procedure Example
• C code:
long long int fact (long long int n)
{
if (n < 1) return (1);
else return (n * fact(n - 1));
}

–
Argument n in X0
–
Result in X1
 Leaf Procedure Example
• LEGv8 code:
fact: Save return address and n on stack
SUBI SP,SP,#16
STUR LR,[SP,#8]
STUR X0,[SP,#0] compare n and
1 if n >= 1, go
SUBIS XZR,X0,#1
to L1
B.GE L1
Else, set return value to 1
ADDI X1,XZR,#1
Pop stack, don’t bother restoring values
ADDI SP,SP,#16 Return
BR LR n=n-1
L1: SUBI X0,X0,#1 call fact(n-
BL fact 1)
LDUR X0,[SP,#0] Restore caller’s n
LDUR LR,[SP,#8] Restore caller’s return
ADDI SP,SP,#16 address Pop stack
MUL X1,X0,X1 BR return n * fact(n-1)

LR return