Module:4

Differential Amplifiers

Dr. Sandeep J. Rajput EC,GECG

 Differential Amplifiers
▪ A differential amplifier (also known as a difference amplifier or op-amp subtractor) is a type of
electronic amplifier that amplifies the difference between two input voltages but suppresses
any voltage common to the two inputs.
▪ A differential amplifier is an analog circuit with two inputs (V1 and V2) and one output (V0) in
which the output is ideally proportional to the difference between the two voltages.
▪ The formula for a simple differential amplifier can be expressed as,

▪ V0 is the output voltage, V1 and V2 are the input voltages.

▪ Ad is the gain of the amplifier (i.e. the differential amplifier gain).
▪ From the formula above, you can see that when V1 = V2, V0 is equal to zero, and hence the
output voltage is suppressed. But any difference between inputs V1 and V2 is multiplied (i.e.
amplified) by the differential amplifier gain Ad.
▪ This is why the differential amplifier is also known as a difference amplifier – the difference
between the input voltages is amplified.
BJT Differential Amplifier
Op-amp Differential Amplifier

▪ The output signal also depends in the

average input voltage, called common
mode signal VC, given by,

▪ The output voltage due to common mode

signal is given by, VO = ACVC
▪ Where AC - common mode gain,
 Op-amp Differential Amplifier
Differential Mode Gain (Ad)

As mentioned earlier, the output is proportional to the differential gain, Ad and the
differential voltage Vd. The output voltage VO is given by

VO = Ad Vd

Where,

Ad - differential gain

Vd - differential voltage

The differential gain can be written as

Differential gain Ad = VO / Vd

In decibels, Ad can be expressed as

 Differential Amplifier
Common Mode Rejection Ratio (CMRR)
▪ CMRR is defined as the ability of a differential amplifier to reject the
common mode signal.
▪ Need for Common Mode Rejection (CMRR)
▪ The common mode signal is the signal which is present at both the input
terminals of a differential amplifier.
▪ The best example of common mode signal is noise.
▪ Practically, the output is not zero for the common mode signal. The
differential signal produce a very small output voltage for common mode
input signal.
▪ Differential amplifier should be capable of rejecting the common mode
signal. Thus, CMRR is required to determine how the common mode signal
is rejected successfully. The CMRR is otherwise called as figure of merit of a
differential amplifier. CMRR is defined as the ratio of differential gain Ad to
the common mode gain Ac.
 Differential Amplifier
Common Mode Rejection Ratio (CMRR)

▪ For an ideal differential amplifies CMRR should be infinity.

▪ In practical situations, CMRR should be as high as possible. In dB, it is expressed
as
Differential Amplifier
Features

The differential amplifier should have the following features

i. High differential gain

ii. Low common mode gain

iii. High Common Mode Rejection Ratio (CMRR)

iv. High input impedance

v. Low output impedance

vi. High gain

vii. Large bandwidth

Differential Amplifier

▪ The two identical emitter biased circuits are used to form the differential amplifier.

▪ The transistors Q1 and Q2 have identical characteristics,

▪ RE1 = RE2, RC1 = RC2 and VCC = |-VEE|.

▪ These two emitter biased circuits are combined by connecting + VCC supply voltages of
the two circuits together and -VEE Supply voltages together.
Differential Amplifier

▪ The emitter E1 of transistor Q1 is connected to the emitter E2 of transistor Q2. Thus,

RE1 is connected in parallel with RE2.
▪ The input signal V1 is applied to the base B1 of transistor Q1 and V2 is applied to the
base B2 of transistor Q2. The output voltage is obtained between the collectors C1 and
C2.
▪ R = R = R and RE = RE1 || RE2
C1 C2 C

▪ This amplifier is called as emitter coupled amplifier because the emitter of both the
transistors are connected.
Differential Amplifier
Operation
The operation of emitter coupled differential amplifier has two operating modes.
i. Common mode
ii. Differential mode
Differential Amplifier
Operation
The operation of emitter coupled differential amplifier has two operating modes.
i. Common mode
ii. Differential mode
Differential Amplifier
DC Analysis

▪ To determine the operating point for the differential amplifier, we have to find the values for IC and VCEQ

▪ Apply KVL to the base emitter loop of Q1 transistor from Fig. 3.11.
Differential Amplifier
DC Analysis

Substitute IB value in eq.(1)

 Differential Amplifier
DC Analysis
▪ Generally

▪ Under dc conditions, the collector current is approximately equal to the emitter

current.

▪ For a given value of VEE, the emitter current IE and ICQ is determined by the emitter
resistance RE. The emitter current is independent of the collector resistance RC.
▪ Then we have to find the expression for VCEQ transistor Q1.
Differential Amplifier
DC Analysis- Assumption
▪ The voltage drop across the resistance R is negligibly small. The emitter voltage of
Q1 is approximately equal to –VBE . Then,
Differential Amplifier
AC Analysis
▪ The AC analysis of the differential amplifier can be obtained using h-parameter model.
▪ The AC analysis is done for only one transistor using h-parameters.
▪ We are going to find,
i. Differential gain, Ad
ii. Common mode gain, Ac
iii. Input impedance, Ri
iv. Output impedance, RO
Differential Amplifier
Assumption
i. The input signals appearing across the terminals should be equal and 180° out of phase.
ii. V1 = V2 = Vin/2
iii. The output signal at the emitter resistor RE is zero and hence it is short circuited.
iv. The emitter terminals connected to the ground.
Differential Amplifier
h-parameter model for the ac equivalent circuit

Applying KVL to the input loop L1,

Substitute Ib value in (1) in above equation

Vin

The negative sign indicates that the input and

Applying KVL to the output loop L2
output voltages are out of phase with respect
to each other.
Differential Amplifier
ii. Common Mode Gain Ac

Let the input to both the transistors are of the same magnitude and phase.

V1 = V2 = Vin

The common mode input signal is the average of the two input signals.

The output voltage is given as

Differential Amplifier
ii. Common Mode Gain Ac

▪ The emitter current will flow through the emitter resistance RE in both the transistors.
Thus, the ac current flowing through RE is equal to 2 IE.

▪ Since we are using the matched transistors, only one transistor is used for analysis.
The ac equivalent circuit for the common mode operation is shown in Fig. 3.15.
Differential Amplifier
ii. Common Mode Gain Ac
▪ The h-parameter equivalent circuit can be obtained as shown in Fig.3.16. The emitter
resistance is 2 RE due to the symmetry of the differential amplifier circuit.

▪ The common mode gain Ac is defined as

Differential Amplifier
ii. Common Mode Gain Ac
▪ Applying KVL to the input circuit

▪ Substitute (6) in (5),

Differential Amplifier
iii. Common Mode Rejection Ratio (CMRR)

▪ CMRR is defined as the ratio of differential gain to common mode gain.

▪ CMRR of a differential amplifier should be as high as possible. To improve CMRR,

common mode gain Ac should be reduced. This can be achieved by increasing the
emitter resistance RE.
Differential Amplifier
iv. Differential Input Impedance (Rin)

Applying KVL to the input loop of Fig.3.17.

in
Differential Amplifier
v. Output Impedance (RO)

▪ The input signal Vin is reduced to zero. This makes the base current Ib to be zero.
Therefore, hfe Ib = 0. Thus, the current source is equivalent to an open circuit.

▪ The output impedance is defined as the resistance measured between output terminals
to ground. In the circuit shown in Fig. 3.18, RO = RC.
Differential Amplifier
Input Bias Current

▪ Assume that both the inputs are connected to ground. Due to the emitter voltage - VEE,
both the transistors are forward biased and conduct simultaneously Q1 and Q2 are
assumed to be as matched transistors. In practice, the matching will not be perfect. So,
the base currents IB1 and IB2 are not equal.
▪ The input bias current IB is defined as the average of the base currents IB1 and
IB2 flowing into the two transistors of the differential amplifier.

▪ For an ideal differential amplifier, the input bias current should be zero. But practically
it should be as small as possible.
Differential Amplifier
Input Offset Current (Iios)

▪ It is defined as the algebraic difference between the base currents IB1 and IB2.

▪ Iios should be practically as small as possible.

Differential Amplifier
Summary

1. Differential voltage gain

2. Common mode voltage gain

3. Input Impedance

4. Output Impedance

5. Input bias current

6. Input offset current

Differential Amplifier
The Fig. 8.8.5 shows dual input, balanced output differential amplifier configuration.
Assuming silicon transistors with hie = 2.8 kΩ.
Calculate i) Operating point values ii) Differential gain iii) Common mode gain iv) CMRR
v) Output if VS1 = 70 mV peak to peak at 1 kHz and VS2 = 40 mV peak to peak at 1 kHz.
Differential Amplifier
Sol. : As the transistors are silicon, VBE = 0.7 V.
i) Operating point values are ICQ and VCEQ
Differential Amplifier
Methods of Improving CMRR- Higher the value of CMRR, better is the performance of
differential amplifier. Hence in practice the efforts are always to improve the CMRR of the
differential amplifier
Effect of RE
▪ To improve the CMRR, the common mode gain AC must be reduced.
▪ The common mode gain AC approaches zero as RE tends to infinity. This is because RE
introduces a negative feedback in the common mode operation which reduces the
common mode gain AC.
▪ Thus, higher the value of RE, lesser is the value of AC and higher is the value of CMRR.
▪ The differential gain Ad is not dependent on RE
▪ But practically RE cannot be selected very high due to certain limitations such as,
1. Large RE needs higher biasing voltage to set the operating Q point of the transistors.
2. This increases the overall chip area.
▪ Hence practically instead of increasing RE various other methods are used which provide
effect of increased RE without any limitations. Such two methods are –
1. Constant current bias method.
2. Use of current mirror circuit.
▪ The other method used to increase Ad to improve CMRR is called use of an active load.
 Differential Amplifier
Differential Amplifier with Constant Current Source

▪ Without physically increasing the value of RE, the RE is replaced by a transistor

operated at a constant current.

▪ Such a constant current source circuit gives the effect of a very high resistance without
affecting the Q point values of the differential amplifier.

▪ The differential amplifier using constant current bias circuit instead of RE is shown in
the Fig. 8.9.1.

▪ The transistor used is Q3 and the values of R1, R2 and R3 are selected so as to give the
same operating point values for the two transistors Q1 and Q2.

▪ Let current through R3 be IE3 while current through R2 is I.

▪ Neglecting the base current of Q3 which is very small, we can assume that current
through R2 is also I.
Differential Amplifier
Differential Amplifier with Constant Current Source
Differential Amplifier
Differential Amplifier with Constant Current Source
Differential Amplifier
Differential Amplifier with Constant Current Source

▪ Neglecting IB3 we can write , IC3 = IE3.

▪ Now, as VEE, R1 , R2 , R3 and VBE are constants, current IC3 is almost equal to IE3 and
also constant.

▪ So that, circuit with transistor Q3, acts as a constant current source.

Key Point : The internal resistance of a constant current source is very high,
ideally infinite. Hence this circuit makes the value of emitter resistance ideally
infinite which reduces the common mode gain AC ideally to zero.
Differential Amplifier
Differential Amplifier with Current Mirror Circuit
▪ The circuit in which the output current is forced to equal the input current is called
current mirror circuit.
▪ In a current mirror circuit, the output current is the mirror image of input current.
▪ The basic block diagram is shown in Fig. 8.9.2 (a) while the Fig. 8.9.2 (b) shows the
circuit diagram.
Differential Amplifier
Differential Amplifier with Current Mirror Circuit
▪ The circuit consists of two matched transistors Q3 and Q4. Their base-emitter voltage
and base currents are same.
VBE3 = VBE4 and IB3 = IB4
▪ Similarly, their collector currents are also same.
i.e. IC3 = IC4
▪ Applying KCL at node a,
I2 = IC4 + I …………………………. (8.9.5)
▪ Applying KCL at node b,
I = IB3 + IB4 = 2IB4 = 2IB3 ……….. (8.9.6)
Differential Amplifier
Differential Amplifier with Current Mirror Circuit
▪ Generally, β is very large and hence (2/ β) is negligibly small.
I2 ≅ IC3 ………………… (8.9.9)
▪ Thus, the collector current of Q3 is nearly equal to the current I2.
▪ Hence once current mirror circuit is set for current I2, it provides constant current bias
to the differential amplifier.
▪ Thus, I2 can be obtained by writing KVL for the base-emitter loop of transistor Q3.

▪ Selecting R2, the appropriate I2 can be set for the current mirror circuit.
Differential Amplifier
Differential Amplifier with Current Mirror Circuit
Advantages

▪ The various advantages of current mirror circuit are,

1. Provides very high emitter resistance RE.

2. Requires less components that constant current bias.

3. Simple to design.

4. Easy to fabricate.

5. With properly matched transistors, collector current thermal stability is achieved.

▪ Thus, constant current bias can be easily replaced by current mirror circuit to improve
CMRR.

▪ Due to its advantages, current mirror circuit is most commonly used in the integrated
circuit op-amps.
Differential Amplifier
Use of an Active Load to Improve CMRR
▪ To improve CMRR, it is necessary to increase Ad.
▪ To increase Ad, RC must be high as possible as Ad = RC/re.
▪ But there are limitations to select maximum value of RC such as:
i) For large RC the quiescent drop is more hence higher biasing voltage is necessary to maintain the
quiescent collector current.
ii) Higher value of RC requires a large chip area. Hence it is not possible to increase the value of
RC beyond a particular limit.

▪ The current mirror circuit has very low D.C. resistance (dv/di) and higher A.C.
resistance (dv/di).
▪ The requirement to increase the gain is same that the collector resistance should not
disturb D.C. conditions while it must provide large resistance for A.C. purposes.
▪ Hence the current mirror circuit can be used as a collector load instead of RC. Such a
load is called an active load.
▪ The quiescent voltage across the current mirror is the fraction of the supply voltage.
This eliminates the need of high biasing supply voltage.
Differential Amplifier
Use of an Active Load to Improve CMRR

▪ The differential amplifier using a current mirror as an active load is shown in the Fig.
8.9.3.
Differential Amplifier
Use of an Active Load to Improve CMRR
▪ Under the d.c. conditions, VS1 = VS2 = 0.
▪ As Q1 and Q2 are matched transistors hence I1 = I2 = IEE /2, where base currents of
Q1 and Q2 are neglected.
▪ The transistors Q3 and Q4 form a current repeater hence I1 = I2.
▪ The load current IL entering the next stage is,
▪ IL = I – I2 = 0 ................. (8.9.11)
▪ But when VS1 increases over VS2' the current I1 increases whereas I2 decreases as I1 +
I2 = IEE constant.
▪ Also, the current I always remains equal to I1 due to the current mirror action.
Key Point : Thus, the active load provides very high a.c. resistance and hence high
differential mode voltage gain. Thus, as Ad becomes high, CMRR gets improved.
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