EVEN2025 / MICROCONTROLLERS / BEC405A / 4TH SEM / A SECTION / Dr GSY

MODULE1
Microcontroller: Microprocessor Vs Microcontroller, Microcontroller & Embedded Processors,
Processor Architectures-Harvard Vs Princeton & RISC Vs CISC, 8051 Architecture- Registers, Pin
diagram, I/O ports functions, Internal Memory organization. External Memory (ROM & RAM)
interfacing.
What is a microprocessor.

It is a small, multipurpose, digital circuit that performs

arithmetic, logic, and control functions.
How it works:
 Microprocessors receive binary data as input
 They process the data based on instructions stored in
their memory
 They produce binary results as output
What it's used for:
 Microprocessors are the "brain" of computers, and are
used in many household and electronic devices.
 They are also used in servers, supercomputers, and
communications products.
 Microprocessors are used in areas such as meteorology,
aviation, nuclear physics, and engineering.
What is a Microcontroller.
A microcontroller (MCU) is a small computer chip that controls specific tasks in an embedded system. It
contains a processor, memory, and input/output (I/O) peripherals.
How it works.
 A microcontroller receives data from its I/O peripherals
 The data is stored in the microcontroller's data memory
 The processor accesses the data and uses instructions from the program memory to interpret it
 The microcontroller uses its I/O peripherals to communicate and take action
Where it's used.
 Microcontrollers are used in many devices, including:
o Home appliances
o Medical devices
o Robots
o Automobile engine control systems
o Office machines
o Mobile radio transceivers
o Vending machines
Why it's used.
 Microcontrollers are designed to be efficient and cost-effective
 They are well-suited for applications that require real-time signal processing
 They are designed to perform a single automated task repeatedly

Microprocessor Vs Microcontroller.
Microprocessor only consists of Central Processing Unit, whereas Microcontroller has memory, a CPU and
I/O. All these are integrated into one chip. A microprocessor uses external bus to interface to ROM, RAM,
and other peripherals. Microcontroller, on the other hand, uses internal controlling bus.
The microprocessor is useful in Personal Computers whereas Micro Controller is useful in an embedded
system.
Microprocessors have more processing power and more memory than microcontrollers. They also have a
higher price tag and consume more power.

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Microcontrollers and microprocessors are both internal components of electronic devices that perform
computing tasks. The main difference between them is the type of tasks they perform and the devices they are
used in.
Microcontrollers are used in devices that require low-power, real-time computing. They perform tasks like
data processing, controlling peripheral devices, and communicating with other systems. Microcontrollers
are used in devices like smart appliances, toys, and remote controls. Microcontrollers are cost-efficient and
have integrated features like power-saving modes. They also have their own RAM, ROM, and I/O systems.
Microprocessors are used in devices that require complex computations and higher processing power. They
perform tasks like arithmetic and logic operations, data processing, and control operations. Microprocessors
are used in devices like computers, smartphones, and industrial supercomputers.
Concluding, a microcontroller has a CPU ( a microprocessor ) in addition to a fixed amount of RAM, ROM,
I/O ports, ADC, a timer and other peripherals all on a single chip.
Microcontroller & Embedded Processors.
What is an embedded system?
An embedded product uses a microprocessor (or microcontroller) to do one task and one task only. A printer
is an example of embedded system since the processor inside it performs only one task; namely, getting the
data and printing it. Contrast this with a PC which can be used for any number of applications such as word
processor, print server, bank teller terminal, video game player, network server, or internet terminal. Software
for a variety of applications can be loaded and run. The reason a PC can perform various tasks is that it has
RAM memory and an operating system that loads the application software into RAM and lets the CPU run it.
In an embedded system, there is only one application software that. is typically burned into ROM. One of the
most critical needs of an embedded system is to decrease power consumption and space. In "high-performance
embedded processors, the trend is to integrate more and more functions on the CPU chip and let the designer
decide which features he/she wants to use.

Microprocessor system contrasted with Microcontroller system.

Criteria for choosing a microcontroller:
3 criterias. 1) Computing needs.
2) Availability of software development tools such as compilers, debuggers & assemblers.
3) Wide availability & reliable sources of the microcontroller.
1) Computing needs: Based on the task at hand, based on the computing needs we have to select either
8-bit, 16-bit or 32-bit controllers which can best handle the computing needs of the task effectively. Other
needs are speed, packing, power consumption, amount of memory in the chip(ROM or RAM), number of I/O
pins & Timer on the chip, upgradation capability, Cost per unit.
2) Software: The second criterion in choosing a microcontroller is how easy it is to develop products
around it. Key considerations include the availability of an assembler, debugger, a code-efficient C language
compiler, emulator, technical support, and both in-house and outside expertise. In many cases, third-party
vendor (that is, a supplier other than the chip manufacturer) support for the chip is as good as, if not better
than, support from the chip manufacturer.
3) Reliable resources: The third criterion in choosing a microcontroller is its ready availability in
needed quantities both now and in the future. For some designers this is even more important than the first

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two criteria. Currently, of the leading 8-bit microcontrollers, the 8051 family has the largest number of
diversified (multiple source) suppliers. By supplier is meant a producer besides the originator of the
microcontroller. In the case of the 8051, which was originated by Intel, several companies also currently
produce (or have produced in the past) the 8051. These companies include: Intel, Atmel, Philips/Signetics,
AMD, Infineon (formerly Siemens), Matra, and Dallas Semiconductor.
Processor architectures:
A processor architecture refers to the design and organization of a computer's central processing unit (CPU),
defining how it processes data and executes instructions, including its instruction set, data paths, and control
logic, which ultimately determines how efficiently it performs computing tasks; essentially, it outlines the
blueprint for how a processor functions and interacts with other components like memory and input/output
devices.
Key points about processor architecture:
 Instruction Set Architecture (ISA): This is the core of the processor architecture, specifying the set of
instructions the CPU can understand and execute.
 Data Paths: The pathways within the CPU through which data flows during processing.
 Control Logic: The circuitry that manages the execution of instructions, coordinating data flow and
operations within the CPU.
Important aspects of processor architecture:
 Register size: The number of bits a processor can handle at once.
 Addressing modes: How the CPU accesses memory locations.
 Instruction types: Different types of operations a processor can perform (arithmetic, logical, data
transfer).
Common processor architectures:
 RISC (Reduced Instruction Set Computing):
Simple instructions designed for fast execution with fewer cycles per instruction.
 CISC (Complex Instruction Set Computing):
More complex instructions that can perform multiple operations in one step, potentially requiring more
cycles per instruction.
 Von Neumann architecture:
A traditional architecture with a single memory space for both data and instructions. While common,
might not be the most optimized for specific embedded applications.
 Harvard architecture: A common architecture for microcontrollers and Digital Signal Processors
(DSPs). The Harvard architecture offers separate storage and signal buses for instructions and data.
 The Princeton architecture: has a simple structure. It is based on shared data and programming
memory, the processor that manages the data through the downloaded instructions, and input/output
devices that communicate with the outside world. The Princeton architecture, also known as the Von
Neumann architecture, is a computer architecture based on that described in 1945 by the mathematician
and physicist John von Neumann.
Harvard v/s Princeton:

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 Princeton Harvard
Common memory for storing the control programme Separate memory banks for program storage, the
as well as variables and other data structures. processor stack and variable RAM.
Advantages: Advantages:
 Simplifies the microcontroller chip design because  Executes instructions in fewer instruction cycles
only one memory is accessed, as all data and than Princeton architecture. (This is because of
instructions are stored in a single memory space. parallelism – fetching the next instruction during
 Greater flexibility in developing software, the execution of the current instruction)
primarily in the area of real-time operating  Faster Processing: The availability of two buses
systems. for data and instructions avoids a problem of
 Cost-Effective: A smaller number of components contention where only one bus is used and this
is needed as compared to the other architectural enhances the velocity of the system.
designs hence more economical.  Improved Security: In this way the chance of
Disadvantages: memory corruption is at least cut in half since data
 Bottleneck Issues: The shared bus can be a is not stored in the same locations as instructions.
problem because the data and control instructions  Efficient Use of Resources: It enables the use of
cannot be obtained simultaneously and therefore it different memory for data and for instructions of
becomes slow. different sizes as this help in optimal utilization of
 Memory Corruption: Since the data and the buses and other resources.
instructions reside in the same memory, then there Disadvantages:
is a temptation of one erasing the other thereby  Complexity: The design and the implementation of
producing system faults. this type are more intricate, thus necessitating
other hardware facilities.
 Higher Cost: Since the concept of Harvard
architecture calls for two sets of memory and two
separate buses, their implementation costs are
comparatively high than Von Neumann
architecture.
 Less Flexibility Competitors: Changing or even
improving the system can also be a little tricky
because of the different memory regions.
RISC v/s CISC:
RISC – Reduced Instruction Set Computers.
CISC – Complex Instruction Set Computers.
 In CISC there are large number of complex instructions, capable of carrying out multiple internal
operations. In RISC, the instructions are less in number, each one capable of performing a single operation.
 RISC chips are relatively simple to design & inexpensive. Here the computer has to perform simple
operations to execute a larger program having a large number of processing operations.
 RISC processors are generally faster. They use the simpler instructions that can be executed more quickly
allowing for the better performance in most cases.
 A CISC processors are easier to program. They have the more complex instructions that can perform the
multiple operations and potentially reducing the amount of a code needed for the certain tasks.
 The CISC architecture tries to elevate CPU performance by finishing a task in minimal lines of assembly
code, while RISC relies on the strategy of lowering the execution time of each instruction. For example,
on an Intel 8086 processor (CISC device), multiple operations on two 8-bit numbers may require around
70 to 77 clock cycles. In contrast, a PIC microcontroller (RISC device) may take up to 38 clock cycles. As
the example reveals, the RISC device is 2x faster than its CISC counterpart. The CSIC architecture
processes complex instructions that require several clock cycles for execution. On average, it takes two to
five clock cycles per instruction (CPI). The RISC architecture executes simple yet optimized instructions
in a single clock cycle. It processes instructions at an average speed of 1.5 clock cycles per instruction
(CPI).
 CISC processors use a memory-to-memory framework to execute instructions such as ADD, LOAD, and
even STORE. RISC processors rely on a register-to-register mechanism to execute ADD, STORE, and
independent LOAD instructions.
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 The CISC architecture uses only one register set. The RISC architecture utilizes multiple registers sets.
 CISC does not support parallelism and pipelining. As such, CISC instructions are less pipelined. RISC
processors support instruction pipelining.
8051 combines many of the features of a RISC processor & the larger instruction set of a CISC processor.
This combination makes the programming of 8051 easier in many cases.

8051 Architecture:
8051 hardware:

8051 microcontroller is designed by Intel in 1981. It is an 8-bit microcontroller. It is built with 40 pins DIP
(dual inline package), 4kb of ROM storage and 128 bytes of RAM storage, 2 16-bit timers. It consists of four
parallel 8-bit ports, which are programmable as well as addressable as per the requirement. An on-chip
crystal oscillator is integrated in the microcontroller having crystal frequency of 12 MHz.
The 8051 architecture consists of the below mentioned features
1) 8-bit CPU with registers A (the accumulator) & B
2) 16-bit program counter (PC) & data pointer (DPTR)

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 3) 8-bit program status word (PSW)
4) 8-bit stack pointer (SP)
5) Internal ROM of 4k size
6) Internal RAM of 128 bytes:
 4 register banks, each containing 8 registers
 16 bytes, which may be addressed at the bit level
 80 bytes of general-purpose data memory
7) 32-bit input/output pins arranged as four 8-bit ports: P0-P3
8) Two 16-bit timer/counters: T0 & T1
9) Full duplex serial data receiver/transmitter: SBUF
10) Control registers: TCON, TMOD, SCON, PCON, IP & IE
11) 2 external & 3 internal interrupt sources
12) Oscillator & clock circuits.
Let us now discuss the architecture of 8051 Microcontroller.
The system bus connects all the support devices to the CPU. The system bus consists of an 8-bit data bus, a
16-bit address bus and bus control signals. All other devices like program memory, ports, data memory,
serial interface, interrupt control, timers, and the CPU are all interfaced together through the system bus.
8051 Programming Model: (shows the 8051 as a collection of 8- & 16-bit registers & 8-bit memory
locations.

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The programming model of the 8051 microcontroller is based on a collection of registers and memory
locations that are controlled by software instructions.
Program Counter and Data pointer: The 8051 contains two 16-bit registers: namely the program
counter(PC) & the data pointer(DPTR). Both are used to hold the address of a byte in the memory.
Program instruction bytes are fetched from ROM memory that is addressed by the PC. The ROM (internal)
has the address from 0000h to 0FFFh & the external ROM (if connected) address will commence from 1000h
till FFFFh, in total the ROM address is from 0000h to FFFFh. The PC is automatically incremented after each
instruction is fetched. PC do not have any internal address, hence it is not accessible by the programmer.
The DPTR register is made up of two eight-bit registers, namely DPH & DPL. DPTR is used to access the
internal & external code & external data access. DPH & DPL have internal addresses, but DPTR as a whole
do not have any internal address. DPTR can be accessed using the instructions.
A & B registers: 8051 contains 34 general-purpose or working registers out of which A & B are the one.
They hold the result of all arithmetic & logical operations performed by the CPU. The remaining 32 registers
are the part of the internal RAM. A register is used for all operations & also used for data transfers between
the 8051 controller & external memory. The register B is used along with A register for storing the result after
multiplication & division operations.
Flags & Program Status Word(PSW):

REGISTER
RS1 RS0
BANK
0 0 BANK 0
0 1 BANK 1
1 0 BANK 2
1 1 BANK 3

Flags are 1 bit registers provided to store the results of certain program instructions. They are grouped inside
the PSW. 4 math flags (CY, AC, OV, P), 1 user flag(F0), 2 register bank select flags (RS0 & RS1) & 1 user
definable flag.
Internal Memory:
ROM is for storing the pgm code bytes & RAM is for variable data that can be altered by the pgm.
8051 has Harward architecture. It has 128 byte(00h-7Fh) RAM & 4k(0000h-0FFFh) ROM.
Internal RAM: (figure next page)
Out of 128 byte locations (00h-7Fh), the first 32 locations(00h-1Fh) are divided into 4 banks of 8 locations
each & they are called as register banks, Bank0(00h-07h), Bank1(08h-0Fh), Bank2(10h-17h) & Bank3(18h-
1Fh). Each bank is made out of 8 registers each –R0-R7. Bits RS0-RS1 in PSW is used to select any one bank
out of 4 banks. Bank0 is selected on reset.
Next 16 locations(20h-2Fh) are bit addressable(00h-7Fh) (Total 128 bits – 16 x 8 = 128) as well as byte
addressable.
Next remaining 80 locations (128-32-16) with the addresses 30h – 7Fh are the general purpose RAM which
are byte addressable.
The stack & Stack pointer:
The stack (pls understand the dictionary meaning of stack) is the memory which is used for temporary storage
of data. The stack pointer(8-bit) is a register which holds the address of location in the stack & that location

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is called as TOS-Top of the Stack. Stack grows as the data is placed on the TOS & the stack size is decreased
when the data is taken back from the TOS.
Byte address
Byte address

Byte address

Special Function Registers:

These are specific internal registers which may be addressed like internal RAM using the addresses from 80h-FFh. Some
SFRs are bit-addressable. SFRs in 8051 –

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Internal ROM:
Internal ROM is of size 4k (0000h-0FFFh). Harward architecture.
Input / Output Pins, Ports & circuits:
Input / Output pins are used to connect the 8051 with the
outside world. 8051 microcontrollers have 4 I/O ports each
of 8-bit, which can be configured as input or output. Hence,
total 32 input/output pins allow the microcontroller to be
connected with the peripheral devices. The 8051
microcontroller has a 40-pin dual in-line package (DIP)
that provides various inputs and outputs for
communication with external devices. These 40 pins
serve different functions like read, write, I/O
operations, interrupts etc. 32 out of these 40 pins are
dedicated to I/O ports. The rest of the pins are dedicated
to VCC, GND, XTAL1, XTAL2, RST, ALE, EA and
PSEN.
Description of the pins:
Pin 1 to Pin 8 (Port 1) – Pin 1 to Pin 8 are assigned to
Port 1 for simple I/O operations. They can be configured
as input or output pins depending on the logic control i.e.
if logic zero (0) is applied to the I/O port it will act as an
output pin and if logic one (1) is applied the pin will act
as an input pin. These pins are also referred to as P1.0 to
P1.7. These pins are bidirectional pins.
Pin 9 (RST) – Reset pin. It is an active-high, input pin.
Therefore, if the RST pin is high, the microcontroller will
reset i.e. it will close and terminate all activities. It is
often referred as “power-on-reset” pin because it is used
to reset the microcontroller to its initial values when
power is on (high).

Pin 10 to Pin 17 (Port 3) – are port 3 pins which are also referred to as P3.0 to P3.7. These pins are similar to port 1
and can be used as universal input or output pins. These pins are bidirectional pins. These pins also have some
additional functions which are as follows:
 P3.0 (RXD): 10th pin is RXD (serial data receive pin) which is for serial input. Through this input signal
microcontroller receives data for serial communication.
 P3.1 (TXD): 11th pin is TXD (serial data transmit pin) which is serial output pin. Through this output signal
microcontroller transmits data for serial communication.
 P3.2 and P3.3 (̅̅̅̅̅̅̅
INT0, ̅̅̅̅̅̅
INT1 ): 12th and 13th pins are for External Hardware Interrupt 0 and Interrupt 1
respectively. When this interrupt is activated (i.e. when it is low), 8051 gets interrupted in whatever it is doing
and jumps to the vector value of the interrupt (0003H for INT0 and 0013H for INT1) and starts performing
Interrupt Service Routine (ISR) from that vector location.
 P3.4 and P3.5 (T0 and T1): 14th and 15th pin are for Timer 0 and Timer 1 external input. They can be connected
with 16-bit timer/counter.
 P3.6 (WR ̅̅̅̅): 16th pin is for external memory write i.e. writing data to the external memory.
 P3.7 (RD ̅̅̅̅): 17th pin is for external memory read i.e. reading data from external memory.
Pin 18 and Pin 19 (XTAL2 and XTAL1) – These pins are connected to an external oscillator which is generally a
quartz crystal oscillator. They are used to provide an external clock frequency of 4MHz to 30MHz.
Pin 20 (GND) – This pin is connected to the ground. It has to be provided with 0V power supply. Hence it is connected
to the negative terminal of the power supply.
Pin 21 to Pin 28 (Port 2) – Pin 21 to pin 28 are port 2 pins also referred to as P2.0 to P2.7. When additional external
memory is interfaced with the 8051 microcontroller, pins of port 2 act as higher-order address bytes. These pins are
bidirectional.
̅̅̅̅̅̅̅) – PSEN stands for Program Store Enable. It is output, active-low pin. This is used to read external
Pin 29 (𝐏𝐒𝐄𝐍
memory.
Pin 30 (ALE/ ̅̅̅̅̅̅̅̅
𝐏𝐑𝐎𝐆) – ALE stands for Address Latch Enable. It is input, active-high pin. This pin is used to
distinguish between memory chips when multiple memory chips are used. It is also used to de-multiplex the

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multiplexed address and data signals available at port 0. During flash programming i.e. Programming of EPROM,
this pin acts as program pulse input (PROG).
Pin 31 (̅̅̅̅
EA / VPP) – EA stands for External Access input. It is used to enable/disable external memory interfacing.
In 8051, EA is connected to Vcc as it comes with on-chip ROM to store programs. For other family members such
as 8031 and 8032 in which there is no on-chip ROM, the EA pin is connected to the GND.
Pin 32 to Pin 39 (Port 0) – Pin 32 to pin 39 are port 0 pins also referred to as P0.0 to P0.7. They are bidirectional
input/output pins. They don’t have any internal pull-ups. Hence, 10 K? pull-up registers are used as external pull-ups.
Port 0 is also designated as AD0-AD7 because 8051 multiplexes address and data through port 0 to save pins.
Pin 40 (VCC) – This pin provides power supply voltage i.e. +5 Volts to the circuit.
External Memory:
The 8051 has a limited amount of internal memory, it is possible to extend the memory capacity by
interfacing it with external memory devices.
External memory interfacing in 8051 microcontroller involves connecting external memory devices such as
RAM and ROM to the microcontroller to provide additional memory space. This allows the microcontroller
to execute larger and more complex programs, store more data, and perform more complex operations.
External memory interfacing typically involves connecting the memory devices to the microcontroller
through a data bus and an address bus. The data bus is used to transfer data between the microcontroller and
the memory device, while the address bus is used to select a specific memory location in the memory device.
To interface with external memory, the 8051 microcontroller uses dedicated pins such as ALE (Address
Latch Enable), PSEN (Program Store Enable), and RD (Read) and WR (Write) signals. These signals are
used to control the flow of data between the microcontroller and the external memory device.
Connecting External Memory:

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8051 accesses external RAM whenever certain pgm instructions are executed. The external ROM is
accessed whenever EA ̅̅̅̅ (External access) pin is connected to the ground or when the PC contains address
higher than the last address in the internal 4K ROM (0FFFh).
As shown in the figure below, during any memory access cycle port 0 is time multiplexed. i.e., during the
earlier part of the cycle, port 0 provides the lower byte of the 16-bit memory address, then during the latter
part of the cycle port 0 acts as the bidirectional bus to read or write a byte of memory data. Port 2 provides
the higher byte of the memory address during the entire memory access cycle. The lower address byte from
port 0 must be latched into an external register to save the byte. Address byte save is accomplished by the
ALE clock pulse that provides the correct timing for the latch used. The port 0 pins are then free to serve as
a data bus.
If the memory access is from the ROM, then 𝐏𝐒𝐄𝐍 ̅̅̅̅̅̅̅ pin will go low to enable the ROM. If the RAM has to
̅̅̅̅ ̅̅̅̅
be accessed, the WR or RD pins will become active enabling the data flow between the RAM & the data bus.

External memory Timing

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Questions from VTU previous Q-papers for module1:

1. With neat block diagram explain the architectural features of microcontroller 8051. 8
2. Write a note on Embedded microcontrollers 4
3. Write an interfacing diagram 8051 microcontroller interfaced to 8k bytes of ROM and 8k bytes of RAM. 8
4. With neat diagram explain the internal memory structure and programming model of 8051 microcontroller. 8
5. Write a short note on the criteria for choosing a microcontroller 4
6. Write an interfacing diagram 8051 microcontroller interfaced to 8k bytes of ROM and 16k bytes of RAM 8
7. Bring out the difference between Microprocessor and Microcontroller 4
8. With diagrams explain the internal RAM structure of 8051 microcontroller 8
9. Define microcontroller, mention its applications. 4
10. Interface 4k bytes RAM and 8k bytes ROM to 8051 microcontroller in such a way that starting address of 8
RAM is 1000H and ROM is C000H.
11. List the SFRs present in 8051 along with its address & also write the importance of Reg A & B. 6
12. How many pins are present in 8051 microcontroller & explain the function of each pin. 8
13. Explain the PSW register & also the status of the conditional flags if number AB & FF are added in the 6
accumulator.
14. Compare RISC & CISC systems. 5
15. With neat block diagram compare the Harvard & Princeton architecture 8

Solutions to the problems bearing Q#3 & 10. Q#6 is of the same type. Pls try it.

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